TWI597811B - 晶片封裝方法及晶片封裝結構 - Google Patents

晶片封裝方法及晶片封裝結構 Download PDF

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TWI597811B
TWI597811B TW104141404A TW104141404A TWI597811B TW I597811 B TWI597811 B TW I597811B TW 104141404 A TW104141404 A TW 104141404A TW 104141404 A TW104141404 A TW 104141404A TW I597811 B TWI597811 B TW I597811B
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layer
metal
line reset
wafer
conductive
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TW104141404A
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TW201715682A (zh
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蘇威碩
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碁鼎科技秦皇島有限公司
臻鼎科技股份有限公司
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Description

晶片封裝方法及晶片封裝結構
本發明涉及一種晶片封裝技術，特別涉及一種晶片封裝方法及採用該方法得到的晶片封裝結構。
封裝是指安裝半導體積體電路晶片用的外殼，它不僅擔任放置、固定、密封、保護晶片和增強導熱性能的作用，而且還是溝通晶片內部世界與外部電路的橋樑。晶片上的接點用導線連接到封裝外殼的導線，這些導線又透過印刷電路板上的導線與其它零件建立連接。因此，對於很多積體電路產品而言，封裝技術都是非常關鍵的一環。
而現有技術中的封裝結構是採用先實現封膠體內的晶片與金屬柱的電性導通，再進行封裝的方法進行晶片封裝的。採用此方法得到的晶片封裝結構的晶片良率不高、製作工藝複雜，進而使得製作成本較高。另外，封膠體硬化後翹曲，影響封裝結構的平衡。
有鑑於此，本發明提供一種能夠解決上述問題的晶片封裝方法及晶片封裝結構。
一種晶片封裝方法，其包括步驟：提供一承載基板；在該承載基板上形成多個金屬柱及安裝至少一個晶片，多個該金屬柱分佈在至少一個該晶片的周圍，每個該晶片包括多個導電凸塊；形成一封膠體，該封膠體包覆多個該金屬柱及至少一個該晶片；去除該承載基板，形成一封裝基板；及在該封裝基板的一側形成一線路重置層；該線路重置層與至少部分該金屬柱及至少部分該導電凸塊電連接。
一種晶片封裝結構，該晶片封裝結構包括多個金屬柱、至少一晶片、一封膠體及一線路重置層，該封膠體包覆該金屬柱及該晶片，多個該金屬 柱均勻地分佈在該晶片的周圍，該晶片包括多個導電凸塊，該封膠體包括一第三表面，多個該金屬柱的一端及該多個該導電凸塊貫穿該第三表面，該線路重置層形成於該第三表面上，該線路重置層與至少部分該金屬柱及至少部分該導電凸塊電性連接。
本發明提供的晶片封裝方法及晶片封裝結構，1)先將晶片封裝在封膠體內，再在封膠體的外側形成線路重置層，避免了封膠體制程對線路重置層的損壞和影響，既提高了晶片封裝的良率，又降低了成本；2)將多個金屬柱分佈在晶片的周圍，既可以作為線路重置層與外部電子元件的電性連接通道，又可以支撐平衡封膠體，防止硬化後的封膠體的翹曲；3)將線路重置層形成在封膠體的裸露出晶片的導電凸塊的表面上，用封膠體代替了現有技術中的基板，簡化了制程，降低了成本。
100、300‧‧‧晶片封裝結構
10‧‧‧承載基板
11‧‧‧承載板
12‧‧‧晶種層
121‧‧‧第一表面
20‧‧‧金屬柱
30‧‧‧晶片
31‧‧‧第二表面
32‧‧‧導電凸塊
40‧‧‧封膠體
41‧‧‧第四表面
42‧‧‧第三表面
200‧‧‧封裝基板
210‧‧‧封裝基板中間體
50‧‧‧線路重置層
51‧‧‧絕緣層
60‧‧‧防焊層
61‧‧‧防焊開口
71‧‧‧第一焊球
72‧‧‧第二焊球
80‧‧‧外部電子元件
90‧‧‧導電盲孔
圖1是本發明第一實施例提供的一承載基板的剖視圖。
圖2是在圖1所示的承載基板的表面上形成金屬柱後的剖視圖。
圖3是將一晶片焊接到圖2所示的承載基板上，形成封裝基板中間體的剖視圖。
圖4是將圖3所示的金屬柱及晶片封裝在封膠體內的剖視圖。
圖5是將圖4形成的封膠體的表面進行拋光後的剖視圖。
圖6是將圖5所示的承載基板去除，形成封裝基板後的剖視圖。
圖7是在圖6所示的封裝基板的一個表面上形成一線路重置層後的剖視圖。
圖8在圖7所示的線路重置層及封膠體的表面進行表面封裝，形成晶片封裝結構後的剖視圖。
圖9是在圖4所示的封膠體的對應與金屬柱的位置形成一一對應的導電盲孔後的剖視圖。
圖10將圖9所示的承載基板去除，形成一第二封裝基板後的剖視圖。
圖11是在圖10所示的第二封裝基板的一個表面上形成一線路重置層後的剖視圖。
圖12是在圖11所示的線路重置層及第二封膠體的表面進行表面封裝，形成封裝結構後的剖視圖。
下面將結合附圖及實施例，對本技術方案提供的晶片封裝方法及晶片封裝結構作進一步的詳細說明。
請參閱圖1~圖8，本發明第一實施例提供的晶片封裝結構100的晶片封裝方法如下：
第一步，請參閱圖1，提供一承載基板10，該承載基板10包括一承載板11及一形成在該承載板11上的晶種層12。
該承載板11的材質為任何一種絕緣的具有承載作用的材料。在本實施例中，該承載板11的材質為聚醯亞胺(polyimide，PI)。在其他實施例中，該承載板11的材質還可以為聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate，PET)、聚萘二甲酸乙二醇酯(Polyethylene Naphthalate，PEN)或其他樹脂硬質材料。
該晶種層12可以為化學鍍銅層，也可以為原銅層。該晶種層12包括一第一表面121，該第一表面121遠離該承載板11。
第二步，請參閱圖2，在該第一表面121上形成多個金屬柱20。
具體地，可以通過影像轉移制程及電鍍制程形成多個該金屬柱20。也可以通過電鍍的方法直接電鍍形成多個該金屬柱20。在本實施例中，多個該金屬柱20是通過影像轉移制程及電鍍制程形成的。
該金屬柱20可以為銅柱，也可以為其他的導電的金屬柱。多個該金屬柱20既可以作為線路重置層50(見下文)與外部電子元件80(見下文)的電性連接通道，也可以起到支撐平衡封膠體40(見下文)的作用，以防止硬化後的封膠體40翹曲。該金屬柱20的形狀並不局限於柱狀，只要能起到上述作用即可。
第三步，請參閱圖3，提供至少一晶片30，並將該晶片30固接在該第一表面121上，進而形成一封裝基板中間體210。
具體地，多個該金屬柱20的高度略大於該晶片的高度，多個該金屬柱20均勻分佈在該晶片30的周圍。該晶片30包括一第二表面31，該第二表 面31面向該第一表面121且平行於該第一表面121。該第二表面31上還形成有多個導電凸塊32，該導電凸塊32固接在該晶種層12的第一表面121上。
第四步，請參閱圖4，在該承載基板10的形成有該金屬柱20及該晶片30的一側形成一封膠體40，使得該封膠體40包覆該金屬柱20及該晶片30。
該封膠體40包括一第三表面42。該第三表面42與該第一表面121相接觸。
在本實施例中，通過注塑成型的方式形成封膠體40。體地，首先提供一模具(圖未示)，該模具包括一模穴及一注膠通道，將包含有該金屬柱20及該晶片30的該承載基板10收容於該模穴內；然後，通過該注膠通道向該模穴內注入膠體，使膠體填充多個金屬柱20及至少一個該晶片30之間的間隙，使得該膠體包覆多個金屬柱20及至少一個該晶片30；接著，固化該膠體，從而形成該封膠體40；之後，將形成有該封膠體40的該封裝基板中間體210從該模穴中取出來。
第五步，請參閱圖5~6，去除該承載基板10，形成一封裝基板200。
首先，請參閱圖5，在去除該承載基板10之前，還需要對該封膠體40的遠離該承載基板10的一面進行拋光等表面處理，以形成一與該第三表面42相對的第四表面41，並使得多個該金屬柱20的一端從該封膠體40中裸露出來且與該第四表面41平齊。
其次，請參閱圖6，移除該承載基板10，形成該封裝基板200。
第六步，請參閱圖7，在該封裝基板200的該第三表面42上形成一線路重置層(redistribution layer，RDL)50及一包覆該線路重置層50的絕緣層51，並在該線路重置層50的遠離該封裝基板200的表面上形成一防焊層60。
該線路重置層50以封裝基板200作為構建RDL的基底，其允許部件被安裝並且相互之間進行通信，或者與外部器件進行通信。本實施例中，該線路重置層50通過電鍍的方法形成。該絕緣層51與該線路重置層50的遠離該封膠體40的表面平齊。該絕緣層51用於保護該線路重置層50。該防焊層60包括多個防焊開口61。
第七步，請參閱圖8，在多個該防焊開口61內填充導電材料並形成多個第一焊球71，在部分該金屬柱20的遠離該線路重置層50一端形成多個第二焊球72，進而形成一晶片封裝結構100。
多個該第一焊球71及多個第二焊球72均用於電連接外部電子元件80，該外部電子元件80可以為晶片、電路板等。也即是說，該線路重置層50可以直接電連接外部電子元件，也可以通過其他的介質(例如，導電凸塊或是金屬柱、焊球等)間接電連接外部電子元件。
該晶片封裝結構100屬於系統級封裝結構(System in package，SIP)。
具體地，請參閱圖8，一種晶片封裝結構100，該晶片封裝結構100屬於SIP結構。該晶片封裝結構100包括多個金屬柱20、至少一晶片30、一封膠體40、一線路重置層50、一絕緣層51、一防焊層60及外部電子元件80。該封膠體40包覆該金屬柱20及該晶片30，多個該金屬柱20貫穿該封膠體40，多個該金屬柱20均勻地分佈在該晶片30的周圍。每個該晶片30均包括一第二表面31，每個該第二表面31上形成有多個導電凸塊32。該封膠體40包括一第三表面42及一與第三表面42相對的第四表面41，該第四表面41遠離該第二表面31且與該第二表面31平行。該金屬柱20的兩端分別與該第三表面42及該第四表面41相平齊。該導電凸塊32的遠離該第二表面31的一端與該第三表面42平齊。該線路重置層50形成在該第三表面42上且與部分該金屬柱20及部分該導電凸塊32電性連接。該絕緣層51包覆該線路重置層50且與該線路重置層50的遠離該封膠體40的表面平齊。該絕緣層51用於保護該線路重置層50。該防焊層60形成在該線路重置層50的遠離該第三表面42的表面上，該防焊層60上形成有多個防焊開口61。多個該防焊開口61內形成有多個第一焊球71，多個該金屬柱20的遠離該線路重置層50的一端形成有多個第二焊球72，多個該第一焊球71及該第二焊球72均用於電連接該外部電子元件80。
該金屬柱20可以為銅柱，也可以為其他的導電的金屬柱。多個該金屬柱20既可以作為該線路重置層50與該外部電子元件80的電性連接通道，也可以支撐平衡該封膠體40，以防止硬化後的該封膠體40的翹曲。
該線路重置層50可以直接電連接外部電子元件，也可以通過其他的介質(例如，導電凸塊或是金屬柱、焊球等)間接電連接外部電子元件。本實施例中，該線路重置層50通過電鍍的方法形成。
請參閱圖9~12，本發明第二實施例提供的晶片封裝結構300的晶片封裝方法與上述第一實施例所提供的晶片封裝結構100的晶片封裝方法基本相同。不同之處在於，在第二實施例中，並未對該封膠體40進行拋光等處理，而是在與該金屬柱20相對應的位置形成了多個導電盲孔90。多個該導電盲孔90與多個該金屬柱20一一對應且電性連接。具體地，該導電盲孔90可利用鐳射開孔並電鍍形成。該晶片封裝結構300也屬於SIP結構。
具體地，請參閱圖11~12，一種晶片封裝結構300，該晶片封裝結構300屬於SIP結構。該晶片封裝結構300包括多個金屬柱20、至少一晶片30、一封膠體40、一線路重置層50、一絕緣層51、一防焊層60、多個導電盲孔90及外部電子元件80。該封膠體40包覆該金屬柱20及該晶片30，多個該金屬柱20貫穿該封膠體40，多個該金屬柱20均勻地分佈在該晶片30的周圍。每個該晶片30均包括一第二表面31，每個該第二表面31上形成有多個導電凸塊32。該封膠體40包括一第三表面42及一與該第三表面42相對的第四表面41，該第四表面41遠離該第二表面31且與該第二表面31平行。該金屬柱20的靠近該線路重置層50的一端與該第三表面42相平齊，該導電凸塊32的遠離該第二表面31的一端與該第三表面42平齊。該線路重置層50形成在該第三表面42上且與部分該金屬柱20及部分該導電凸塊32電性連接。該絕緣層51包覆該線路重置層50且與該線路重置層50的遠離該封膠體40的表面平齊。該絕緣層51用於保護該線路重置層50。該防焊層60形成在該線路重置層50的遠離該第三表面42的表面上，該防焊層60上形成有多個防焊開口61。該多個該導電盲孔90自該第四表面41向該封膠體40的內部凹陷，多個該導電盲孔90與多個該金屬柱20一一對應且電性連接。多個該防焊開口61內形成有多個第一焊球71，多個該導電盲孔90的開口所在的端面上形成有多個第二焊球72，多個該金屬柱20的遠離該線路重置層50的一端形成有多個第二焊球72，多個該第一焊球71及該第二焊球72均用於電連接該外部電子元件80。
該金屬柱20可以為銅柱，也可以為其他的導電的金屬柱，多個該金屬柱20既可以作為該線路重置層50與該外部電子元件80的電性連接通道，也可以支撐平衡該封膠體40，以防止硬化後的該封膠體40的翹曲。
該線路重置層50可以直接電連接外部電子元件，也可以通過其他的介質(例如，導電凸塊或是金屬柱等)間接電連接外部電子元件。本實施例中，該線路重置層50通過電鍍的方法形成。
本發明提供的晶片封裝方法及晶片封裝結構，1)先將晶片30封裝在封膠體40內，再在封膠體40的外側形成線路重置層50，避免了封膠體40制程對線路重置層50的損壞和影響，既提高了晶片封裝的良率，又降低了成本；2)將多個金屬柱20分佈在晶片30的周圍，既可以作為線路重置層50與外部電子元件80的電性連接通道，又可以支撐平衡封膠體40，防止硬化後的封膠體40的翹曲；3)將線路重置層50形成在封膠體40的裸露出晶片30的導電凸塊32的表面上，用封膠體40代替了現有技術中的基板，簡化了制程，降低了成本。
綜上所述，本發明確已符合發明專利之要件，遂依法提出專利申請。惟，以上所述者僅為本發明之較佳實施方式，自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士爰依本發明之精神所作之等效修飾或變化，皆應涵蓋於以下申請專利範圍內。
100‧‧‧晶片封裝結構
40‧‧‧封膠體
41‧‧‧第四表面
42‧‧‧第三表面
50‧‧‧線路重置層
51‧‧‧絕緣層
60‧‧‧防焊層
71‧‧‧第一焊球
72‧‧‧第二焊球
80‧‧‧外部電子元件

Claims (6)

  1. 一種晶片封裝方法，其包括步驟：提供一承載基板；在該承載基板上形成多個金屬柱及安裝至少一個晶片，多個該金屬柱分佈在至少一個該晶片的周圍，每個該晶片包括多個導電凸塊；形成一封膠體，該封膠體包覆多個該金屬柱及至少一個該晶片；該封膠體包括一第三表面及一與該第三表面相對的第四表面，該第三表面與該承載基板相接觸；在該第四表面上與多個該金屬柱相對應的位置形成多個導電盲孔並在多個該導電盲孔的遠離該金屬柱的一端形成多個第二焊球，多個該導電盲孔與多個該金屬柱一一對應且電性連接；去除該承載基板，形成一封裝基板；及在該封裝基板的一側形成一線路重置層；該線路重置層與至少部分該金屬柱及至少部分該導電凸塊電連接。
  2. 如請求項第1項所述的晶片封裝方法，其中，在形成該線路重置層之後，還包括步驟：在該封裝基板的表面上形成一包覆該線路重置層的絕緣層，該絕緣層與該線路重置層的遠離該封膠體的表面平齊；在該線路重置層的遠離該封裝基板的表面上形成一防焊層，該防焊層上形成有多個防焊開口，在該多個該防焊開口內形成多個第一焊球。
  3. 如請求項第1項所述的晶片封裝方法，其中，在形成該封膠體之後，去除該承載基板之前，還包括步驟：對該封膠體的遠離該承載基板的一面進行拋光處理，從而形成該第四表面，使得多個該金屬柱的遠離該承載基板的一端從該封膠體中裸露出來且與該第四表面平齊，並在與該第四表面平齊的部分該金屬柱的一端形成多個第二焊球。
  4. 一種晶片封裝結構，其中，該晶片封裝結構包括多個金屬柱、至少一晶片、一封膠體及一線路重置層，該封膠體包覆該金屬柱及該晶片，多個該金屬柱均勻地分佈在該晶片的周圍，該晶片包括多個導電凸塊，該封膠體包括一第三表面，多個該金屬柱的一端及該多個該導電凸塊貫穿該第三表面，該線路重置層形成於該第三表面上，該線路重置層與至少部分該金屬柱及至少 部分該導電凸塊電性連接；該晶片封裝結構還包括多個導電盲孔，多個該導電盲孔自該第四表面向該封膠體的內部凹陷，多個該導電盲孔與多個該金屬柱一一對應且電性連接，多個該導電盲孔的開口所在的端面上形成有多個第二焊球，多個該第二焊球用於電連接外部電子元件。
  5. 如請求項第4項所述的晶片封裝結構，其中，該晶片封裝結構還包括一包覆該線路重置層的絕緣層及一防焊層，該絕緣層與該線路重置層的遠離該封膠體的表面平齊，該防焊層形成於該線路重置層遠離該第三表面的一側，該防焊層上形成有多個防焊開口，該防焊開口內形成有多個第一焊球，該第一焊球用於連接外部電子元件。
  6. 如請求項第4項所述的晶片封裝結構，其中，該封膠體包括一與該第三表面相對的第四表面，該第四表面遠離該線路重置層；該金屬柱的兩端分別與該第四表面和該第三表面平齊，該導電凸塊的一端與該第三表面相平齊，多個該金屬柱的與該第四表面平齊的一端形成有多個第二焊球，多個該第二焊球用於電連接外部電子元件。
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