TWI595596B - 用於蝕刻低介電常數介電材料之非等向性材料損壞製程 - Google Patents

用於蝕刻低介電常數介電材料之非等向性材料損壞製程 Download PDF

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TWI595596B
TWI595596B TW104120480A TW104120480A TWI595596B TW I595596 B TWI595596 B TW I595596B TW 104120480 A TW104120480 A TW 104120480A TW 104120480 A TW104120480 A TW 104120480A TW I595596 B TWI595596 B TW I595596B
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dielectric material
conductive
recess
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埃羅爾 特德 萊恩
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格羅方德半導體公司
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Description

用於蝕刻低介電常數介電材料之非等向性材料損壞製程
本發明揭示的主要目的一般地是關於半導體裝置的製造，並且尤其是關於用於蝕刻低介電常數材料的非等向性材料損壞製程。
在現代積體電路中，最小特徵尺寸，諸如場效電晶體的通道長度，已經達到深次微米範圍，從而就速度及/或功率消耗及/或電路功能的多樣性方面穩定地增加這些電路的效能。當該個別的電路元件的尺寸顯著地減少時，從而改善例如該電晶體元件的切換速度，用於電性連接該個別的電路元件的內連線線路的可利用的表面間距(floor space)也同時減少。因此，這些內連線線路的尺寸及在金屬線路之間的間距必須減少，以補償可利用的表面間距的減少數量以及補償每個單元面積所提供的電路元件的增加數目。
在此類現代的積體電路中，裝置效能的限定因素在於通過該電晶體元件的切換速度所造成的信號傳 遞延遲。當這些電晶元件的通道長度現在已經達到50奈米或更小時，該信號傳遞延遲不再由該場效電晶體所限定。反而，因為該線路對線路電容值(C)增加並且該線路的電阻值(R)也由於本身縮減的截面面積而增加，該信號傳遞延遲是由於藉著該內連線線路的增加的電路密度所限定。因此，該寄生RC時間常數及在相鄰的金屬線路之間的電容耦合需要導入用於形成金屬化層的新類型的材料。
傳統上，金屬化層(意即，依據特定的電路佈局，包含金屬線路及用於提供該電路元件的電性連接的導孔的線路層)為通過以鋁作為典型金屬的包含例如二氧化矽及/或氮化矽的介電層堆疊而形成。由於鋁在具有極端比例的特徵尺寸的積體電路中所必要的較高電流密度下會遭受顯著的電遷移，所以鋁將由例如銅所取代，銅具有顯著較低的電性電阻及抗拒電遷移的較高抵抗性。對於高度複雜的應用，除了使用銅及/或銅合金之外，廣為接受且已知的介電材料二氧化矽(k4.2)及氮化矽(k>7)可以大量由所謂的具有相對介電常數接近3.0或更低的低介電常數材料所取代。然而，從已知且廣為接受的鋁/二氧化矽金屬化層至可能與低介電常數材料組合的銅基金屬化層的轉移將衍生許多待處理的問題。
例如，銅藉由廣為接受的沉積方法無法以有效率的方式沉積相對高的數量，諸如化學及物理氣相沉積。再者，銅不能藉由廣為接受的非等向性蝕刻製程而有效率地圖案化。因此，所謂的鑲嵌或嵌刻技術為時常使用 于形成包含銅線路及導孔的金屬化層。通常，在該鑲嵌技術中，該介電層經由沉積並且接著圖案化用於容納溝槽及導孔開孔，該溝槽及導孔開孔接著通過鍍膜方法，諸如電鍍或無電電鍍(化鍍)，以銅或合金填覆。再者，由於銅穩定地擴散於複數個介電物中，諸如二氧化矽及多種低介電常數介電物中，擴散阻障層在與相鄰的介電材料的介面處的形成可能是需要的。再者，由於銅穩定地反應以形成氧化部分，從而可能惡化該銅基材料線路關於接著性、傳導性及對抗電遷移的抵抗性的特性，水氣及氧的擴散進入該銅基材料必須受到抑制。
在傳導材料，諸如銅，的填覆進入該溝槽及導孔開孔期間，必須提供顯著程度的過填(overfill)，以從底部至頂部可靠地填覆該對應的開孔而沒有空隙及其它沉積相關的不平整。因此，在該金屬沉積製程之後，過多的材料可能必須移除並且最終表面輪廓將受到平坦化，例如，藉由使用電化學蝕刻技術、化學機械研磨(CMP,chemical mechanical polishing)及類似製程。例如，在化學機械研磨製程期間，顯著程度的機械應力可能施加至目前所形成的金屬化平面，該應力可能造成結構損壞至特定程度，尤其當使用降低的介電常數的複雜的介電材料時。如同之前所解釋的，在相鄰金屬線路之間的該電容耦合對於該半導體裝置的整體效能可能具有顯著的影響，尤其在金屬化平面上，該金屬線路實質上為“電容驅動”，意即，其中依據裝置需求必須提供複數個接近地間隔配置的金屬 線路。從而可能造成信號傳遞延遲及在相鄰金屬線路之間的信號干擾。基於這個理由，可以使用所謂的低介電常數材料或超低介電常數(ULK,ultra-low-k)材料，該材料可以提供3.0及更低的介電常數以增強該金屬化平面的整體的電性效能。另一方面，通常，該介電材料的降低的介電常數會衍生降低的機械穩定性，該情況需要複雜的圖案化格式以便不會過度地惡化該金屬化系統的可靠度。
然而，該特徵尺寸的持續減少，具有接近40奈米或更小的閘極長度，可能需要對應的介電材料的甚至更少的介電常數。基於這項理由，至少在臨界的裝置面積處已經有人提出導入“空氣間隙(air gaps)”，由於空氣或類似的氣體可以具有接近1.0的介電常數。
空氣間隙可以在相對於該金屬線路以下至特定深度的考量下，通過選擇性地蝕刻該金屬化層的該介電材料而形成。因此，自我對準技術可以通過使用在該金屬線路及該介電常數或超低介電常數材料之間的蝕刻選擇性而達成。然而，對於低介電常數或超低介電常數材料的蝕刻製程是複雜的。現有的蝕刻製程使用反應性離子電漿蝕刻製程(例如，使用NH3)。雖然該反應性離子蝕刻某些程度上是自我對準的，當該蝕刻進行時，仍然具有造成該金屬線路的底切的特性的非等向因素。此外，該反應性離子電漿蝕刻製程可能損壞形成在該金屬線路上方以避免該金屬的電遷移進入該介電材料內的覆蓋層，從而在該金屬線路及該覆蓋層之間的介面處造成可靠度問題。在該金屬 線路的角落區域內，該覆蓋層覆蓋圍繞該金屬線路的線路層的邊緣。針對該覆蓋層的損壞可能造成角落形成圓弧狀及來自缺陷導入至該線路內所衍生的額外的可靠度問題。
本發明是關於用於形成氣體間隙於金屬線路結構內的各種方法以便消除或減少上述所定義的一個或一個以上的問題的效應。
下文呈現本發明的簡單概述以提供本發明的某些目的的基本瞭解。本概述並非本發明的詳盡概觀。該概述並非意在界定本發明的特徵或關鍵要件或描述本發明的範疇。本概述的單純目的在於以簡化的形成呈現某些概念以作為後續討論的較詳細說明的序言。
一般而言，本發明揭示是關於形成傳導線路空氣間隙的各種方法。其中一種說明的方法包含形成遮罩層於介電材料上方或之內。該介電材料曝露在環境大氣中的光子輻射上，以產生該介電材料的損壞部分，其中該環境大氣包括碳吸附劑。該遮罩層阻擋該光子輻射。該介電材料的損壞部分將移除。
本發明的另一個說明的方法包含形成配置於第一介電材料內的複數個傳導線路。該第一介電材料曝露在環境大氣中的光子輻射上，以產生該第一介電材料的損壞部分，其中該環境大氣包括碳吸附劑。該傳導線路阻擋該光子輻射。該第一介電材料的損壞部分將移除以定義在該傳導線路之間的凹處。覆蓋層為形成在該傳導線路上 方而不填覆該凹處以定義在該傳導線路之間的空氣間隙。第二介電材料形成於該覆蓋層上方。
本發明的又一個說明的方法包含形成圖案化遮罩層於介電材料上方。該介電材料曝露在環境大氣中的光子輻射上，以產生該介電材料的損壞部分，其中該環境大氣包括碳吸附劑。該遮罩層阻擋該光子輻射。該介電材料的損壞部分將移除以定義在該介電材料內的凹處。該凹處將以傳導材料填覆。
100‧‧‧半導體裝置
105‧‧‧基板
110‧‧‧金屬化系統
115、120‧‧‧金屬化層
125、135‧‧‧介電材料
130‧‧‧材料層
137‧‧‧損壞區域
140‧‧‧硬式遮罩層
145‧‧‧開孔
150‧‧‧反應物光子曝光製程
152‧‧‧凹處
155A、155B‧‧‧傳導線路
160‧‧‧線路層
165‧‧‧金屬填覆材料
170、175‧‧‧覆蓋層
180‧‧‧硬式遮罩層
185‧‧‧第二反應物光子曝光製程
187‧‧‧損壞部分
188‧‧‧凹處
190‧‧‧覆蓋層
195‧‧‧介電層
本發明揭示通過參考結合附圖的下列說明將會瞭解，其中相同的元件符號定義類似的元件，並且其中：第1A至1K圖為描繪用於使用反應物光子曝光及蝕刻製程而形成空氣間隙結構的說明技術的截面圖。
雖然本發明在此所揭露的目的可輕易做各種修正及替代形式，本發明的特定實施例已經通過在該圖中的例子做呈現並且在此詳細說明。然而，應該要瞭解的是，在此說明的特定實施例並非意在限定本發明於所揭露的特定形式，而相反地，是意在含括落在通過附加的申請專利範圍所定義的本發明的精神及範疇之內的所有的修正、等同及替換。
本發明的各種說明的實施例於下文做描述。為了敍述明確的目的，並非所有實際實現的特徵將於 本說明書中做描述。當然將會瞭解的是，在任何此類實際實施例的發展中，必須做到各種特定實現的決定以達到該開發者的特定目標，諸如遵守系統相關的及業務相關的限制，該決定將隨著其中一個實現至另一個而變化。再者，將會瞭解的是，此類發展的努力可能是複雜的及耗時的，但是儘管如此對於一般熟習該項技藝的人士在瞭解本發明揭露的優點後，將是例行性的任務。
本發明的目的今將參考附加的圖式而做描述。各種結構、系統及裝置僅為了解釋的目的為概略地描述於該圖式中，並且以便對於熟習該項技藝的人士不隱蔽具有已知細節的本發明揭露。儘管如此，本發明包含附加的圖式以描述及解釋本發明揭露的說明例子。在此所使用的詞句及片語應該瞭解及解釋以具有與熟習相關技藝的人士所瞭解的詞句及片語一致的意義。本發明沒有特殊定義的名詞或片語，意即不同于熟習該項技藝的人士所瞭解的一般及傳統的意義的定義，是意在通過在此的名詞或片語的一致性的使用所隱含。在名詞或片語是意在具有特殊意義的某種程度上，意即並非由熟習技藝的人士所瞭解的意義，此類特殊的定義將於說明書中以定義的方式而明確地提出，該方式直接地及明確地提供用於該名詞及片語的特殊定義。本發明揭露是關於形成空氣間隙結構的各種方法。參照附加的圖式，在此所揭露的該方法及裝置的各種說明的實施例今將做更詳細的描述。
第1A至1K圖為說明用於在半導體裝置100 中形成氣體間隙結構的方法的截面圖示，在本實施例中，該裝置可以通過包含電路元件的積體電路所表示，諸如電晶體、電容器、電阻及類似元件。第1A圖說明包含形成於基板105內部及上方的裝置平面(未顯示)的半導體裝置100，其中，該半導體裝置100提供半導體基礎的電路元件。為了便利性，任何此類的電路元件並未提供於第1A圖中。該基板105也包含任何適當的微結構特徵，諸如微機構元件、光電子元件及類似的元件，其中，至少某些這類元件可能需要形成於金屬化系統110的內連線結構。在高度複雜的積體電路中，可能需要非常大量的電性連接，因此，複數個金屬化層115、120通常可以形成於該金屬化系統110中。例如，該金屬化層115、120可以表示金屬化系統110的複數個金屬化層的兩個，每一個該金屬化層依據所需的整體電路佈局可以連接至較低位置的金屬化層。在其他例子中，該金屬化系統110的該金屬化層115可以表示可包含適當的接觸元件的接觸結構，例如部分形成於含有金屬材料的基礎上，以連至裝置層內的半導體裝置。在這個例子中，該金屬化層115可以考量為一開始的金屬化層，而該金屬化層120可以考量為連接具有該實際的電路元件形成於該基板105之內或上方的該金屬化系統110的介面。
該金屬化層115可以包括介電材料125，該介電材料125可以以任何適當材料的形式而提供，諸如低介電常數材料、具有介電常數接近2.7或更高或超低介電常數(ULK)材料的介電材料、具有介電常數接近2.5或更低 的介電材料。該金屬化層120包含材料層130(例如SiCN或SiN)及介電材料135，該介電材料層可以類似於在該金屬化層115內的該介電材料125。
第1B圖說明在圖案化硬式遮罩層140(例如TiN、TEOS、SiN等等)形成於該介電材料135上方之後的半導體裝置100。該硬式遮罩層140可以通過沉積硬式遮罩材料、形成光阻層於該硬式遮罩材料上方、使用光學微影製程圖案化該光阻層以及蝕刻由該圖案化的光阻層曝露的該硬式遮罩材料而形成，以定義出開孔145。
第1C圖說明在反應物光子曝光製程150之後，該裝置經執行以在該介電材料135內產生損壞區域137。該反應物光子曝光製程150包含提供包含碳吸附劑(CGA,carbon gettering agent)的環境及同時以輻射源，諸如UV或VUV輻射源，照射該半導體裝置100。通常，來自該輻射源的光子分裂在該介電材料135內的鍵結，從而提供未連結的碳族群(例如甲基族群)。該碳吸附劑分子與該碳族群反應且避免該鍵結再度形成並且允許該吸附的碳離開該薄膜，造成在該介電材料135的曝光部分內的碳空乏(carbon depletion)。由於該碳吸附的結果，該介電材料135的損壞(碳空乏)部分137變成可溶解於濕式蝕刻溶液中。在說明的實施例中，該碳吸附劑可以是氧氣(O2)、氨氣(NH3)或能夠與通過該輻射所釋放及避免與該碳族群再度形成鍵結的該碳族群反應的其他氣體。該光子可以是准直光以便減少散射的可能性。因為，該碳吸附製程僅發生於曝露至 該准直輻射的區域內，相較於具有較高相對程度的損壞物種(離子、自由基)的散射的反應物離子電漿蝕刻製程，該反應物光子曝光製程150是高度非等向性的。該凹處152的深度可以基於該光子劑量(曝光強度及時間)及該輻射造成的穿透深度而控制。
第1D圖說明在執行濕式蝕刻製程(例如HF)之後以移除該介電材料135的該損壞部分137以形成凹處152的半導體裝置100。
第1E圖說明在執行數道製程之後以形成傳導線路155A、155B於該凹處152中的半導體裝置100。多重步驟的填覆製程形成線路層160(例如TaN、TiN、Ta等等)於該凹處152中，接著金屬填覆材料165(例如銅)以過填該凹處152。平坦化製程移除該過填及該硬式遮罩層140。覆蓋層170(例如AlN或Co)形成於該金屬填覆材料165及該線路層160的邊緣的上方。該線路層160及該覆蓋層170避免該金屬填覆材料165的擴散進入該介電材料135內。該覆蓋層170在後續的加工步驟期間也做為保護該金屬填覆材料165。
第1F圖說明在覆蓋層175(例如SiCN)形成於該介電材料135上方及圖案化硬式遮罩層180形成於選擇的金屬線路155A上方之後的半導體裝置100。該硬式遮罩層180可以包含堆疊層(stack)，諸如包含有機聚合物、SiNCH、TEOS及SiON的堆疊。該硬式遮罩層180可以使用光阻層及一道或多道蝕刻製程以移除在堆疊層中的各種層而圖案 化，從而該蝕刻製程當曝露出該覆蓋層175而終止。第1G圖說明在蝕刻製程經執行以移除未受該硬式遮罩層180(意即在該線路155B上方)所覆蓋的覆蓋層175以及另一個蝕刻製程經執行以移除該硬式遮罩層180的半導體裝置100。
第1H圖說明在第二反應物光子曝光製程185經執行以產生損壞部分187於該介電材料135中之後的半導體裝置100。再一次，該反應物光子曝光製程185包含提供包含碳吸附劑(CGA)及以輻射源，諸如UV或VUV輻射源，照射該半導體裝置100的環境。當O2使用做為該碳吸附劑時，AlN的使用避免銅的損壞，並且若銅未覆蓋時或者若Co使用做為覆蓋層時，NH3的使用做為該碳吸附劑避免銅的損壞。
第1I圖說明在執行濕式蝕刻製程(例如HF)以移除該介電材料135的該損壞部分187以在該金屬線路155B之間形成凹處188之後的半導體裝置100。
在該第二反應物光子曝光製程185期間，嵌入於該介電材料135內的該金屬線路155B對於製程185作為遮罩層，因此允許該凹處188為實質上自我對準於該金屬線路155B之間。再者，因為該反應物光子曝光製程185的增強的非等向性，該凹處188的深度可以大於該金屬線路155B的深度而不會實質上底切該金屬線路155B。再者，因為在該反應物光子曝光製程185中沒有粒子轟擊(particle bombardment)，相較於反應性離子電漿蝕刻製程，對於在該金屬線路155B上的該覆蓋層170的表面損壞也可 減少。
第1J圖說明執行均勻的沉積製程以形成覆蓋層190(例如SiCN)於該金屬線路155B上方之後的半導體裝置100。該覆蓋層190並未完全地填覆該凹處188，從而在該金屬線路155B之間產生氣體間隙。
第1K圖說明在額外的介電材料195形成於該金屬線路155A、155B上方之後的半導體裝置100。該介電材料195可以類似於該介電材料135。
在此所描述的用於形成氣體間隙結構的技術具有許多優點。因為用於圖案化該介電材料135的該蝕刻製程並未包含反應性離子轟擊成分，對於周圍結構或材料層的損壞可以降低。再者，該氣體間隙的深度可以增加以改善該半導體裝置100的操作特性。
上文所揭示的特定實施例僅為說明性質，如同對於熟習該項技藝的人士在具有本文在此所教示的優點後，顯而易見的是本發明可以做修正及以不同但是等同的方式而實施。例如，上文所提出的製程可以以不同的順序而實施。再者，在此所顯示的詳細架構或設計並非意在限定，除非是在所附的申請專利範圍中做描述。因此，明顯地，上文所揭露的特定實施例可以做變更或修正並且所有此類的改變應考量在本發明的範疇及精神之內。因此，在此所請求的保護在所附的申請專利範圍中提出。
100‧‧‧半導體裝置
105‧‧‧基板
110‧‧‧金屬化系統
115、120‧‧‧金屬化層
125、135‧‧‧介電材料
130‧‧‧材料層
140‧‧‧硬式遮罩層
152‧‧‧凹處

Claims (19)

  1. 一種製造半導體裝置之方法，包括：形成遮罩層於介電材料上方或之內，其中該遮罩層包括配置在該介電材料內的複數個傳導線路；曝露該介電材料於環境大氣中的光子輻射上，以產生該介電材料的損壞部分，其中，該環境大氣包括碳吸附劑且該遮罩層阻擋該光子輻射；以及移除該介電材料的該損壞部分且形成凹處於該些傳導線路之間的該介電材料內，其中該凹處之深度大於該些傳導線路底部的深度。
  2. 如申請專利範圍第1項所述的方法，其中，該遮罩層包括形成於該介電材料上方的圖案化硬式遮罩層。
  3. 如申請專利範圍第2項所述的方法，該方法更包括以傳導材料填覆該凹處。
  4. 如申請專利範圍第1項所述的方法，該方法更包括：形成覆蓋層於該傳導線路上方而不填覆該凹處以在該傳導線路之間定義出空氣間隙；以及形成第二介電材料於該覆蓋層上方。
  5. 如申請專利範圍第1項所述的方法，其中，移除該損壞部分包括執行濕式蝕刻製程。
  6. 如申請專利範圍第1項所述的方法，其中，該介電材料包括低介電常數材料或超低介電常數材料的其中一個。
  7. 一種製造半導體裝置之方法，包括：形成配置在第一介電材料內的複數個傳導線路； 曝露該第一介電材料於環境大氣中的光子輻射上，以產生該第一介電材料的損壞部分，其中，該環境大氣包括碳吸附劑且該傳導線路阻擋該光子輻射；移除該第一介電材料的該損壞部分，以定義出在該傳導線路之間的凹處，其中該凹處之深度大於該些傳導線路底部的深度；形成覆蓋層於該傳導線路上方而不填覆該凹處以在該傳導線路之間定義出空氣間隙；以及形成第二介電材料於該覆蓋層上方。
  8. 如申請專利範圍第7項所述的方法，其中，該碳吸附劑包括氧氣或氨氣的至少其中一個。
  9. 如申請專利範圍第7項所述的方法，其中，該傳導線路包括配置在傳導填覆材料上方的第二覆蓋層。
  10. 如申請專利範圍第9項所述的方法，其中，該第二覆蓋層包括氮化鋁並且該碳吸附劑包括氧氣或氨氣。
  11. 如申請專利範圍第9項所述的方法，其中，該第二覆蓋層包括鈷並且該碳吸附劑包括氨氣。
  12. 如申請專利範圍第9項所述的方法，其中，該傳導線路包括配置在該傳導填覆材料及該第一介電材料之間的線路層。
  13. 如申請專利範圍第12項所述的方法，其中，該第二覆蓋層覆蓋該線路層的邊緣。
  14. 如申請專利範圍第7項所述的方法，其中，該傳導線路包括銅。
  15. 如申請專利範圍第7項所述的方法，其中，移除該損壞部分包括執行濕式蝕刻製程。
  16. 一種製造半導體裝置之方法，包括：形成圖案化遮罩層於介電材料上方，其中該圖案化遮罩層包括配置在該介電材料內的複數個傳導線路；曝露該介電材料於環境大氣中的光子輻射上，以產生該介電材料的損壞部分，其中，該環境大氣包括碳吸附劑且該遮罩層阻擋該光子輻射；移除該介電材料的該損壞部分以定義出凹處於該介電材料內，其中該凹處之深度大於該些傳導線路底部的深度；以及以傳導材料填覆該凹處。
  17. 如申請專利範圍第16項所述的方法，其中，該傳導材料包括銅。
  18. 如申請專利範圍第16項所述的方法，其中，該碳吸附劑包括氧氣或氨氣的至少其中一個。
  19. 如申請專利範圍第16項所述的方法，其中，移除該損壞部分包括執行濕式蝕刻製程。
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