TWI587462B - 半導體裝置的製造方法 - Google Patents

半導體裝置的製造方法 Download PDF

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Publication number
TWI587462B
TWI587462B TW103100148A TW103100148A TWI587462B TW I587462 B TWI587462 B TW I587462B TW 103100148 A TW103100148 A TW 103100148A TW 103100148 A TW103100148 A TW 103100148A TW I587462 B TWI587462 B TW I587462B
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Taiwan
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connector
circuit board
printed circuit
molding material
polymer
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TW103100148A
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English (en)
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TW201436139A (zh
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陳憲偉
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台灣積體電路製造股份有限公司
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Description

半導體裝置的製造方法
本發明係有關於一種半導體技術，特別是有關於一種封裝結構連接至印刷電路板上的半導體裝置及其製造方法。
積體電路(integrated circuit，IC)為製造於由半導體材料所構成的薄基板的表面內的一種電子電路。積體電路幾乎用於現今所有的電子設備中，且已徹底改變世界上的電子產品。積體電路的製造成本低，使得電腦、手機及其他數位家電成為現代社會的結構不可分割的一部份。
積體電路組裝於封裝結構內。積體電路的封裝保護積體電路晶粒避免遭受物理性損壞，且將組裝結構內的輸入/輸出(input/output，I/O)端重新分配為更易於管理的間距。積體電路封裝結構也提供其他功能，例如提供更適合於標準化的結構、提供遠離晶粒的導熱路徑、提供避免發生α粒子造成軟錯誤(soft error)的可能的保護以及提供更容易電性測試及預燒(burn-in)的結構。目前的積體電路封裝技術包括方型扁平封裝(quad flat pack，QFP)、針柵陣列封裝(pin grid array，PGA)、球柵陣列封裝(ball grid array，BGA)、覆晶封裝(flip chips，FC)、三維積體電路(three dimensional integrated circuits，3DIC)、晶片級封裝及堆疊封裝(package on package，PoP)裝置。
接著，封裝裝置貼附至印刷電路板(printed circuit board，PCB)。印刷電路板用來作為基底框架，以物理性支撐及電性連接電子部件，例如使用由層疊於非導電的基板的銅片蝕刻而來的導電通路、路徑或訊號引線，電性連接積體電路封裝結構。表面貼裝技術(surface-mount technology，SMT)是一種建構電子電路的方法，其中積體電路封裝結構直接貼裝於印刷電路板的表面上。在表面貼裝技術中，部件(例如，積體電路封裝結構)放置於印刷電路板的接觸墊上，然後透過連接器(例如，焊球)，電性及物理性耦接至印刷電路板。
用於貼附部件的技術有很多，例如將積體電路封裝結構貼附至印刷電路板。然而，目前將連接器與印刷電路板的接觸墊或預焊料(pre-solder)連接的技術，會使得連接器與印刷電路板的接觸墊之間出現某些銳角，而缺口造成連接器與印刷電路板的接觸墊之間的應力集中，進而導致接點不平滑。銳角可能導致連接器與印刷電路板的接觸墊之間的連接出現球型破裂點。僅使用模塑成型材料可能不能夠有效地減少球型破裂點。因此，需要一種將積體電路封裝結構貼附至印刷電路板而能夠形成平滑的焊料接點的裝置及製造方法。
本發明係提供一種半導體裝置的製造方法，包括提供包括一連接器及一積體電路的一積體電路封裝結構。提供包括一印刷電路板的接觸墊的一印刷電路板。提供一高分子助 焊劑。在印刷電路板的接觸墊與連接器之間形成一連接結構，其中高分子助焊劑覆蓋至少一部份的連接器。
本發明係提供一種積體電路封裝結構，包括一積體電路封裝結構，其包括一連接器及一積體電路。一印刷電路板包括一印刷電路板的接觸墊。一連接結構位於印刷電路板的接觸墊與連接器之間。一高分子成份覆蓋至少一部份的連接器。
本發明係提供另一種半導體裝置的製造方法，包括提供包括一連接器及一積體電路的一積體電路封裝結構。提供包括一印刷電路板的接觸墊的一印刷電路板。在連接器上提供一高分子助焊劑。透過連接器與印刷電路板的接觸墊之間的高分子助焊劑，連接印刷電路板的接觸墊與連接器。對半導體裝置進行迴流製程，在連接器與印刷電路板的接觸墊之間形成一連接結構，其中高分子助焊劑覆蓋至少一部份的連接器。
101、103、105、107、1051、1053‧‧‧步驟
200‧‧‧(積體電路)封裝結構
201‧‧‧基板
202‧‧‧接觸墊
203‧‧‧鈍化護層
205‧‧‧高分子層
209‧‧‧凸塊下金屬墊
211‧‧‧模塑成型材料
213‧‧‧連接器/焊球
215‧‧‧高分子助焊劑
300‧‧‧印刷電路板
301‧‧‧基板
303‧‧‧防焊層
305‧‧‧接觸墊
307‧‧‧預焊料
2071‧‧‧重分佈層
H‧‧‧高度
T‧‧‧厚度
W‧‧‧寬度
第1圖係繪示出本發明實施例之將積體電路封裝結構貼附至印刷電路板的方法的流程圖。
第2A至2G圖係繪示出本發明實施例之積體電路封裝結構的連接器貼附至印刷電路板的接觸墊的方法及裝置的剖面示意圖。
以下詳細說明本發明實施例之製作與使用。然而，可輕易了解本發明實施例提供許多合適的發明概念而可實 施於廣泛的各種特定背景。所揭示的特定實施例僅僅用於說明以特定方法製作及使用本發明，並非用以侷限本發明的範圍。
本發明揭露一種將積體電路封裝結構貼附至印刷電路板而形成平滑的焊料接點的裝置及方法。可在製程中提供高分子助焊劑(例如，環氧樹脂助焊劑)，以將積體電路封裝結構貼裝至印刷電路板上。可提供高分子助焊劑於積體電路封裝結構的連接器上或印刷電路板的印刷電路板的接觸墊上。當積體電路封裝結構貼裝至印刷電路板上時，高分子助焊劑可覆蓋一部分的連接器，且可延伸而覆蓋積體電路封裝結構上的模塑成型材料的表面。高分子助焊劑也可完全覆蓋連接器。高分子助焊劑提供有利於平滑焊料接點的形成的助焊劑成份，以及對各個連接器進行封膠進而增加裝置保護的高分子成份。
可以理解的是，當一元件或膜層描述為“在”、“連接至”或“耦接至”另一元件或膜層時，可為直接形成在另一元件或膜層上，或是直接連接或耦接至另一元件或膜層，也可存在中間元件或中間膜層。相反地，當一元件或膜層描述為“直接在”、“直接連接至”或“直接耦接至”另一元件或膜層時，則不存在中間元件或中間膜層。
可以理解的是，雖然用語“第一”、“第二”、“第三”等可用來描述各種元件、部件、區域、膜層及/或部份，但這些元件、部件、區域、膜層及/或部份不應限定於上述用語。這些用語僅用於區分一元件、部件、區域、膜層或部份與另一區域、膜層或部份。因此，以下所述的第一元件、部件、區域、膜層或部份也可稱為第二元件、部件、區域、膜層 或部份，而未超出本發明概念的教示。
為了方便描述圖式中一元件或特徵部件與另一(複數)元件或(複數)特徵部件的關係，可使用空間相關用語，例如“在...之下”、“下方”、“下部”、“上方”、“上部”及類似的用語等。可以理解的是，除了圖式所繪示的方位之外，空間相關用語涵蓋使用或操作中的裝置的不同方位。例如，若翻轉圖式中的裝置，描述為位於其他元件或特徵部件“下方”或“在...之下”的元件，將定位為位於其他元件或特徵部件“上方”。因此，範例的用語“下方”可涵蓋上方及下方的方位。所述裝置也可被另外定位(例如，旋轉90度或者位於其他方位)，並對應地解讀所使用的空間相關用語的描述。
本發明說明書所使用的術語僅為了描述特定實施例，而並非用來限定本發明。除非本文清楚地說明，否則所使用的單數形式“一”及“該”也包括複數形式。可進一步地理解，本發明說明書所使用的用語“包括”及/或“具有”，具體描述出特徵、整體、步驟、操作方法、部件及/或元件的存在，但不排除存在或增加一個或多個的其他特徵、整體、步驟、操作方法、部件、元件及/或其群組。
本說明書全文中所提及關於“一實施例”的意思是指有關於本實施例中所提及特定的特徵(feature)、結構、或特色係包含於本發明的至少一實施例中。因此，本說明書全文中各處所出現的“在一實施例中”用語所指的並不全然表示為相同的實施例。再者，特定的特徵、結構、或特色能以任何適當方式而與一或多個實施例作結合。可以理解的是以下的 圖式並未依照比例繪示，而僅僅提供說明之用。
第1圖係繪示出本發明實施例之將積體電路封裝結構貼附至印刷電路板(printed circuit board，PCB)的方法的流程圖。步驟101為提供一積體電路封裝結構。步驟103為提供一印刷電路板。步驟105為提供一高分子助焊劑，高分子助焊劑可為環氧樹脂助焊劑。提供高分子助焊劑的方法有很多。步驟1051所示的一種方法是提供高分子助焊劑於連接器(例如，積體電路封裝結構的焊球)上，而步驟1053所示的另一種方法是提供高分子助焊劑於印刷電路板的接觸墊及預焊料上。可選擇性地提供高分子助焊劑於預焊料上。可僅提供高分子助焊劑於印刷電路板的接觸墊上，而不提供於預焊料上。步驟107為將印刷電路板及積體電路封裝結構連接在一起，以在連接器(例如，焊球及印刷電路板上的預焊料)之間形成一連接結構。可透過表面貼裝技術，連接印刷電路板及積體電路封裝結構。可透過覆蓋連接器或印刷電路板的接觸墊的高分子助焊劑，將連接器(例如，積體電路封裝結構的焊球)貼裝至印刷電路板的接觸墊，接著對積體電路封裝結構的連接器及印刷電路板的印刷電路板的接觸墊進行迴流製程，以形成連接結構，進而連接印刷電路板及積體電路封裝結構。以下配合第2A至2G圖詳細說明。
根據第1圖中的流程圖，步驟101為提供一積體電路封裝結構。第2A圖係繪示出具有一連接器(例如，焊球)的一積體電路封裝結構200。積體電路封裝結構200可能具有更多的連接器，但並未繪示出。積體電路封裝結構200可為任何一 種封裝結構，例如方型扁平封裝(QFP)、針柵陣列封裝(PGA)、球柵陣列封裝(BGA)、覆晶封裝(FC)、三維積體電路(3DIC)、晶片級封裝及堆疊封裝(PoP)裝置。
如第2A圖所示，積體電路封裝結構200包括一基板201及基板201上的接觸墊202，其可為包含於封裝結構200內的積體電路的一部分。一鈍化護層203覆蓋基板201，且暴露出接觸墊202。一高分子層205可形成於鈍化護層203上。一層或複數層重分佈層(redistribution layer，RDL)2071可形成於高分子層205上，且與接觸墊202接觸。一凸塊下金屬(under bump metal，UBM)墊209可形成於重分佈層2071上。一連接器(例如，焊球)213可放置於凸塊下金屬墊209上。一模塑成型材料211可覆蓋重分佈層2071、高分子層205及一部分的連接器213。
積體電路封裝結構200可為基底半導體晶圓的一部分，基底半導體晶圓包含未繪示出的額外的半導體積體電路。根據電路的電性設計，積體電路封裝結構200可進一步包含主動及被動裝置、導電層及介電層。積體電路封裝結構200的長度僅是用於說明的目的，且未依比例繪製。
基板201可包括矽塊材、摻雜或非摻雜或是絕緣層上覆矽(silicon-on-insulator,SOI)基板的主動層。一般而言，絕緣層上覆矽基板包括一層半導體材料(例如，矽、鍺、矽鍺、絕緣層上覆矽、絕緣層上覆矽鍺(silicon germanium on insulator，SGOI)或其組合)。也可使用其他基板，包括多層基板、漸變(gradient)基板或混合定向(hybrid orientation)基板。基板201可包括主動裝置(例如，電晶體或淺溝槽隔離 (shallow trench isolation，STI)區)以及其他的被動裝置。
接觸墊202可形成於基板201的表面上，基板201連接至基板內或基板上方的金屬接觸窗(未繪示)。接觸墊202可由鋁(Al)、銅(Cu)或其他導電材料所構成。可使用電解電鍍製程、濺鍍製程或無電鍍製程，沉積接觸墊202。接觸墊202的尺寸、形狀及位置僅用於說明目的，並不限定於此。接觸墊202的厚度可大約為0.5μm至4μm的範圍，例如，大約為1.45μm。
為了結構支撐及物理隔離，鈍化護層203可形成於接觸墊202上及基板201上方。鈍化護層203可由氮化矽(SiN)、二氧化矽(SiO2)、氮氧化矽(SiON)或其他絕緣材料所構成。可透過使用罩幕定義(mask-defined)光阻的蝕刻製程，去除一部分的鈍化護層203，形成鈍化護層203的開口，以暴露出接觸墊202。開口的尺寸、形狀及位置僅用於說明目的，並不限定於此。可透過化學氣相沉積(chemical vapor deposition，CVD)製程形成鈍化護層203，但也可使用任何合適的方法，且鈍化護層203的厚度可大約為0.5μm至5μm的範圍(例如，大約為9.25KÅ)。
一高分子層205可形成於鈍化護層203上方。高分子層205可由高分子材料(例如，環氧樹脂、聚酰亞胺、苯環丁烯(benzocyclobutene，BCB)，聚苯噁唑(polybenzoxazole，PBO)及類似的材料)所構成，但也可使用其他相對較軟、通常為有機的介電材料。高分子層205的形成方法包括旋轉塗佈或其他常用的方法。例如，高分子層205的厚度可大約為5μm 至30μm的範圍。可透過使用罩幕定義光阻的蝕刻製程，去除一部分的高分子層205，形成高分子層205的開口，以暴露出接觸墊202。
一金屬材料用以形成後鈍化護層內連(post passivation interconnect，PPI)線或於高分子層205上順應高分子層205的表面輪廓的重分佈層(RDL)2071。重分佈層2071可由鈦、鋁、鎳、鎳釩(NiV)、銅或銅合金所構成。重分佈層2071的形成方法包括電解電鍍製程、無電鍍製程、濺鍍製程、化學氣相沉積法或類似的方法。重分佈層2071可為單層或或使用黏著層(例如，鈦、鈦鎢或銅)的多層結構。例如，重分佈層2071的高度可大約為2μm至10μm的範圍。重分佈層2071的高度僅用於說明目的，並不限定於此。
凸塊下金屬墊209可與重分佈層2071形成電性接觸。凸塊下金屬墊209可包括一導電材料層(例如，鈦層或鎳層)。凸塊下金屬墊209也可包括多個子層(未繪示)。任何多個材料層(例如，鈦(Ti)、鉭(Ta)、氮化鉭(TaN)、鎳(Ni)或銅(Cu))，可適用於形成凸塊下金屬墊209。任何用於形成凸塊下金屬墊209的適合的材料或材料層皆可涵蓋於本發明實施例的範圍內。形成凸塊下金屬墊209的製程(例如，濺鍍製程或蒸鍍製程)，取決於所需的材料。凸塊下金屬墊209的厚度可大約為0.01μm至10μm的範圍(例如，大約為5μm)。
連接器(例如，焊球或凸塊)213可放置於凸塊下金屬墊209上。在覆晶封裝技術或其他類型的IC封裝技術中，焊料凸塊廣泛地用於形成電性內連接。可使用各種尺寸的焊球 或凸塊。直徑大小大約為200μm至500μm範圍的焊球可稱為封裝凸塊，且用於將積體電路封裝結構連接至印刷電路板。隨著特徵尺寸及封裝尺寸不斷地降低，焊球或凸塊的尺寸可能比上述的尺寸更小。另外，可在凸塊下金屬墊209上方放置連接器而非焊球，來形成電性連接。在本發明實施例中，任何其他適合的連接器可取代所述之“焊球”。
連接器213可為包括導電焊料(例如，錫、鎳、金、銀、銅、鉍(Bi)及其合金或其他導電材料的組合)的焊球。例如，連接器213可為銅/錫銀焊球。另外，也可使用銅凸塊取代焊球作為連接器213。
模塑成型材料211可覆蓋重分佈層2071、高分子層205及一部分的連接器213。可使用模塑成型裝置，形成模塑成型材料211。例如，積體電路封裝結構200可放置於模塑成型裝置的腔室內，且可密封腔室。可在密封腔室之前將模塑成型材料211放置於腔室內，或是透過注射口將模塑成型材料211注入腔室內。在一實施例中，模塑成型材料可為聚酰亞胺、聚苯硫醚(polyphenylene sulfide，PPS)、聚醚碸(polyether sulfone，PES)、聚醚醚酮(polyether ether ketone，PEEK)、耐熱結晶樹脂、上述之組合或類似的材料。為了得到最佳的保護，可固化模塑成型材料211，以硬化模塑成型材料211。實際的固化製程至少部分取決於模塑成型材料211所選擇的特定材料。在一實施例中，可透過對模塑成型材料211加熱至大約100℃至130℃的範圍(例如，大約為125℃)，且加熱大約60秒至3000秒的範圍(例如，大約為600秒)，而將模塑成型材料211固化。另 外，模塑成型材料211內可包含引發劑(initiator)及/或催化劑，以利於控制固化製程。
然而，本發明所屬技術領域中具有通常知識者可以理解的是，上述固化製程僅作為說明而並非用以侷限本發明實施例的範圍。也可使用其他固化製程，例如，透過輻射或甚至在室溫下將模塑成型材料211硬化。可使用任何適合的固化製程，且所有上述製程皆涵蓋於本發明實施例的範圍內。
根據第1圖中的流程圖，步驟103為提供一印刷電路板。第2B圖係繪示出印刷電路板300的剖面示意圖。例如，印刷電路板300可為主機板(motherboard)、通訊板或模組基板。印刷電路板300用來作為基底框架，以物理性支撐及電性連接電子部件，例如使用由層疊於非導電的基板的銅片蝕刻而來的導電通路、路徑或訊號引線，電性連接積體電路封裝結構。印刷電路板300包括印刷電路板的基板301。印刷電路板的基板301具有用來表面貼裝的一表面。印刷電路板內的導電層可由薄銅箔所構成，而通常使用環氧樹脂將絕緣介電層層壓在一起。
防焊層303形成於印刷電路板的基板301的表面上，以覆蓋印刷電路板的基板上不應被焊接的區域。防焊層303可為高分子焊料阻劑，其塗佈的厚度通常為20μm至30μm的範圍。防焊層303有助於防止導體之間發生焊料橋接及短路。防焊層303也提供了外在環境的防護。
複數印刷電路板的複數接觸墊305形成於印刷電路板的基板301的表面上(此處僅繪示出一個接觸墊305)。防 焊層303具有複數暴露出接觸墊305的開口。印刷電路板的接觸墊305可由鋁(Al)、銅(Cu)、錫(Sn)、鎳(Ni)、金(Au)、銀(Ag)或其他導電材料。
複數預焊料307形成於印刷電路板的接觸墊305上。可透過網版印刷製程或孔版(stencil)印刷製程，形成預焊料。預焊料307可包括無電鍍鎳金、無電鍍鎳磷金或無電鍍鎳鈀金的材料。預焊錫307的厚度可大約為20μm至30μm的範圍。預焊料307為非必要的。可不需預焊料307而形成封裝結構。
根據第1圖中的流程圖，步驟105為提供一高分子助焊劑。高分子助焊劑可為環氧樹脂助焊劑。提供高分子助焊劑的方法有很多。第1圖中的步驟1051所示的一種方法是提供高分子助焊劑215於積體電路封裝結構的連接器213上，如第2C圖所示。第1圖中的步驟1053所示的另一種方法是提供高分子助焊劑215於印刷電路板的接觸墊305及預焊料307上，如第2D圖所示。高分子助焊劑215包括一助焊劑成份及一高分子成份。該高分子成份可為環氧樹脂。助焊劑成份有利於形成焊料接點，而高分子成份可藉由對各個連接器213進行封膠進而增加積體電路封裝結構的保護。助焊劑成份並不存在於最後階段。高分子助焊劑215也提供沉積製程的選擇彈性，可根據實際應用及製程的需要，透過網版印刷製程、浸塗製程、噴墨製程或點膠製程，提供高分子助焊劑215。高分子助焊劑215僅密封各個連接器213，而保留積體電路封裝結構下方的通道，以允許揮發性氣體從基板逸出，且仍然能夠保護焊料接點。
根據第1圖中的流程圖，步驟107為將印刷電路板 及積體電路封裝結構連接在一起，以在連接器及印刷電路板上的預焊料之間形成一連接結構。可透過表面貼裝技術，連接印刷電路板及積體電路封裝結構。可透過焊球213及預焊料307之間的高分子助焊劑215，將連接器(例如，積體電路封裝結構200的焊球213)貼裝至印刷電路板的接觸墊305，而印刷電路板300及積體電路封裝結構200。接著，進行迴流製程，以連接積體電路封裝結構200的連接器213及印刷電路板300的預焊料307。在迴流製程期間，可將貼附積體電路封裝結構200的印刷電路板300置入烘箱，並逐步加熱升溫，使焊球及預焊料變為液態。當焊球及預焊料為液態時，焊球及預焊料與印刷電路板的接觸墊305形成電性接觸。
在積體電路封裝結構貼裝至印刷電路板上之後的步驟107的結果繪示於第2E至2G圖。當提供高分子助焊劑215於連接器213上時，如第2C圖所示，在積體電路封裝結構200貼裝至印刷電路板300上之後，高分子助焊劑215可覆蓋一部分的連接器213，如第2E圖所示。如第2E圖所示，高分子助焊劑215圍繞連接器213的寬度W可大約為15μm至30μm的範圍。高分子助焊劑215的高度H可大約為5μm至50μm的範圍。另外，高分子助焊劑215可覆蓋模塑成型材料211的表面的一部分，其覆蓋的高度可大約為1μm至3μm的範圍，如第2F圖所示。
另外，當提供高分子助焊劑215於印刷電路板的預焊料307上時，如第2D圖所示，在積體電路封裝結構200貼裝至印刷電路板300上之後，高分子助焊劑215可覆蓋整個連接器 213，如第2G圖所示。高分子助焊劑215的厚度T可大約為5μm至20μm的範圍。
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神及範圍內，當可作更動、替代與潤飾。舉例來說，任何所屬技術領域中具有通常知識者可輕易理解此處所述的許多特徵、功能、製程及材料可在本發明的範圍內作更動。再者，本發明之保護範圍並未侷限於說明書內所述特定實施例中的製程、機器、製造、物質組成、裝置、方法及步驟，任何所屬技術領域中具有通常知識者可從本發明揭示內容中理解現行或未來所發展出的製程、機器、製造、物質組成、裝置、方法及步驟，只要可以在此處所述實施例中實施大體相同功能或獲得大體相同結果皆可使用於本發明中。因此，本發明之保護範圍包括上述製程、機器、製造、物質組成、裝置、方法及步驟。另外，每一申請專利範圍構成個別的實施例，且本發明之保護範圍也包括各個申請專利範圍及實施例的組合。
201‧‧‧基板
202‧‧‧接觸墊
203‧‧‧鈍化護層
205‧‧‧高分子層
209‧‧‧凸塊下金屬墊
211‧‧‧模塑成型材料
213‧‧‧連接器/焊球
215‧‧‧高分子助焊劑
301‧‧‧基板
303‧‧‧防焊層
305‧‧‧接觸墊
307‧‧‧預焊料
2071‧‧‧重分佈層
T‧‧‧厚度

Claims (10)

  1. 一種半導體裝置的製造方法，包括：提供包括一連接器及一積體電路的一積體電路封裝結構；在該連接器上形成一模塑成型材料，其中該模塑成型材料封住該連接器的一第一部份，且該連接器的一第二部份突出於該模塑成型材料的一頂表面；提供包括一印刷電路板的接觸墊的一印刷電路板；在形成該模塑成型材料之後，在該連接器的該第二部份上提供一高分子助焊劑；以及在形成該模塑成型材料之後，在該印刷電路板的接觸墊與該連接器之間形成一連接結構，其中該高分子助焊劑至少局部覆蓋該連接器的該第二部份且延伸至該模塑成型材料的該頂表面上，並在該印刷電路板與該模塑成型材料的該頂表面之間保留通道。
  2. 如申請專利範圍第1項所述之半導體裝置的製造方法，包括：提供一預焊料於該印刷電路板的接觸墊上；以及在該印刷電路板的接觸墊上的該預焊料與該連接器之間形成該連接結構。
  3. 如申請專利範圍第1項所述之半導體裝置的製造方法，其中該高分子助焊劑在該頂表面上的寬度小於高度。
  4. 如申請專利範圍第1項所述之半導體裝置的製造方法，其中覆蓋該連接器的該第二部份的該高分子助焊劑的厚度為5微米至20微米的範圍，且高度為5微米至50微米的範圍，且 該高分子助焊劑包括一助焊劑成份及一高分子成份，且其中該連接器由一導電焊料材料所構成，該導電焊料材料選自由錫、鎳、金、銀、銅、鉍、合金及其組合所組成的群組中之一者。
  5. 如申請專利範圍第1項所述之半導體裝置的製造方法，其中該積體電路封裝結構更包括：一基板；一鈍化護層，位於該基板上；一重分佈層，位於該鈍化護層上；以及一凸塊下金屬墊，位於連接至該連接器的該重分佈層上。
  6. 一種半導體裝置的製造方法，包括：提供一積體電路封裝結構，其包括一連接器及一積體電路，該連接器由一模塑成型材料封住，其中該連接器的一部份突出於該模塑成型材料的一頂表面；提供一印刷電路板，其包括一印刷電路板的接觸墊；在突出於該頂表面的該連接器的該部份或該印刷電路板的接觸墊上提供一高分子成份；以及形成一連接結構於該印刷電路板的接觸墊與該連接器之間，其中在形成該連接結構期間該高分子成份在該印刷電路板與該模塑成型材料的該頂表面之間保留通道。
  7. 如申請專利範圍第6項所述之半導體裝置的製造方法，更包括：提供一預焊料位於該印刷電路板的接觸墊上，其中位於該印刷電路板的接觸墊與該連接器之間的該連接結構位於該 印刷電路板的接觸墊上的該預焊料與該連接器之間。
  8. 如申請專利範圍第6項所述之半導體裝置的製造方法，其中提供於該連接器的該部份上的該高分子成份的厚度為5微米至20微米的範圍，且高度為5微米至50微米的範圍，且其中該高分子成份包括環氧樹脂。
  9. 如申請專利範圍第6項所述之半導體裝置的製造方法，其中該積體電路封裝結構更包括：一基板；一鈍化護層，位於該基板上；一重分佈層，位於該鈍化護層上；以及一凸塊下金屬墊，位於連接至該連接器的該重分佈層上。
  10. 一種半導體裝置的製造方法，包括：提供包括一連接器及一積體電路的一積體電路封裝結構，該連接器由一模塑成型材料封住，其中該連接器的一部份突出於該模塑成型材料的一頂表面；提供包括一印刷電路板的接觸墊的一印刷電路板；在突出於該模塑成型材料的該頂表面的該連接器的該部份上提供一高分子助焊劑；透過該高分子助焊劑，連接該印刷電路板的接觸墊與該連接器；以及對半導體裝置進行迴流製程，在該連接器與該印刷電路板的接觸墊之間形成一連接結構，其中在迴流製程期間該高分子助焊劑在該印刷電路板與該模塑成型材料的該頂表面之間保留通道，且該高分子助焊劑覆蓋至少一部份的該連 接器且延伸至該模塑成型材料的該頂表面上。
TW103100148A 2013-03-07 2014-01-03 半導體裝置的製造方法 TWI587462B (zh)

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US10068873B2 (en) 2018-09-04
US9224678B2 (en) 2015-12-29
US20170301645A1 (en) 2017-10-19
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