TWI587393B - 無障蔽單相互連體 - Google Patents
無障蔽單相互連體 Download PDFInfo
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- TWI587393B TWI587393B TW100145773A TW100145773A TWI587393B TW I587393 B TWI587393 B TW I587393B TW 100145773 A TW100145773 A TW 100145773A TW 100145773 A TW100145773 A TW 100145773A TW I587393 B TWI587393 B TW I587393B
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- 229910052751 metal Inorganic materials 0.000 claims description 61
- 239000002184 metal Substances 0.000 claims description 61
- 238000000034 method Methods 0.000 claims description 52
- 150000001875 compounds Chemical class 0.000 claims description 33
- 230000008018 melting Effects 0.000 claims description 26
- 238000002844 melting Methods 0.000 claims description 26
- 239000000463 material Substances 0.000 claims description 22
- 238000000151 deposition Methods 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- DIOQZVSQGTUSAI-UHFFFAOYSA-N decane Chemical compound CCCCCCCCCC DIOQZVSQGTUSAI-UHFFFAOYSA-N 0.000 claims description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 9
- 229910017052 cobalt Inorganic materials 0.000 claims description 9
- 239000010941 cobalt Substances 0.000 claims description 9
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 9
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 9
- 229910052721 tungsten Inorganic materials 0.000 claims description 9
- 239000010937 tungsten Substances 0.000 claims description 9
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 6
- 238000000231 atomic layer deposition Methods 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 5
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 98
- 230000008569 process Effects 0.000 description 15
- 239000000758 substrate Substances 0.000 description 15
- 239000004020 conductor Substances 0.000 description 11
- 238000010586 diagram Methods 0.000 description 10
- 238000001465 metallisation Methods 0.000 description 9
- 239000003989 dielectric material Substances 0.000 description 8
- 238000005240 physical vapour deposition Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 229910052719 titanium Inorganic materials 0.000 description 5
- 239000010936 titanium Substances 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 229910052715 tantalum Inorganic materials 0.000 description 4
- 238000012876 topography Methods 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 229910052732 germanium Inorganic materials 0.000 description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910004166 TaN Inorganic materials 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 229910052703 rhodium Inorganic materials 0.000 description 2
- 239000010948 rhodium Substances 0.000 description 2
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium atom Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 229910052720 vanadium Inorganic materials 0.000 description 2
- GPPXJZIENCGNKB-UHFFFAOYSA-N vanadium Chemical compound [V]#[V] GPPXJZIENCGNKB-UHFFFAOYSA-N 0.000 description 2
- 229910052726 zirconium Inorganic materials 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910020177 SiOF Inorganic materials 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000010849 ion bombardment Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910001507 metal halide Inorganic materials 0.000 description 1
- 150000005309 metal halides Chemical class 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000010561 standard procedure Methods 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- XSOKHXFFCGXDJZ-UHFFFAOYSA-N telluride(2-) Chemical compound [Te-2] XSOKHXFFCGXDJZ-UHFFFAOYSA-N 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
- H01L23/53261—Refractory-metal alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76882—Reflowing or applying of pressure to better fill the contact hole
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53242—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
- H01L23/53247—Noble-metal alloys
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Description
所揭露之實施例大體有關於積體電路裝置的製造,且更具體而言,有關於製造互連體的方法。
一積體電路(IC)裝置典型地包含其中已形成電路的一半導體晶粒,此電路包括電路元件,諸如電晶體、二極體、電容器、電阻器等的集合。為了在晶粒與下一層組件(例如封裝基板)之間提供電氣連接,一互連體結構在晶粒的表面上形成,其可包含許多金屬化層,每一金屬化層與相鄰的層被一介電材料層隔開並經由介層孔與相鄰層互連。
任一特定的金屬化層的導體典型地包含在介電層中形成的開口及介層孔,或其他形貌體的圖形。現今的標準方法首先沈積一障蔽層來防止金屬遷移到周圍的介電材料中並促使金屬與下方ILD層黏合。典型的方法使用PVD或CVD Ti、Ta、TiN或TaN。隨後,開口及雙大馬士革介層孔被填充以一導電材料,諸如銅(儘管其他技術使用鎢或鋁來填充)。行業標準使用電鍍銅,這需要首先藉由化學氣相沈積(CVD)製程或物理氣相沈積(PVD)製程來沉積一相對較薄的導電種子層。在種子層形成之後,電鍍銅接著在未填充部分或餘留的間隙中沈積,以完整地填充開口及介層孔,以及雙大馬士革形貌體。在間隙填充之後,一平坦化製程,諸如化學機械研磨(CMP),可被實施以移除任何過量的金屬材料。
一個缺點是在裝置變小時,先前技術展現出高電阻,不良形貌體填充及不良電遷移極限。
依據本發明之一實施例,係特地提出一種形成一互連體結構的方法,其包含以下步驟:在一導電層上沈積一介電層;在該介電層中形成一開口以暴露該導電層;形成包含熔點在銅熔點與鎢熔點之間的一金屬或化合物的一無障蔽單相互連體,形成步驟包括在該介電層之開口內及在該介電層之一上表面上沈積一金屬或化合物層。
第1圖是繪示一方法實施例的一方塊圖;第2A-2F圖是繪示實施一方法實施例,諸如第1圖之方法的諸階段的示意圖;及第3圖是繪示可依據一些實施例形成的一積體電路晶粒的一實施例的一示意圖。
第1圖繪示製造一單相互連體的方法100的一實施例。在方塊110,該方法包括在一導電層上沈積一介電層。在方塊120,該方法包括在介電層中形成一開口以暴露導電層,且在方塊130,該方法包括形成包含熔點在一銅熔點與一鎢熔點之間的一金屬或化合物的一無障蔽單相互連體,形成步驟包括在介電層之開口內及介電層之一上表面上沈積一金屬或化合物層。
首先參照第2A及2B圖,一基板200被繪示。基板200可包含任一基板,其上形成有最後將以金屬填充的一開口或其他形貌體。在一實施例中,基板200包含一半導體晶圓(例如Si、SOI、GaAs等),其上已形成有許多晶粒300的積體電路(參見第2A圖),且晶圓200最終被切割成這些單獨的晶粒。一互連體結構將在此晶圓上的裝置層上(相對於每一晶粒300)形成,且此互連體結構可包括許多金屬化層,包括線路的每一金屬化層與相鄰層以一介電材料層隔開,且每一層經由介層孔與(複數)相鄰層互連。每一層的金屬化可包含許多導體或線路,其可使信號、電源及接地線佈線往返於晶圓上形成之電路。為簡化說明,在第2B-2F圖中,僅有一部分被設置在一導電層或線路206上的介電層205被繪示,且此介電層及導電層可包含在基板200上的裝置層上所形成的互連體結構中的層。
參照第2C圖,一開口210在基板200上的一介電層205中形成以暴露導電層206。在一實施例中,開口210包含一開口圖形的一部分,它將形成互連體結構中的一層的導體。開口可藉由任一適合的製程或製程組合(例如蝕刻製程接續一光蝕刻等)而形成。在一實施例中,開口210的寬度(w)高達60nm,且在另一實施例中,開口寬度(w)為30nm或以下。在又一實施例中,開口210的寬度(w)約為20nm。
此時,應指出的是,所揭露之實施例是就一單一開口在一互連體結構的一介電層中形成的背景描述。然而,應理解的是,所揭露之實施例在應用上中並不如此設限,再者,所揭露之實施例可使用在具有欲以一金屬來填充的一形貌體的任一結構上。此外,儘管諸圖繪示一介電層中的一單一開口,但是應理解的是,所揭露之實施例典型地將以晶圓級實施,且此晶圓可包括數百晶粒的一互連體結構,其中每一晶粒的互連體結構可能包含數千導體。
參照第2C圖,依據一實施例,介電層205的上表面可使用離子轟擊或電漿製程(大體而言由箭頭211顯示)預處理以增強一金屬或化合物與介電層的黏著力。例如,預處理可包括使用氬(Ar)離子轟擊,且電漿製程可包括使介電質205之上表面207及開口暴露於矽烷,或暴露于氫與氦的一混合物或氫與Ar的一混合物。可能期望形成一金屬矽化物膜作為開口210中之填料的組分以輔助黏合及擴散預防特性。在此情況下,矽烷電漿預處理可與介電材料及一反應金屬(即Co、Ni、Ti、Ta、Mo等)的適當選擇結合以形成一矽化物。較佳地是,在使用一矽烷電漿的一實施例中,反應金屬可包括Co或Ni,因為Co或Ni的電阻小於Ti、Ta、Mo。在預處理製程包括一電漿製程,諸如氫/氦電漿或一氬電漿的情況下,可在範圍實質上從室溫到約300攝氏度的溫度下在一電漿室中實施。電漿程序可使用實質上介於200-1000瓦特之間的一應用功率實質上應用20到60秒。在替代方式中,一實施例可包括提供一金屬的保形層,諸如,舉例而言,鈷層,且之後,該金屬與另一種材料反應以與之形成化合物,該化合物接著形成單相互連體。例如,矽烷可被用以處理一沈積金屬層俾與之形成一化合物。可選擇地,層240的金屬或化合物,特別是合金形式,可摻雜或含有例如少量硼及/或磷及/或鎢以賦予非晶態性質。
現在轉參第2D圖,在一實施例中,一金屬或化合物的一保形層240可被沈積至已在介電質205中被形成的形貌體中,以及介電質205的一上表面207上,金屬或化合物的熔點在銅熔點與鎢熔點之間,也就是說,約1083℃到約3410℃之間。較佳地是,熔點在約1400℃到約2000℃之間。更為適宜地,該熔點約為1495℃,相當於鈷的熔點。若一金屬被用作保形單相層的材料,則其可包括,例如鈷、鎳、鈀、鉑、銠、鈦、釩或鋯。較佳地是,該金屬包括鈷。若一化合物被用作保形單相層的材料,則該化合物可包括,例如℃oSi2CoGe。應指出的是,本文所用的「化合物」包含合金,惟並不限於此。較佳地是,該化合物是包括鈷的一化合物。保形金屬或化合物層的沈積在第2D圖中繪示,其中一金屬或化合物層240已沈積在開口210的底部214及側壁212上,以及介電質205的一上表面207上。例如,金屬或化合物的保形層可藉由化學氣相沈積(CVD)、物理氣相沈積(PVD)或原子層沈積(ALD)、或藉由使用例如上述任一製程首先沈積一金屬或化合物種子層來電鍍。層240可具有任一適合的厚度,且在一實施例中,對於開口寬度在約20nm到約50nm之間,此層的厚度在約10nm到約25nm之間。
如第2D圖中所見,提供金屬或化合物的保形層可產生不完全填充開口210,在層240的對向壁之間產生一接合空隙215。依據一實施例,如第2E圖中所見,且參照第1圖之方塊120,藉由使材料熱回流或促成晶粒成長可實現層240的熱退火以消除形貌體210中心的接合空隙215,以此方式有利地降低互連體電阻。例如,對於設置在寬度為20nm直到約60nm的一開口中的10nm到30nm之間的一保形層240,層240可受到約250℃到約450℃之間的退火,例如約10分鐘直到約2小時,且較佳地是在約350℃退火約10分鐘到約2小時,此退火可消除與層240厚度無關的接縫。
現在參照第2E及2F圖,過量的材料可從層240的一上表面208移除。如第2F圖中所示者,過量的材料已從第2E圖中所示之層240的上表面208移除,層240部分留在開口210中。在一習知方式中材料的移除可能旨在減少留在介電質205之上表面207上的層240的厚度,及/或旨在拋光層240的上表面208。任一適合的製程可用以從層240移除過量的材料。在一實施例中,例如,過量的材料可藉由化學機械研磨(CMP)而被移除;然而,其他製程也可能是適宜的。
不論熱退火及/或過量材料移除是否視應用需要而被執行,在開口210內並在介電質205的表面上提供金屬或化合物可導致提供包含由該金屬或化合物構成的一介層孔270及一導電線275的一無障蔽單相互連體265,其中金屬或化合物的熔點在銅熔點和鎢熔點之間。在實施例中,「單相互連體」的意思是包括一介層孔及一線路的一互連體,其中介層孔及線路由一單件或單一材料,金屬或化合物中之一者製成。在實施例中,「無障蔽單相互連體」的意思是在互連體與下方介電質之間未沈積一不同於互連體之金屬或化合物的材料而提供的一單相互連體。例如,本文所用的「單相互連體」將不包括使用障蔽層,諸如一含有Ti、Ta、TiN或TaN,沈積在互連體與下方ILD之間的障蔽層。應指出的是,本文所用的「單相」包含其中材料可能含有微量雜質的層,諸如,舉例而言,可能包含在經由CVD而獲得的一鈷層中的微量碳或氮,或一摻雜金屬層中的微量隔離摻雜物。除此之外,本文所用的「單相互連體」線路不一定意指是連續的,只要與一下方介層孔以一單件材料製成即可。
現在轉參第3圖,圖中繪示一積體電路晶粒300的一實施例,其可依據所揭露之實施例而形成。晶粒300包含一半導體基板310,及已在此基板上的一裝置層上形成的電路315。電路315可包括許多電路元件(例如電晶體、二極體、電容器、電阻器等),以及使這些元件互連的各種不同的信號線。基板310可包含任一適合的半導體材料,諸如矽(Si)、矽絕緣體(SOI)、砷化鎵(GaAs)等。
一互連體結構320配置在基板310上。互連體結構320包括若干金屬化層325。每一層325包含若干互連體,包括導線330及導電介層孔340。每一金屬化層也配置在一介電材料層305內及/或由一介電材料層305支撐。每一層325的線路與相鄰層中的導體被其中一介電層305隔開,且相鄰線路藉由介層孔340而電氣互連。互連體-例如線路330及介層孔340-可包含熔點在銅熔點與鎢熔點之間的一金屬或化合物,諸如鈷、鎳、鈀、鉑、銠、鈦、釩或鋯,或其化合物。介電層305可包含任一適合的介電或絕緣材料,諸如二氧化矽(SiO2)、SiOF、碳摻雜氧化物(CDO)、玻璃,或聚合物材料。在一實施例中,導體330及介層孔340(或其他互連體)依據上述任一實施例而形成。
讀者將了解的是,為了簡化說明,僅有限數目的電路元件315、導體330,及介層孔340在第3圖中繪示。然而,讀者將了解的是,在基板310上形成的積體電路315實際上可包括數千萬,或甚至億萬個別電路元件,再者,互連體結構320可包括數百或甚至數千導體330及/或介層孔340(或其他互連體)。因此,應理解的是,第3圖是一積體電路晶粒300的一簡化示意圖,僅為輔助理解所揭露之實施例而被提出,再者,此示意圖將不引致不必要的限制。
有利地是,提供上文提到的一金屬或化合物層實現至少三個顯著的功能:首先,其提供電阻低於先前技術互連體的互連體(介層孔加線路),諸如包括钽,氮化钽之障蔽層,或介層孔,諸如填充有鎢的介層孔的互連體,以此方式改良系統的電氣性能;其次,其提供由於整個互連體所使用的金屬或化合物熔點比先前技術互連體為高而具有較先前技術之可靠性為高的互連體,典型地包括銅(熔點約為1083℃),或可能包括鋁(熔點甚至更低,約為660℃),依據實施例之互連體的較高熔點因其較高的抗電遷移能力而提供較佳的可靠性;且第三,其藉由允許一起提供介層孔材料及線路材料來簡化互連體形成過程,消除在單獨製程中提供線路及介層孔的必要性。
上述詳細說明及附圖僅具說明性且不具限制性。它們被提供主要是為了清楚並充分地理解所揭露之實施例且沒有不必要的限制將由此被臆斷。熟於此技者可在不背離所揭露之實施例的精神及後附申請專利範圍的範圍下設計對本文所述之實施例以及替代配置的許多添加、刪除及修改。
100...方法
110~130...方塊
200...基板/晶圓
205...介電層/介電質
206...導電層或線路/導電層
207、208...上表面
210...開口/形貌體
211...箭頭
212...開口側壁
214...開口底部
215...接合空隙
240...層/保形層/金屬或化合物層
265...無障蔽單相互連體
270...介層孔
275...導電線
300...晶粒/積體電路晶粒
305...介電材料層/介電層
310...半導體基板/基板
315...電路/電路元件/積體電路
320...互連體結構
325...金屬化層/層
330...導電線/線路/導體
340...導電介層孔/介層孔
第1圖是繪示一方法實施例的一方塊圖;
第2A-2F圖是繪示實施一方法實施例,諸如第1圖之方法的諸階段的示意圖;及
第3圖是繪示可依據一些實施例形成的一積體電路晶粒的一實施例的一示意圖。
100...方法
110~130...方塊
Claims (20)
- 一種形成一互連體結構的方法,其包含以下步驟:在一下金屬互連線上沉積出一介電層;在該介電層之中形成具有側壁的一開口以使該下金屬互連線暴露;形成保形、無障蔽且單相的一上互連體,該上互連體包含所具有之一熔點係在銅熔點與鎢熔點之間的金屬,形成該上互連體的步驟包括:以該金屬沉積出一層,其中(甲)該層金屬直接接觸該開口的該等側壁與該下金屬互連線以從而形成一導電互連通孔,並且(乙)該層金屬直接接觸該介電層之一頂表面以從而形成直接接觸該互連通孔的一導電互連線;以及使該上互連體之該金屬與一材料反應,以形成在該上互連體內所包含的一化合物;其中,沉積該層金屬的步驟包括:進行化學氣相沉積以及原子層沉積中之至少一者。
- 如申請專利範圍第1項所述的之方法,該方法包含下列步驟:將沉積該金屬沉積於在該開口之的該等側壁上沉積該金屬,而不將不同於該金屬的一材料沉積於在在該開口之的該等側壁上沉積不同於該金屬的材料;其中,該金屬包含鈷。
- 一種方法,其包含以下步驟:在一金屬互連線上形成具有一上表面的一介電層;在該介電層之中於該金屬互連線上方形成具有側壁的 一開口;形成由一金屬構成的無障蔽的一保形層,該保形層直接接觸該上表面與該等側壁;以及使該保形層之該層金屬與一材料反應以形成一化合物;其中(甲)(1)該金屬的熔點介於約1400℃與約2000℃之間,(甲)(2)形成該保形層的步驟包括:進行化學氣相沉積(CVD)以及原子層沉積(ALD)中之至少一者,並且(甲)(3)該化合物形成直接接觸該上表面與該等側壁的一互連體。
- 如申請專利範圍第3項所述的方法,其中,該金屬包括鈷。
- 如申請專利範圍第3項所述的方法,其中,形成該開口的步驟包含:使該金屬互連線暴露。
- 如申請專利範圍第5項所述的方法,其中,該互連體受組配為可進行下列操作:(乙)(1)在耦接到一訊號源時規劃信號路徑,以及(乙)(2)與該金屬互連線電性耦合。
- 如申請專利範圍第5項所述的方法,其中該開口具有介於約20nm到約60nm之間的寬度。
- 如申請專利範圍第7項所述的方法,其中,該上表面係被包括在一頂表面中,該頂表面大致平行於包括有該金屬互連線的一底面。
- 如申請專利範圍第8項所述的方法,其中沉積該層金屬包括:進行ALD。
- 如申請專利範圍第8項所述的方法,其中,形成該保形層的步驟包括:進行CVD。
- 如申請專利範圍第8項所述的方法,其包含下列步驟:以不先在該側壁上沈積一種子層的方式在該等側壁上形成該保形層。
- 如申請專利範圍第11項所述的方法,其中,(乙)(1)該互連體包括一導電通孔與在該上表面上的一導電互連線,並且(乙)(2)該導電通孔直接接觸該等側壁以及該導電互連線。
- 如申請專利範圍第12項所述的方法,其包含下列步驟:以介於約250℃與約450℃之間的一溫度將該互連體退火。
- 如申請專利範圍第12項所述的方法,其中,該導電通孔與該導電互連線是一體的。
- 如申請專利範圍第14項所述的方法,其中,該導電通孔直接接觸該金屬互連線。
- 如申請專利範圍第15項所述的方法,其中,該導電互連線直接接觸該上表面。
- 如申請專利範圍第16項所述的方法,其中,平行於該頂表面的一水平軸與該導電互連線和該介電層相交。
- 如申請專利範圍第3項所述的方法,其中該金屬包含鈀。
- 如申請專利範圍第3項所述的方法,其中,該金屬包含鎳。
- 如申請專利範圍第3項所述的方法,其中,該材料包括矽烷。
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WO2011065749A2 (ko) | 2009-11-24 | 2011-06-03 | 한국전자통신연구원 | 다중 사용자 다중 안테나 기반 무선통신 시스템에서 데이터 보호 방법 |
DE112010004554T5 (de) | 2009-11-24 | 2012-09-06 | Electronics And Telecommunications Research Institute | Verfahren zum Wiederherstellen eines Rahmens, dessen Übertragung in einem MU-MIMO-gestützten drahtlosen Kommunikationssystem fehlgeschlagen ist |
US9514983B2 (en) | 2012-12-28 | 2016-12-06 | Intel Corporation | Cobalt based interconnects and methods of fabrication thereof |
US9496145B2 (en) * | 2014-03-19 | 2016-11-15 | Applied Materials, Inc. | Electrochemical plating methods |
EP3155650A4 (en) * | 2014-06-16 | 2018-03-14 | Intel Corporation | Seam healing of metal interconnects |
US10727122B2 (en) | 2014-12-08 | 2020-07-28 | International Business Machines Corporation | Self-aligned via interconnect structures |
US9758896B2 (en) | 2015-02-12 | 2017-09-12 | Applied Materials, Inc. | Forming cobalt interconnections on a substrate |
KR102387275B1 (ko) | 2015-02-25 | 2022-04-15 | 인텔 코포레이션 | 마이크로전자 구조체 내의 상호연결 패드를 위한 표면 마감부 |
US9490211B1 (en) | 2015-06-23 | 2016-11-08 | Lam Research Corporation | Copper interconnect |
US9530737B1 (en) * | 2015-09-28 | 2016-12-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and manufacturing method thereof |
US10049927B2 (en) * | 2016-06-10 | 2018-08-14 | Applied Materials, Inc. | Seam-healing method upon supra-atmospheric process in diffusion promoting ambient |
US10622214B2 (en) | 2017-05-25 | 2020-04-14 | Applied Materials, Inc. | Tungsten defluorination by high pressure treatment |
US10276411B2 (en) | 2017-08-18 | 2019-04-30 | Applied Materials, Inc. | High pressure and high temperature anneal chamber |
CN111095513B (zh) | 2017-08-18 | 2023-10-31 | 应用材料公司 | 高压高温退火腔室 |
EP4321649A3 (en) | 2017-11-11 | 2024-05-15 | Micromaterials LLC | Gas delivery system for high pressure processing chamber |
CN111432920A (zh) | 2017-11-17 | 2020-07-17 | 应用材料公司 | 用于高压处理系统的冷凝器系统 |
WO2019173006A1 (en) | 2018-03-09 | 2019-09-12 | Applied Materials, Inc. | High pressure annealing process for metal containing materials |
US10950429B2 (en) | 2018-05-08 | 2021-03-16 | Applied Materials, Inc. | Methods of forming amorphous carbon hard mask layers and hard mask layers formed therefrom |
US11004794B2 (en) | 2018-06-27 | 2021-05-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Partial barrier free vias for cobalt-based interconnects and methods of fabrication thereof |
US10748783B2 (en) | 2018-07-25 | 2020-08-18 | Applied Materials, Inc. | Gas delivery module |
US10770395B2 (en) * | 2018-11-01 | 2020-09-08 | International Business Machines Corporation | Silicon carbide and silicon nitride interconnects |
WO2020117462A1 (en) | 2018-12-07 | 2020-06-11 | Applied Materials, Inc. | Semiconductor processing system |
US11158539B2 (en) * | 2019-10-01 | 2021-10-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and structure for barrier-less plug |
US11901222B2 (en) | 2020-02-17 | 2024-02-13 | Applied Materials, Inc. | Multi-step process for flowable gap-fill film |
US20220068709A1 (en) * | 2020-08-25 | 2022-03-03 | Applied Materials, Inc. | Low Resistivity Tungsten Film And Method Of Manufacture |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050032365A1 (en) * | 2003-08-08 | 2005-02-10 | Marsh Eugene P. | Atomic layer deposition of metal during the formation of a semiconductor device |
US20070141826A1 (en) * | 2005-12-15 | 2007-06-21 | Intel Corporation | Filling narrow and high aspect ratio openings using electroless deposition |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5874317A (en) * | 1996-06-12 | 1999-02-23 | Advanced Micro Devices, Inc. | Trench isolation for integrated circuits |
US6197685B1 (en) * | 1997-07-11 | 2001-03-06 | Matsushita Electronics Corporation | Method of producing multilayer wiring device with offset axises of upper and lower plugs |
KR100321693B1 (ko) * | 1998-06-29 | 2002-03-08 | 박종섭 | 티타늄실리사이드를이용한반도체소자의게이트전극및비트라인형성방법 |
KR100368981B1 (ko) * | 1998-06-30 | 2003-07-10 | 주식회사 하이닉스반도체 | 반도체소자의금속배선형성방법 |
US6194315B1 (en) * | 1999-04-16 | 2001-02-27 | Micron Technology, Inc. | Electrochemical cobalt silicide liner for metal contact fills and damascene processes |
KR20030028053A (ko) * | 2001-09-27 | 2003-04-08 | 삼성전자주식회사 | 반도체 장치 콘택 형성 방법 |
US20030155657A1 (en) * | 2002-02-14 | 2003-08-21 | Nec Electronics Corporation | Manufacturing method of semiconductor device |
US20050003592A1 (en) * | 2003-06-18 | 2005-01-06 | Jones A. Brooke | All-around MOSFET gate and methods of manufacture thereof |
JP4606006B2 (ja) * | 2003-09-11 | 2011-01-05 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US7220671B2 (en) * | 2005-03-31 | 2007-05-22 | Intel Corporation | Organometallic precursors for the chemical phase deposition of metal films in interconnect applications |
JP4822852B2 (ja) * | 2006-01-17 | 2011-11-24 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
US7749898B2 (en) * | 2008-06-24 | 2010-07-06 | Globalfoundries Inc. | Silicide interconnect structure |
US7867891B2 (en) * | 2008-12-10 | 2011-01-11 | Intel Corporation | Dual metal interconnects for improved gap-fill, reliability, and reduced capacitance |
-
2010
- 2010-12-20 US US12/973,281 patent/US20120153483A1/en not_active Abandoned
-
2011
- 2011-12-05 WO PCT/US2011/063263 patent/WO2012087547A1/en active Application Filing
- 2011-12-12 TW TW100145773A patent/TWI587393B/zh active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050032365A1 (en) * | 2003-08-08 | 2005-02-10 | Marsh Eugene P. | Atomic layer deposition of metal during the formation of a semiconductor device |
US20070141826A1 (en) * | 2005-12-15 | 2007-06-21 | Intel Corporation | Filling narrow and high aspect ratio openings using electroless deposition |
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TW201241918A (en) | 2012-10-16 |
US20120153483A1 (en) | 2012-06-21 |
WO2012087547A1 (en) | 2012-06-28 |
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