TWI582941B - 用於微電子封裝體之圖框加強件 - Google Patents

用於微電子封裝體之圖框加強件 Download PDF

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Publication number
TWI582941B
TWI582941B TW104136026A TW104136026A TWI582941B TW I582941 B TWI582941 B TW I582941B TW 104136026 A TW104136026 A TW 104136026A TW 104136026 A TW104136026 A TW 104136026A TW I582941 B TWI582941 B TW I582941B
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Taiwan
Prior art keywords
microelectronic
die
frame reinforcement
interconnect
package
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TW104136026A
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English (en)
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TW201633495A (zh
Inventor
富田佳宏
久保田次郎
歐姆卡Ｇ 卡哈迪
蕭娜Ｍ 里夫
市川欣也
尼亭Ａ 戴斯潘迪
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英特爾公司
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Publication of TW201633495A publication Critical patent/TW201633495A/zh
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Description

用於微電子封裝體之圖框加強件 發明領域
本說明書之實施例總體係關於微電子封裝體製造之領域，且確切而言，係關於使用微電子封裝體之內的加強件來減少該微電子封裝體之翹曲。
發明背景
微電子工業不斷力求生產愈來愈快及愈來愈小的微電子封裝體以用於各種電子產品，該等電子產品包括但不限於電腦伺服器產品及可攜式產品，該等可攜式產品諸如可攜式電腦、電子平板電腦、便攜電話、數位攝影機，及類似物。隨著此等目標之達成，微電子封裝體之製造變得更加具有挑戰性。
微電子封裝體通常包括附接至微電子基板之至少一個微電子晶粒，該至少一個微電子晶粒諸如插入件。微電子基板通常由介電材料(諸如有機材料)與金屬(諸如銅)之交互層組成，其中該金屬經圖案化以形成導電路線。諸如矽晶粒之微電子晶粒具有形成在其中之積體電路，該微電子晶粒可實體附接至及電附接至微電子基板，以使得微 電子基板中之導電路線將電子信號引導至微電子晶粒之積體電路及自該積體電路引導電子信號。然而，微電子封裝體之部件具有不同熱膨脹係數。例如，在室溫(例如約25℃)下，諸如填矽環氧樹脂(諸如可自Ajinomoto Fine-Techno Co.,Inc.,1-2 Suzuki-cho,Kawasaki-ku,Kawasaki-shi,210-0801,Japan獲得的材料(例如Ajinomoto ABF GX-92))之有機介電材料具有約39ppm/℃之熱膨脹係數，用於導電路線之諸如銅的金屬具有約17ppm/℃之熱膨脹係數，且諸如矽之微電子晶粒具有約2.6ppm/℃之熱膨脹係數。此等部件之熱膨脹中的根本差異可導致微電子封裝體之溫度依存變形或翹曲。此翹曲可在將微電子封裝體附接至外部基板期間導致重大問題，諸如，不濕潤開路(non-wet opens)及焊料凸塊橋接。可藉由在微電子基板中心處使用厚「芯」材料來減緩此翹曲。此芯材料通常具有玻璃轉變溫渡及低熱膨脹係數，從而降低微電子基板之複合熱膨脹係數。然而，芯材料熱膨脹係數已減少至4ppm/℃之下並變得愈來愈難以進一步減少。另外，存在對減少微電子封裝體之總高度或厚度之顯著需求。此減少之大部分藉由使芯材料變薄來達成，繼而，使芯材料對翹曲之影響更小。在給定此等因素的情況下，重要的是開發新的翹曲控制方法論，尤其用於高度/厚度受限微電子封裝體，諸如用於便攜電話及電子平板電腦之彼等微電子封裝體。
依據本發明之一實施例，係特地提出一種微電子 封裝體，其包含：一微電子晶粒，其具有一主動表面及一後表面，其中該微電子晶粒經由互連件電性地連接至一微電子基板，該等互連件延伸於該微電子晶粒之該主動表面與該微電子基板之一第一表面之間；一模製材料，其鄰接該微電子裝置及該微電子基板之該第一表面；以及一圖框加強件，其具有穿過其中之一開口，其中該圖框加強件係至少部分地嵌入該模製材料中，其中該微電子晶粒之至少一部分延伸至該圖框開口中，且其中該模製材料不延伸於該微電子晶粒之該後表面之上。
A-A、B-B‧‧‧線
T‧‧‧厚度
X、Y‧‧‧方向
100、250‧‧‧微電子封裝體
110、130‧‧‧微電子晶粒
112‧‧‧主動表面
114‧‧‧後表面
118、124、204、264‧‧‧接合墊
120‧‧‧互連件
126‧‧‧附接區
132、166、224‧‧‧第一表面
136、172、226‧‧‧第二表面
138‧‧‧導電路線
140‧‧‧圖框加強件
142‧‧‧開口
148‧‧‧第一層
148’‧‧‧第二層
152‧‧‧離型膜
154‧‧‧模製材料
162‧‧‧基底部分
164‧‧‧剛性突出部
168‧‧‧壓痕
200、210‧‧‧中間微電子封裝體
202‧‧‧穿模互連件
212‧‧‧加強件連接接合墊
214‧‧‧導電突出部
216‧‧‧預焊材料
220‧‧‧中間封裝體/中間微電子封裝體
222‧‧‧介電材料
232‧‧‧導電通孔
234‧‧‧第一表面接觸接合墊
236‧‧‧第二表面接觸接合墊
252‧‧‧第二微電子晶粒
254‧‧‧矽通孔
256‧‧‧第二晶粒互連件
258‧‧‧未填滿材料
260‧‧‧第二微電子封裝體
262‧‧‧封裝體層疊互連件
300‧‧‧流程
302~316‧‧‧方塊
400‧‧‧計算裝置
402‧‧‧板/母板
404‧‧‧處理器
406A、406B‧‧‧通訊晶片
408‧‧‧依電性記憶體/DRAM
410‧‧‧非依電性記憶體/ROM
412‧‧‧快閃記憶體
414‧‧‧圖形處理器/CPU
416‧‧‧晶片組
在說明書之結束部分中尤其指出且清楚地請求本揭示內容之標的。根據以下描述及隨附申請專利範圍，結合隨附圖式，本揭示內容之前述及其他特徵將變得更加充分明瞭。應理解，隨附圖式描繪根據本揭示內容的僅僅若干實施例，且因此並不能認為是對其範疇之限制。將藉由使用隨附圖式而以附加的特性及細節對本揭示內容進行描述，以使得可更容易確定本揭示內容之優點，其中：圖1為根據本說明書之實施例的附接至微電子基板的微電子晶粒之側面截面視圖。
圖2及3為根據本說明書之實施例的圖框加強件之傾斜及側面截面視圖。
圖4-7為根據本說明書之實施例的形成併入圖框加強件之微電子封裝體的截面視圖。
圖8-11為根據本說明書之實施例的具有剛性突 出部之圖框加強件的頂部平面及側面截面視圖。
圖12-14為根據本說明書之實施例的併入圖框加強件之微電子封裝體的截面視圖。
圖15為根據本說明書之實施例的封裝體層疊(package-on-package)微電子封裝體之截面視圖。
圖16為根據本說明書之實施例的製造微電子封裝體之流程的流程圖。
圖17例示根據本說明書之一個實行方案的計算裝置。
較佳實施例之詳細說明
在以下詳細描述中，參考以例示方式展示特定實施例之隨附圖式，所請求標的可在此等實施例中實踐。以充分詳情描述此等實施例，以使得熟習此項技術者能夠實踐該標的。要瞭解，各種實施例雖然互不相同，亦不一定互相排斥。例如，本文中結合一個實施例所描述的特定特徵、結構或特性可實行在其他實施例內而不脫離所請求標的之精神及範疇。本說明書內所引用的「一個實施例」或「一實施例」意指就該實施例描述的特定特徵、結構或特性包括在本說明書所涵蓋的至少一個實行方案中。因此，片語「一個實施例」或「在實施例中」之使用未必指同一實施例。此外，要瞭解，在每一所揭示的實施例中的個體元件之位置或佈置可在不脫離所請求標的之精神及範疇的情況下做出修改。因此，以下詳細描述不欲視為限制性意 義，且標的之範疇僅藉由適當解釋的隨附申請專利範圍、連同隨附申請專利範圍有權要求之等效物的完整範疇來限定。在圖式中，相同數字指代所有該等若干視圖中相同或相似的元件或功能，且其中所描繪的元件並不必須彼此成比例，而為了更易於理解本說明書上下文中的元件，可以放大或縮小個體元件。
如本文所使用之用詞「在...之上」、「至」、「在...之間」及「在...上」可指代相對於其他層之一個層的相對位置。在另一層「之上」或「上」或接合「至」另一層之一個層可直接與另一層接觸或可具有一或多個插入層。在層與層「之間」之一個層可直接與該等層接觸或可具有一或多個插入層。
本說明書之實施例包括微電子封裝體，該微電子封裝體具有包圍微電子晶粒之圖框加強件，以用於減少微電子封裝體之翹曲。用於製造此種微電子封裝體之實施例可包括：形成具有主動表面及相對後表面之微電子晶粒，其中微電子晶粒主動表面可附接至微電子基板。具有穿過其中之開口的圖框加強件可形成並放置於離型膜上，其中模製材料可沉積於圖框加強件及離型膜之上。微電子晶粒可插入模製材料中，其中微電子晶粒中之至少一部分延伸至圖框開口中；可移除離型膜，且可移除延伸於微電子晶粒後表面之上的模製材料之一部分，以形成微電子封裝體。
在圖1中，諸如微處理器、晶片組、圖形裝置、無線裝置、記憶體裝置、應用特定積體電路或類似物之至 少一個微電子晶粒110可經由多個互連件120附接至微電子基板130。互連件120可以通常公知為倒裝晶片或受控崩潰晶片連接(「C4」)組態之組態延伸於微電子晶粒110之主動表面112上的接合墊118與微電子基板130之第一表面132上的鏡像接合墊124之間。微電子晶粒接合墊118可與微電子晶粒110之內的積體電路(未展示)電連通。微電子基板接合墊124可與微電子基板130之內的導電路線138電連通。導電路線138可將電連通路線提供於微電子基板130上之微電子晶粒110之間及/或提供至其他部件(未展示)，並可將電連通路線提供至緊鄰微電子基板130之第二表面136的附接區126以用於附接至微電子板(未展示)。
微電子基板130可包含適當的介電材料，該介電材料包括但不限於液晶聚合物、環氧樹脂、雙馬來醯亞胺三嗪樹脂、FR4、聚醯亞胺材料，及類似物。導電路線138可由任何適當的導電材料形成，該導電材料包括但不限於銅、銀、金、鎳，及其合金。應理解，微電子基板130可由任何數量的介電質層形成，可含有剛性核心(未展示)，並可含有在其中形成之主動及/或被動微電子裝置(未展示)。應進一步理解，導電路線138可在微電子基板130之內及/或與其他外部部件(未展示)形成任何所要電路線。亦應理解，可在微電子基板第一表面132及微電子基板第二表面136上使用阻焊層(未展示)，如熟習此項技術者將理解的。用於形成微電子基板130所使用之製程為熟習此項技術者清楚地瞭解，且為了簡潔及簡明將不在此描述或例示。
互連件120可由任何適當材料製成，該材料包括但不限於，焊料及導電的填充環氧樹脂。焊錫材料可包括可能任何適當材料，該材料包括但不限於，諸如63%錫/37%鉛焊料之鉛/錫合金，或諸如純錫或高錫含量合金(例如90%或更純的錫)之無鉛焊料，諸如錫/鉍、共晶錫/銀、三元錫/銀/銅、共晶錫/銅，及相似合金。當微電子晶粒110藉由由焊料製成的互連件120附接至微電子基板130時，該焊料藉由熱量、壓力及/或聲能回流以將焊料固定於微電子晶粒接合墊118與微電子基板接合墊124之間。另外，微電子晶粒110可為附接至微電子基板130之基於銅柱的倒裝晶片部件，如熟習此項技術者將理解的。
如圖2所示，可形成加強件140。加強件140可為大體平坦的(在X方向和Y方向上)，其中開口142穿過加強件140，以使得加強件140類似於圖畫之框架。因而，加強件140將在以下簡稱為「圖框加強件」。在一個實施例中，圖框加強件140及/或圖框加強件開口142大體為矩形。在另一實施例中，圖框加強件140及/或圖框加強件開口142大體為方形。圖框加強件140可由任何適當的大體脊材料(ridge material)形成，該等脊材料包括但不限於，有機樹脂及金屬。在一個實施例中，加強件可具有介於約50μm與100μm之間的厚度T。如圖3所示(沿圖2之線A-A觀察)，加強件140可包含多於一個層(如第一層148及第二層148'所示)，其中第一層148及第二層148'可具有不同的熱膨脹係數，從而可輔助平衡翹曲，如熟習此項技術者將理解的。
如圖4所示，圖框加強件140可位於離型膜152之上，且模製材料154可安置於圖框加強件140及離型膜152之上，以使得圖框加強件140至少部分地嵌入模製材料154中。離型膜152可為任何適當的載體材料，該載體材料包括撓性聚合體材料，該等撓性聚合體材料可包括黏合組分。模製材料154可為任何適當的封裝材料，該封裝材料諸如環氧樹脂及填充環氧樹脂。
如圖5所示，圖1之結構可以對齊，以使得微電子晶粒110之後表面114面對離型膜152，且其中微電子晶粒110可插入模製材料154中，以使得微電子晶粒110中之至少一部分駐留在圖框加強件開口142之內，且以使得模製材料154接觸微電子基板第一表面132。在一個實施例中，模製材料154可具有黏度，從而允許模製材料154流動並填充於微電子基板第一表面132與微電子晶粒主動表面112之間以封裝互連件120。然而，應理解，未填滿材料(未展示)可在將微電子晶粒110插入模製材料154中之前安置於微電子基板第一表面132與微電子晶粒主動表面112之間。
如圖6所示，模製材料154諸如藉由加熱而完全地或部分地固化，且離型模152(參見圖4)可移除。如圖7所示，可諸如藉由濕式或乾式蝕刻、雷射剝蝕、離子轟擊、粒子噴砂(particle blasting)、磨蝕，或類似方式來移除駐留在微電子晶粒後表面114上之任何模製材料154，以形成微電子封裝體100。藉由移除駐留在微電子晶粒後表面114上之模製材料154，微電子晶粒後表面114可暴露以用於電性地連 接至矽通孔(未展示)，以用於熱散逸裝置之附接，等等。
雖然圖1-7例示單一微電子晶粒110，但應理解，多個微電子晶粒可附接至微電子基板130。亦應理解，微電子晶粒110應盡可能插入圖框加強件開口142中以最小化所得微電子封裝體100之總厚度。
如圖8-11所示，圖框加強件140可具有增強抗彎曲性之組態。例如，如圖8所示，圖框加強件140可包含基底部分162及自圖框加強件基底部分162之第一表面166延伸的剛性突出部164。如圖9所示(沿圖8之線B-B觀察)，諸如當圖框加強件140藉由模製、削磨或類似方式形成時，剛性突出部164可形成以與圖框加強件基底部分162之材料成為一體(亦即，由單一連續性材料製成)。如圖10所示(沿圖8之線B-B觀察)，剛性突出部164可藉由沖印製程形成，從而將導致剛性突出部164自圖框加強件基底部分162之第一表面166延伸，且壓痕168自圖框加強件基底部分162之第二表面172延伸至圖框加強件基底部分162中。如圖11所示(沿圖8之線B-B觀察)，圖框加強件突出部162可為附接至圖框加強件基底部分第一表面166之單獨結構，其中剛性突出部164可具有與圖框加強件基底部分162不同的熱膨脹係數，從而可輔助平衡翹曲，如熟習此項技術者將理解的。
在本說明書之中間微電子封裝體200之實施例中，至少一個穿模互連件202可在插入模製材料154之前形成於微電子基板第一表面132上之對應接合墊204之上，如圖12所示。穿模互連件接合墊204可與微電子基板130之內 的對應導電路線138電連通。如圖12進一步所示，可諸如藉由濕式或乾式蝕刻、雷射剝蝕、離子轟擊、粒子噴砂、磨蝕或類似方式來移除模製材料154之一部分以暴露穿模互連件202之一部分，以允許附加電部件(未展示)之後續連接。
如圖13所示，在本說明書之中間微電子封裝體210之其他實施例中，圖框加強件140可為引線框架型，其中圖框加強件140可由導電材料製成，其與微電子基板第一表面132上的加強件連接接合墊212電連通。在一個實施例中，圖框加強件140可具有自其延伸的至少一個導電突出部214，其中導電突出部214可在將微電子晶粒110插入模製材料154之前接觸對應預焊材料216(安置於加強件連接接合墊212上)。加強件連接接合墊212可與微電子基板130之內的對應導電路線138電連通。在一個實施例中，圖框加強件140可將電源或接地提供至微電子晶粒110。
如圖14所示，在本說明書之中間微電子封裝體220之另一實施例中，圖框加強件140可為插入件型，其中圖框加強件140可包含介電材料222，介電材料222具有第一表面224及第二表面226，且至少一個導電通孔232自介電材料第一表面224延伸至介電材料第二表面226。圖框加強件140可進一步包括：第一表面接觸接合墊234，其在介電材料第一表面224處與加強件導電通孔232電接觸；以及第二表面接觸接合墊236，其在介電材料第二表面226處與加強件導電通孔232電接觸。如圖14進一步所示，第一表面接觸接合墊234可在插入模製材料154中(諸如圖12所示)之前在 微電子基板第一表面132上與形成於接合墊204之上的穿模互連件202電接觸。穿模互連件接合墊204可與微電子基板130之內的對應導電路線138電連通。如熟習此項技術者將理解的，導電通孔232併入加強件140中可減少中間微電子封裝體220及形成於中間微電子封裝體220中之任何後續封裝體的大小。
如圖15所示，中間微電子封裝體220可為封裝體層疊(「PoP」)微電子封裝體250之一部分，其中第二微電子晶粒252可藉由第二晶粒互連件256電附接至矽通孔254，矽通孔254自微電子晶粒110之後表面114延伸至微電子晶粒110之內的積體電路(未展示)進入微電子晶粒110中。未填滿材料258可安置於微電子晶粒110與第二微電子晶粒252之間。第二微電子封裝體260可經由封裝體層疊互連件262附接至中間封裝體220，封裝體層疊互連件262延伸於第二微電子封裝體260上之接合墊264與圖框加強件140之第二表面接觸接合墊236之間。第二微電子封裝體接合墊264可與第二微電子封裝體260之內的微電子組件(未展示)電子連通。
圖16為根據本說明書之實施例的製造微電子封裝體之流程300的流程圖。如在方塊302中所闡述的，微電子晶粒可形成具有主動表面及相對後表面。微電子晶粒主動表面可附接至微電子基板，如方塊304中所闡述的。如方塊306中所闡述的，圖框加強件可形成具有穿過其中形成之開口。圖框加強件可放置於離型膜上，如方塊308中所闡述 的。如方塊310中所闡述的，模製材料可安置於圖框加強件及離型膜之上。微電子晶粒可插入模製材料中，其中微電子晶粒中之至少一部分延伸至圖框開口中，如方塊312中所闡述的。如方塊314中所闡述的，可移除離型膜。可移除模製材料之延伸於微電子晶粒後表面之上的部分，如方塊316中所闡述的。
圖17例示根據本說明書之一個實行方案的計算裝置400。計算裝置400容納板402。該板可包括若干微電子組件，該等微電子組件包括但不限於，處理器404、至少一個通訊晶片406A、406B、依電性記憶體408(例如，DRAM)、非依電性記憶體410(例如，ROM)、快閃記憶體412、圖形處理器或CPU 414、數位信號處理器(未展示)、加密處理器(未展示)、晶片組416、天線、顯示器(觸控螢幕顯示器)、觸控螢幕控制器、電池、音訊編解碼器(未展示)、視訊編解碼器(未展示)、功率放大器(AMP)、全球定位系統(GPS)裝置、羅盤、加速計(未展示)、迴轉儀(未展示)、揚聲器(未展示)、攝影機及大容量儲存裝置(未展示)(諸如硬磁碟驅動機、光碟片(CD)、數位通用磁碟(DVD)等)。該等微電子組件中之任何者可實體地且電氣地耦接至板402。在一些實行方案中，該等微電子組件中之至少一者可為處理器404之一部分。
通訊晶片致能用於資料至計算裝置及自該計算裝置之傳遞之無線通訊。「無線」一詞及其派生詞可用以描述可經由非固體媒體藉由調變電磁輻射之使用來通訊資料 的電路、裝置、系統、方法、技術、通訊通道等。該用詞並非暗示相關聯裝置不含有任何引線，但是在一些實施例中該等相關聯裝置可不含有任何引線。通訊晶片可實行若干無線標準或協議中之任何者，包括但不限於Wi-Fi(IEEE 802.11族)、WiMAX(IEEE 802.16族)、IEEE 802.20、長期演進(LTE)、Ev-DO、HSPA+、HSDPA+、HSUPA+、EDGE、GSM、GPRS、CDMA、TDMA、DECT、藍牙、其衍生物以及指定為3G、4G、5G及以上的任何其他無線協議。計算裝置可包括多個通訊晶片。例如，第一通訊晶片可專用於較短範圍無線通訊，諸如Wi-Fi及藍牙，且第二通訊晶片可專用於較長範圍無線通訊，諸如GPS、EDGE、GPRS、CDMA、WiMAX、LTE、Ev-DO及其他。
「處理器」一詞可指代處理來自暫存器及/或記憶體的電子資料以將該電子資料變換成可儲存在暫存器及/或記憶體中的其他電子資料的任何裝置或裝置之部分。
計算裝置400之內的微電子組件中之任何者可包括具有圖框加強件之微電子封裝體，如上所述。
在各種實行方案中，計算裝置可為膝上型電腦、隨身型易網機、筆記型電腦、超極緻筆電(ultrabook)、智慧型電話、平板電腦、個人數位助理(PDA)、超行動PC、行動電話、桌上型電腦、伺服器、印表機、掃描器、監視器、機上盒(set-top box)、娛樂控制單元、數位相機、可攜式音樂播放器或數位視訊記錄器。在進一步實行方案中，計算裝置可為處理資料的任何其他電子裝置。
應理解，本說明書之標的非必要地限於圖1-17種所示之特定應用。該標的可應用於其他微電子裝置及組件應用，如熟習此項技術者將理解的。
以下實例係關於其他實施例，其中實例1為微電子封裝體，其包含：形成微電子晶粒，其具有主動表面及後表面，其中微電子晶粒經由互連件電性地連接至微電子基板，該等互連件延伸於微電子晶粒主動表面與微電子基板之第一表面之間；模製材料，其鄰接微電子裝置及微電子基板第一表面；以及圖框加強件，其具有穿過其中之開口，其中圖框加強件至少部分地嵌入模製材料中，其中微電子晶粒中之至少一部分延伸進入到圖框開口中，且其中模製材料不延伸於微電子晶粒後表面之上。
在實例2中，實例1之標的可任擇地包括：圖框加強件包含具有至少兩個材料層之層狀結構，該等材料層具有不同熱膨脹係數。
在實例3中，實例1之標的可任擇地包括：圖框加強件包含基底部分及自基底部分之第一表面延伸的剛性突出部。
在實例4中，實例3之標的可任擇地包括：剛性突出部與基底部分為一體。
在實例5中，實例3之標的可任擇地包括：剛性突出部及基底部分包含具有不同熱膨脹係數之不同材料。
在實例6中，實例1至5中之任何者的標的可任擇地包括：至少一個穿模互連件自微電子基板第一表面上之 對應穿模互連件接合墊延伸。
在實例7中，實例1之標的可任擇地包括：圖框加強件具導電性並包括至少一個導電突出部，該至少一個導電突出部延伸穿過模製材料並電接觸微電子基板第一表面上之對應加強件連接接合墊。
在實例8中，實例1中之任一者的標的可任擇地包括：圖框加強件包含介電材料，該介電材料具有第一表面及第二表面，且至少一個導電通孔自介電材料第一表面延伸至介電材料第二表面。
在實例9中，實例8之標的可任擇地包括：至少一個穿模互連件自微電子基板第一表面上之對應穿模互連件接合墊延伸，其中至少一個穿模互連件與圖框加強件之至少一個導電通孔電接觸。
在實例10中，實例9之標的可任擇地包括：第二微電子封裝體與圖框加強件之至少一個導電通孔電接觸。
在實例11中，實例10之標的可任擇地包括：第二微電子晶粒電性地連接至矽通孔，該等矽通孔自微電子晶粒後表面延伸進入到微電子晶粒中。
以下實例係關於其他實施例，其中實例12為一種製造微電子封裝體之方法，該方法包含：形成具有主動表面及相對後表面之微電子晶粒；將微電子晶粒主動表面附接至微電子基板；形成圖框加強件，該圖框加強件具有穿過其中形成之開口；將圖框加強件放置於離型膜上；將模製材料安置於圖框加強件及離型膜之上；將微電子晶粒插 入模製材料中，其中微電子晶粒中之至少一部分延伸進入到圖框開口中；移除離型膜；以及移除模製材料之延伸於微電子晶粒後表面之上的部分。
在實例13中，實例12之標的可任擇地包括：形成圖框加強件包含形成具有至少兩個材料層之層狀結構，該等材料層具有不同熱膨脹係數。
在實例14中，實例12之標的可任擇地包括：形成圖框加強件包含形成基底部分及自基底部分之第一表面延伸的剛性突出部。
在實例15中，實例14之標的可任擇地包括：形成圖框加強件包含形成與基底部分為一體的剛性突出部。
在實例16中，實例14之標的可任擇地包括：形成圖框加強件包含自具有不同熱膨脹係數之不同材料形成剛性突出部及基底部分。
在實例17中，實例12至16中之任何者的標的可任擇地包括：在將微電子晶粒插入模製材料中之前形成至少一個穿模互連件，該至少一個穿模互連件自微電子基板第一表面上之對應穿模互連件接合墊延伸。
在實例18中，實例12之標的可任擇地包括：形成圖框加強件包含形成具有至少一個導電突出部之導電圖框加強件，該至少一個導電突出部延伸穿過模製材料並電接觸形成於微電子基板第一表面之上的對應加強件連接接合墊。
在實例19中，實例12之標的可任擇地包括：形成 圖框加強件包含形成具有第一表面及第二表面之介電材料，以及形成至少一個導電通孔，該至少一個導電通孔自介電材料第一表面延伸至介電材料第二表面。
在實例20中，實例19之標的可任擇地包括：形成至少一個穿模互連件，該穿模互連件自微電子基板第一表面上之對應穿模互連件接合墊延伸，其中至少一個穿模互連件與圖框加強件之至少一個導電通孔電接觸。
在實例21中，實例20之標的可任擇地包括：將第二微電子封裝體與圖框加強件之至少一個導電通孔電接觸。
在實例22中，實例21之標的可任擇地包括：將第二微電子晶粒電性地連接至矽通孔，該等矽通孔自微電子晶粒後表面延伸進入到微電子晶粒中。
以下實例係關於其他實施例，其中實例23為計算裝置，其包含：板；以及微電子封裝體，其附接至該板，其中微電子封裝體包括：微電子晶粒，其具有主動表面及後表面，其中微電子晶粒經由互連件電性地連接至微電子基板，該等互連件延伸於微電子晶粒主動表面與微電子基板之第一表面之間；模製材料，其鄰接微電子裝置及微電子基板第一表面；以及圖框加強件，其具有穿過其中之開口，其中圖框加強件至少部分地嵌入模製材料中，其中微電子晶粒中之至少一部分延伸進入到圖框開口中；且其中模製材料不延伸於微電子晶粒後表面之上。
在實例24中，實例23之標的可任擇地包括：圖框 加強件包含基底部分及自基底部分之第一表面延伸的剛性突出部。
在實例25中，實例24之標的可任擇地包括：剛性突出部與基底部分為一體。
在如此詳細描述本說明書之實施例之後，應理解，由隨附申請專利範圍定義之本說明書不應受限於在以上描述中闡述之特定細節，因為本說明書之許多顯而易見的變化為可能的，而不脫離本說明書之精神或範疇。
110‧‧‧微電子晶粒
112‧‧‧主動表面
114‧‧‧後表面
118‧‧‧接合墊
120‧‧‧互連件
124‧‧‧接合墊
126‧‧‧附接區
130‧‧‧微電子基板
132‧‧‧第一表面
136‧‧‧第二表面
138‧‧‧導電路線

Claims (25)

  1. 一種微電子封裝體，其包含：一微電子晶粒，其具有一主動表面及一後表面，其中該微電子晶粒係透過互連件電性地連接至一微電子基板，該等互連件延伸於該微電子晶粒之該主動表面與該微電子基板之一第一表面之間；一模製材料，其鄰接該微電子晶粒及該微電子基板之該第一表面；以及一圖框加強件，其具有穿過其中之一開口，其中該圖框加強件係至少部分地嵌入該模製材料中，其中該微電子晶粒之至少一部分延伸進入到該圖框開口中，且其中該模製材料不延伸於該微電子晶粒之該後表面之上。
  2. 如請求項1之微電子封裝體，其中該圖框加強件包含具有至少兩個材料層之一層狀結構，該等材料層具有不同熱膨脹係數。
  3. 如請求項1之微電子封裝體，其中該圖框加強件包含一基底部分及自該基底部分之一第一表面延伸的一剛性突出部。
  4. 如請求項3之微電子封裝體，其中該剛性突出部與該基底部分為一體的。
  5. 如請求項3之微電子封裝體，其中該剛性突出部及該基底部分包含具有不同熱膨脹係數之不同材料。
  6. 如請求項1之微電子封裝體，其進一步包括至少一個穿 模互連件，該至少一個穿模互連件自該微電子基板之該第一表面上的一對應穿模互連件接合墊延伸。
  7. 如請求項1之微電子封裝體，其中該圖框加強件具導電性並包括至少一個導電突出部，該至少一個導電突出部延伸穿過該模製材料並電性地接觸該微電子基板之該第一表面上的一對應加強件連接接合墊。
  8. 如請求項1之微電子封裝體，其中該圖框加強件包含一介電材料，該介電材料具有一第一表面及一第二表面，且至少一個導電通孔自該介電材料之該第一表面延伸至該介電材料之該第二表面。
  9. 如請求項8之微電子封裝體，其進一步包括至少一個穿模互連件，該至少一個穿模互連件自該微電子基板之該第一表面上之一對應穿模互連件接合墊延伸，其中該至少一個穿模互連件與該圖框加強件之該至少一個導電通孔電性地接觸。
  10. 如請求項9之微電子封裝體，其進一步包括一第二第二微電子封裝體，該第二微電子封裝體與該圖框加強件之該至少一個導電通孔電氣接觸。
  11. 如請求項10之微電子封裝體，其進一步包括一第二微電子晶粒，該第二微電子晶粒電性地連接至從該微電子晶粒之該後表面延伸進入到該微電子晶粒中之矽通孔。
  12. 一種製造一微電子封裝體之方法，該方法包含以下步驟： 形成具有一主動表面及一相對後表面之一微電子晶粒；附接該微電子晶粒主動表面至一微電子基板；形成一圖框加強件，該圖框加強件具有穿過其中所形成之一開口；放置該圖框加強件於一離型膜上；安置一模製材料於該圖框加強件及該離型膜之上；插入該微電子晶粒進入到該模製材料中，其中該微電子晶粒中之至少一部分延伸進入到該圖框開口中；移除該離型膜；以及移除該模製材料之延伸於該微電子晶粒後表面之上的部分。
  13. 如請求項12之方法，其中形成該圖框加強件包含形成具有至少兩個材料層之一層狀結構，該等材料層具有不同熱膨脹係數。
  14. 如請求項12之方法，其中形成該圖框加強件包含形成一基底部分及自該基底部分之一第一表面延伸的一剛性突出部。
  15. 如請求項14之方法，其中形成該圖框加強件包含形成與該基底部分為一體的該剛性突出部。
  16. 如請求項14之方法，其中形成該圖框加強鍵包含由具有不同熱膨脹係數之不同材料形成該剛性突出部及該基底部分。
  17. 如請求項12之方法，其進一步包括在插入該微電子晶粒 進入到該模製材料中之前，形成自該微電子基板之該第一表面上之一對應穿模互連件接合墊延伸之至少一個穿模互連件。
  18. 如請求項12之方法，其中形成該圖框加強件包含形成具有至少一個導電突出部之一導電圖框加強件，該至少一個導電突出部延伸穿過該模製材料並電性地接觸形成於該微電子基板之該第一表面之上的一對應加強件連接接合墊。
  19. 如請求項12之方法，其中形成該圖框加強件包含形成具有一第一表面及一第二表面之一介電材料，以及形成自該介電材料之該第一表面延伸至該介電材料之該第二表面之至少一個導電通孔。
  20. 如請求項19之方法，其進一步包括形成至少一個穿模互連件，該至少一個穿模互連件自該微電子基板之該第一表面上的一對應穿模互連件接合墊延伸，其中該至少一個穿模互連件與該圖框加強件之該至少一個導電通孔電性地接觸。
  21. 如請求項20之方法，其進一步包括將一第二微電子封裝體與該圖框加強件之該至少一個導電通孔電接觸。
  22. 如請求項21所述之方法，其進一步包括將一第二微電子晶粒電性地連接至自該微電子晶粒後表面延伸進入到該微電子晶粒中之矽通孔。
  23. 一種計算裝置，其包含：一板；以及 一微電子封裝體，其附接至該板，其中該微電子封裝體包括：一微電子晶粒，其具有一主動表面及一後表面，其中該微電子晶粒透過互連件電性地連接至一微電子基板，該等互連件延伸於該微電子晶粒之該主動表面與該微電子基板之一第一表面之間；一模製材料，其鄰接該微電子晶粒及該微電子基板之該第一表面；以及一圖框加強件，其具有穿過其中之一開口，其中該圖框加強件係至少部分地嵌入於該模製材料中，其中該微電子晶粒之至少一部分延伸進入到該圖框開口中；且其中該模製材料不延伸於該微電子晶粒之該後表面之上。
  24. 如請求項23之微電子封裝體，其中該圖框加強件包含一基底部分及自該基底部分之一第一表面延伸的一剛性突出部。
  25. 如請求項24之微電子封裝體，其中該剛性突出部與該基底部分為一體的。
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US20170040238A1 (en) 2017-02-09
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