TWI579324B - 透過含摻雜劑之聚合物膜對基板之摻雜 - Google Patents
透過含摻雜劑之聚合物膜對基板之摻雜 Download PDFInfo
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- TWI579324B TWI579324B TW104113851A TW104113851A TWI579324B TW I579324 B TWI579324 B TW I579324B TW 104113851 A TW104113851 A TW 104113851A TW 104113851 A TW104113851 A TW 104113851A TW I579324 B TWI579324 B TW I579324B
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- copolymer
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/228—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a liquid phase, e.g. alloy diffusion processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
- C09D153/00—Coating compositions based on block copolymers containing at least one sequence of a polymer obtained by reactions only involving carbon-to-carbon unsaturated bonds; Coating compositions based on derivatives of such polymers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2225—Diffusion sources
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2258—Diffusion into or out of AIIIBV compounds
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- H—ELECTRICITY
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
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- H—ELECTRICITY
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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Description
本案美國非臨時專利申請案請求美國臨時專利申請案第61/986395號申請日2014年4月30日之權益,該案爰引於此並融入本說明書之揭示。
本文揭示係有關於透過位於基板上的含摻雜劑之聚合物膜對基板之摻雜。
將電子組件之大小縮小至奈米級(小於100奈米(nm)之大小)的挑戰中之一者為:達成於次10奈米大小範圍內半導體材料之受控摻雜。舉例言之,隨著電晶體閘之長度快速趨近於次10奈米大小範圍,使用奈米級長度之高度傳導性超淺接面以將電晶體的大小縮小,以達成更快的電晶體速度及更高的堆積密度。又復,提示一寬廣範圍之微縮化電子應用結合奈米線結構單元或使用摻雜之其它非平面傳導性奈米結構。
目前的方法不適合用於摻雜至小於10奈米之深度。離子植入涉及矽基板與高能摻雜劑離子之撞擊,
該等摻雜劑離子置換基板晶格內之矽原子。但該方法也在晶格內產生點缺陷及空位,其與該等摻雜劑交互作用以加寬接面輪廓,藉此限制了次10奈米摻雜輪廓的形成。再者,離子植入係與非平面奈米結構材料不可相容,原因在於該等賦能離子具有完全穿透該奈米結構之顯著機率,不會留在晶格內造成顯著晶體受損。另一方面,當摻雜係欲在小於10奈米之深度進行時,習知固體來源擴散程序缺乏控制及均一性。
單層摻雜程序克服了目前技術的困難,且達成了具有高度區域一致性之高品質次5奈米摻雜概況。於此一程序期間,於矽表面上形成含摻雜劑之小分子的高度均一共價鍵結單層。於一接續熱退火步驟中,摻雜劑原子擴散入矽晶格。此種辦法已經導致展示淺接面(例如,距該表面5奈米至10奈米),針對p-型摻雜及n-型摻雜兩者具有低片電阻係數,且與非平面約束尺寸奈米結構基板為可相容。然而,該單層摻雜策略使用繁瑣的數個步驟。第一,含摻雜劑之小分子的沈積係在無氧氣氛下(亦即,在惰性氣氛下,或在減壓無氧條件下)進行以防氧化污染。此外,在該退火步驟之前,氧化矽封頂層氣化於該表面官能化矽基板之頂面上,以便達成摻雜劑原子之有效擴散入該矽基板內。該封頂層之氣化要求約10-6托耳(Torr)之高度真空。
第2005-123431號日本特許申請案揭示形成n-型擴散區段之方式係藉由將酸性有機磷酸酯聚合物膜
(500或以下之聚合度)溶解於極性有機溶劑或水或其混合物之薄膜塗覆至一基板上,接著於低於磷之擴散溫度之一第一溫度加熱歷經一時間週期,然後,於高於該第一溫度但低於磷之擴散溫度之一第二溫度,於氧化氣氛下加熱歷經一時間週期,接著於高於該第二溫度之一第三溫度於非氧化氣氛下加熱歷經一時間週期,諸如10小時以便讓磷擴散入該基板內。此乃複合辦法,需要三個不同的加熱週期,及週期間之氣氛切換。又,此種極性溶劑的使用經常與半導體製造業使用的標準程序不可相容,可能導致不良薄膜塗覆。若此種薄膜係不完全塗覆在該基板上,則該基板將可能有磷之非均勻摻雜。
因此,期望發展出一種於周圍條件下摻雜基板之方法而不使用高度真空、氧化物封頂層或氧化步驟。
此處揭示一種摻雜基板之方法,包含設置包含共聚物、摻雜劑前驅物及溶劑之組成物之塗覆層於基板上;其中該共聚物當於溶液內時能夠相分離及嵌置該摻雜劑前驅物;及於750℃至1300℃之溫度退火該基板歷時0.1秒至24小時以將該摻雜劑擴散入該基板內。
此處也揭示一種半導體基板包含直徑3奈米至30奈米之嵌置摻雜劑區域;其中該等區域包含13族原子或15族原子,其中該等嵌置球狀區域係位在該基板表面之30奈米以內。
第1圖描繪(a)PS-b-P4VP聚集體於溶液中含已包封之摻雜劑前驅物;(b)含已包封之摻雜劑之聚集體於矽基板上之薄膜;及(c)於快速熱退火(RTA)之後奈米侷限摻雜區;第2圖顯示嵌段共聚物及個別摻雜劑之結構;第3圖(A)顯示當聚合物鏈溶解於CDCl3時,自該等P4VP質子之共振出現在=8.5ppm化學移位。顯然因氯仿乃PS及P4VP二嵌段之良好溶劑,故該等聚合物鏈係呈非聚集態;但也顯示當聚合物鏈溶解於d8-甲苯時前述在=8.5ppm之共振消失。因甲苯為PS嵌段之良好溶劑但為P4VP嵌段之不良溶劑,故該等聚合物鏈係呈聚集態,其中P4VP嵌段形成此等聚集體之內部(核心),而PS嵌段形成此等聚集體之外部(外殼);第3圖(B)顯示4-羥基苯基二羥硼酸頻哪醇(pinacol)酯小分子於d8-甲苯(紅)中及於CDCl3(黑)中之1H-NMR光譜;第4圖顯示(A)於CDCl3中及(B)於d8-甲苯中聚合物+SM混合物之1H-NMR光譜;第5圖顯示聚合物-SMB系統之FT-IR光譜之一部分;第6圖顯示於900℃歷時1秒(綠)、10秒(藍)及60秒(紅)在波峰-RTA後基板上之SIMS濃度概況呈聚合物(P4VP)對SMB莫耳比-1:0.1(方形)、1:0.25(菱形)、及1:
0.5(圓形)-之函數;針對a低分子量(PS27k-b-P4VP7k)聚合物,b中分子量(PS58k-b-P4VP18k)聚合物,及c高分子量(PS109k-b-P4VP27k)聚合物之硼濃度概況;該灰資料點相對應於於900℃歷時30秒之波峰-RTA之後得自一空白矽基板之硼濃度概況;第7圖為使用四點探針度量所測量得之表面電阻之一線圖描繪;第8圖顯示已聚集之PS-b-P4VP聚合物薄膜在RTA摻混之前的分接模式AFM影像;具有不等大小及不等間隔之球狀聚集體清晰可見-各個影像相對應於一特定分子量:(a)PS27k-b-P4VP7k;(b)PS58k-b-P4VP18k;(c)PS109k-b-P4VP27k;第9圖顯示下列之3-D表面拓樸結構:(a)矽基板;(b)波峰-RTA前之PS58k-b-P4VP18k:SMB(1:0.5)膜;於900℃波峰-RTA後之PS58k-b-P4VP18k:SMB(1:0.5)膜歷時(c)0.1秒,(d)1秒,(e)10秒,及(f)60秒;第10圖顯示於900℃(綠)、950℃(藍)及1000℃(紅)歷時1秒之波峰-RTA之後在基板上之SIMS銻(Sb)濃度;第11圖顯示於(左)RTA之前及(右)於矽上於900℃的波峰RTA之後,嵌置於該聚合物膜內之銻叢簇之TEM影像;及第12圖顯示顯微照相其比較在波峰-RTA之前,PS58k-b-P4VP18k:SMSb薄膜之分接模式AFM(左)影像與
TEM(右)影像;兩個影像中之準六角形形態學明顯,具有相同尺寸之離散富銻球狀區域。
轉折語「包含」係包括轉折語「包含有」及「主要包含有」。「及/或」一詞用於此處表示「及」以及「或」兩者。舉例言之,「A及/或B」係詮釋為表示A、B、或A及B。
此處揭示一種藉以含摻雜劑之聚合物膜塗覆該基板及於升溫退火該基板用於達成摻雜半導體基板之方法。該聚合物膜包含該含摻雜劑之共聚物。該摻雜劑係氫鍵結或離子鍵結至該共聚物。於一具體實施例中,此處揭示之方法使用嵌段共聚物自組裝以侷限摻雜劑前驅物(例如B、P、As、Sb等)於聚合物膜內部之奈米級區域內。
該方法包含首先於溶液中包封摻雜劑前驅物於相分離的自組裝嵌段共聚物內部。該溶液含有摻雜劑前驅物、共聚物、及溶劑。於一個實施例中,該相分離的自組裝嵌段共聚物當於溶液中時係呈球狀區域形式。當沈積此等聚合物溶液之薄膜至一基板上時,週期性緊密堆積球狀聚集體自組裝而限定濃縮摻雜劑之奈米級大小區。此等高濃度區係以規則間隔定位。含摻雜劑區之大小及摻雜劑在基板上之間隔兩者可透過主體聚合物之分子設計加以控制。於該膜乾燥之後,透過快速熱退火(RTA)發生摻雜劑自該聚合物膜擴散至該基板,結果導致全部三度空間被侷限至數奈米的該基板之局部摻雜區。加熱該基板促進摻
雜劑自共聚物擴散至該基板。
此種方法之優點在於製程期間無需真空。該聚合物膜作為其本身之封頂層,因而免除了其它商業上可用的比較性製程中使用封頂層之需要。換言之,該方法在退火步驟之前,沒有在該聚合物膜上方形成氧化物封頂層之步驟。藉由使用低退火溫度及低退火時間,能夠於該基板獲得深度距該基板之表面淺抵5奈米且在20奈米平方面積以內之空間侷限摻雜接面。該方法用在例如,針對電晶體閘及源/汲形成高度傳導性超淺接面及用在摻雜矽奈米結構諸如奈米線以製造多種微縮化電子裝置為特別有利。於此處該聚合物膜又稱聚合物塗覆層或聚合物層。
該基板為半導性基板。合宜半導性基板之實施例為矽、鍺、砷化銦鎵、砷化鎵、磷化鎵、磷化銦、氮化銦、砷化銦、非晶形矽、矽鍺、碳化矽、或其類、或包含前述基板中之至少一者之組合。用作為該基板之一個半導體實施例為矽。
該基板係經以含有該基板摻雜的該摻雜劑之一聚合物膜塗覆。該等摻雜劑為13族原子及15族原子。摻雜劑可包括硼、磷、砷、鋁、鉍、銻、鎵、或其組合。摻雜劑或摻雜劑前驅物係氫鍵結至該聚合物或離子鍵結至該聚合物,且將於後文中被稱作含摻雜劑之聚合物。
當兩者皆於溶液中時,該摻雜劑前驅物能夠與該共聚物進行氫鍵結或離子鍵結。於一個實施例中,該摻雜劑前驅物係不與該共聚物共價鍵結。換言之,該摻
雜劑前驅物偏好與該共聚物於溶劑內進行鍵結。該摻雜劑前驅物可為小分子(例如,單體、二聚體、三聚體、四聚體、或五聚體)或可呈聚合形式(例如,具有多於五個重複單元)。摻雜劑前驅物之實施例為硼酸、己基二羥硼酸、苯基二羥硼酸、硼烷、乙烯基硼烷、乙烯基二羥硼酸、硼嗪、乙烯基硼嗪、環二硼胺烷、喹喏酸硼、二酮酸硼、二吡唑硼(pyrazabole)、二吡咯甲烷硼、碳硼烷、四苯硼酸鈉、AlX3鹽或GaX3鹽或AsX3鹽(其中X為鹵素)、硫酸鋁、異丙氧化二甲基鋁、磷酸、焦磷酸、四聚磷酸、四偏磷酸、磷酸二苯酯、磷酸二甲酯、(2-羥基苯基)二苯基膦、(4-羥基苯基)二苯基膦、4-(二苯基膦基)苯甲酸、4-羥基苯基二羥硼酸頻哪醇(pinacol)酯、氟銻酸六水合物、3-(二苯基膦基)丙酸、參(4-羥基苯基)膦、[羥基(3-羥基苯基)甲基]參(羥基甲基)-氯化鏻、甲基(對-羥基苯基)-二苯基碘化鏻、4,4,5,5-四甲基-1,3,2-二磷烷2-氧化物、5,5-二甲基-1,3,2-二磷雜苯-2-酮、亞磷酸二乙酯、苯胂酸、二甲基次胂酸、或其類、或包含前述小分子中之至少一者之組合。小分子摻雜劑前驅物之實施例為4-羥基苯基二羥硼酸頻哪醇(pinacol)酯、氟銻酸六水合物、或其組合。
摻雜劑前驅物也可呈聚合物形式。聚合摻雜劑前驅物之實施例為聚[2-(乙烯基)戊硼烷]、聚乙烯基硼嗪、聚硼雜吖烯(polyborazylene)、聚(環二硼胺烷)、含環二硼胺烷之聚合物、喹喏酸硼聚合物、含二吡唑硼(pyrazabole)之聚合物、含碳硼烷之聚合物、聚(乙烯基二羥硼酸)、或
其類、或包含前述聚合物中之至少一者之組合。若屬期望,該等聚合物可經取代。
含磷聚合摻雜劑包括磷腈聚合物、磷酸酯聚合物、磷酸聚合物、膦酸聚合物(例如,聚(亞乙烯基-1,1-二-膦酸))、或其類、或包含前述含磷聚合摻雜劑中之至少一者之組合。
磷腈聚合摻雜劑於分子內具有-P=N-鍵結。磷腈聚合物可具有下式(1)表示之環狀聚合物,或下式(2)表示之線性聚合物;及經由交聯選自於由下式(1)及(2)表示之苯氧基磷腈中之至少一者獲得交聯苯氧基磷腈化合物,具有下式(1)表示之交聯基:
於式(1)中,m表示3至25之整數,R1及R2為相同或相異及獨立地為氫、羥基、C7-30芳基、C1-12烷氧基、或C1-12烷基。
下式(2)表示之鏈狀苯氧基磷腈:
於式(2)中,X表示-N=P(OPh)3基或-N=P(O)OPh基,Y1表示
-P(OPh)4基或-P(O)(OPh)2基,n表示3至10000之整數,Ph表示苯基,R1及R2為相同或相異及獨立地為氫、鹵素、C1-12烷氧基、或C1-12烷基。
苯氧基磷腈也可具有下式(3)表示之交聯基:
於式(3)中,A表示-C(CH3)2-、-SO2-、-S-、或-O-,及q為0或1。
於一實施例中,磷酸聚合物具有式(4)結構式
其中e為1至500之整數。
期望含摻雜劑之聚合物(聚合摻雜劑前驅物)不含氮及矽。當含摻雜劑之聚合物為均聚物時,較佳不含羥基、胺基、醯胺基、巰基、及羧酸基作為聚合單元。當含摻雜劑之聚合物為共聚物時,較佳包含<50wt%之包含選自於羥基、胺基、醯胺基、巰基、羧酸基、及其組合之任一個單體作為聚合單元。也可使用有機砷聚合物。
膦酸聚合物之實施例為聚(亞乙烯基-1,1-二-膦酸)或聚(乙烯基膦酸二乙酯)。含磷聚合物之實施例為聚(乙烯基膦酸二乙酯)。
以該溶液之總重為基準,該摻雜劑前驅物係以0.001至15重量百分比(wt%),較佳地0.003至5重量百分比,及更佳地0.004至1重量百分比之含量存在於該溶液內。於一較佳實施例中,以該溶液之總重為基準,該摻雜劑前驅物係以0.005至0.2重量百分比之含量存在於該溶液內。
用於與該摻雜劑前驅物氫鍵結或離子鍵結之聚合物為當存在於含該摻雜劑前驅物之溶劑內時能夠自組裝之共聚物。該共聚合可為熱塑性共聚物、熱塑性共聚物之摻合物、熱固性共聚物、或熱塑性共聚物與熱固性共聚物之摻合物。該共聚物可為交替共聚物、嵌段共聚物、隨機共聚物、或接枝共聚物。該共聚物可具有樹狀、星狀、分支、或環狀等結構。於一具體實施例中,該共聚物為當存在於含該摻雜劑前驅物之溶劑內時能夠進行自組裝之嵌段共聚物。
該共聚物於溶液內之自組裝能力可能導致於該薄膜中或於溶液中之多種不同幾何形狀的形成。此等幾何形狀之實施例包括球狀結構域、筒狀塊、層狀塊等。此等幾何形狀中之各者之特徵在於其於該自組裝之重複結構間具有週期性。此種週期性允許該摻雜劑位在該基板上的週期性位置。此種週期性也允許該摻雜劑位在此等週期性位置導致該摻雜劑於此等位置之均一濃度。於一具體實施例中,該共聚物當澆注為一薄膜時可形成球狀區域。
於一個實施例中,該共聚物在接受快速熱
退火之前及在設置於該基板上之後可經交聯,或另外,當設置於該基板上之同時進行該快速熱退火期間可經交聯。
該共聚物與在溶液中之該摻雜劑前驅物進行氫鍵結或離子鍵結。用以輔助自組裝之該共聚物可包含一含氮雜芳基之化合物選自於由下列所組成之該組群中之至少兩種聚合物:聚縮醛類、聚烯烴類、聚丙烯酸類、聚甲基丙烯酸類、聚丙烯酸酯類、聚甲基丙烯酸酯類、聚苯乙烯類、聚芳基碸類、聚醚碸類、聚伸苯基硫化物類、聚氯乙烯類、聚碸類、聚四氟乙烯類、聚醚酮類、聚醚醚酮類、聚醚酮酮類、聚苯酞類、聚酐類、聚乙烯基醚類、聚乙烯基硫醚類、聚乙烯醇類、聚乙烯酮類、聚乙烯鹵化物類、聚乙烯酯類、聚磺酸類、聚硫化物類、聚硫酯類、聚碸類、聚酯類、聚伸乙基對苯二甲酸酯、聚伸丁基對苯二甲酸酯、聚酯類、聚四氟乙烯、氟化聚合物類、環氧聚合物類、乙烯系聚合物類、苯并環丁烯聚合物類、丙烯酸系聚合物類、醇酸聚合物類、酚-甲醛聚合物類、甲階酚醛清漆聚合物類、甲階酚醛聚合物類、羥基甲基呋喃聚合物類、鄰苯二甲酸二烯丙酯聚合物類、或其類、或包含前述聚合物中之至少一者之組合。如前記,以嵌段共聚物為佳。
嵌段共聚物之實施例為聚苯乙烯-嵌段-聚(4-乙烯基吡啶)、聚苯乙烯-嵌段-聚(2-乙烯基吡啶)、聚苯乙烯-嵌段-聚(苯基喹啉)、聚苯乙烯-嵌段-聚(乳酸)、聚苯乙烯-嵌段-聚(羥基苯乙烯)、聚苯乙烯-嵌段-聚(環氧乙烷)、聚苯乙烯-嵌段-聚(甲基丙烯酸2-(二甲基胺基)乙酯)、
聚苯乙烯-嵌段-聚(N,N-二甲基胺基苯乙烯)、聚(甲基丙烯酸甲酯)-嵌段-聚(甲基丙烯酸2-(二甲基胺基)乙酯)、聚(甲基丙烯酸甲酯)-嵌段-聚(乳酸)、聚(甲基丙烯酸甲酯)-嵌段-聚(丙烯酸胺基丙酯)、聚二甲基矽氧烷-嵌段-聚(甲基丙烯酸2-(二甲基胺基)乙酯)、聚二甲基矽氧烷-嵌段-聚(N,N-二甲基胺基苯乙烯)、聚(苯乙烯-b-甲基丙烯酸甲酯)、聚(苯乙烯-b-烯基芳香族)、聚(異戊間二烯-b-環氧乙烷)、聚(環氧乙烷-b-己內酯)、聚(丁二烯-b-環氧乙烷)、聚(苯乙烯-b-(甲基)丙烯酸第三丁酯)、聚(甲基丙烯酸甲酯-b-甲基丙烯酸第三丁酯)、聚(環氧乙烷-b-環氧丙烷)、聚(苯乙烯-b-四氫呋喃)、聚(苯乙烯-b-異戊間二烯-b-環氧乙烷)、聚(苯乙烯-b-甲基丙烯酸三甲基矽烷基甲酯)、聚(甲基丙烯酸甲酯-b-二甲基矽氧烷)、聚(甲基丙烯酸甲酯-b-甲基丙烯酸三甲基矽烷基甲酯)、或其類、或包含前述嵌段共聚物中之至少一者之組合。
於另一個實施例中,該共聚物為羧化烯烴共聚物。換言之,該共聚物之一個嵌段為羧化烯烴共聚物。該羧化烯烴共聚物包含乙烯聚合物或丙烯聚合物其上接枝有不飽和羧酸或其酐、酯、醯胺、醯亞胺、或金屬鹽,後文中命名為「接枝化合物」。該接枝化合物較佳地為脂肪族不飽和羧酸或衍生自此種酸之酐、酯、醯胺、醯亞胺、或金屬鹽。該羧酸較佳地含有至多6個碳原子,更佳地含有至多5個碳原子。
不飽和羧酸類之實施例為順丁烯二酸、反
丁烯二酸、衣康酸、丙烯酸、甲基丙烯酸、巴豆酸、及檸康酸。不飽和羧酸類之衍生物之實施例為順丁烯二酐、檸康酐、衣康酐、丙烯酸甲酯、甲基丙烯酸甲酯、丙烯酸乙酯、甲基丙烯酸乙酯、丙烯酸丁酯、甲基丙烯酸丁酯、丙烯酸縮水甘油酯、甲基丙烯酸縮水甘油酯、順丁烯二酸一乙酯、順丁烯二酸二乙酯、反丁烯二酸一甲酯、反丁烯二酸二甲酯、衣康酸一甲酯、衣康酸二乙酯、丙烯醯胺、甲基丙烯醯胺、一順丁烯二醯胺、二順丁烯二醯胺、N,N-二乙基順丁烯二醯胺、N-一丁基順丁烯二醯胺、N,N-二丁基順丁烯二醯胺、一反丁烯二醯胺、二反丁烯二醯胺、N-一乙基反丁烯二醯胺、N,N-二乙基反丁烯二醯胺、N-一丁基反丁烯二醯胺、N,N-二丁基反丁烯二醯胺、順丁烯二醯亞胺、N-丁基順丁烯二醯亞胺、N-苯基順丁烯二醯亞胺、丙烯酸鈉、甲基丙烯酸鈉、丙烯酸鉀、及甲基丙烯酸鉀。甲基丙烯酸縮水甘油酯為較佳的接枝化合物。一或多個且較佳地為一個接枝化合物係接枝至該烯烴聚合物上。
於一個實施例中,該共聚物可含有酸基,該酸基係未經金屬鹽中和或經以金屬鹽中和。實施例為乙烯-丙烯酸共聚物、乙烯-甲基丙烯酸共聚物、丙烯-丙烯酸共聚物、丙烯-甲基丙烯酸共聚物、經以烯烴順丁烯二酐接枝之聚乙烯之共聚物、聚苯乙烯磺酸、或其類、或包含前述共聚物中之至少一者之組合。於一個實施例中,該酸基可經以金屬鹽中和。於該基板內之酸類或鹼類可經以金屬鹽中和。用於藉金屬鹽中和之陽離子為Li+、Na+、K+、Zn2+、
Ca2+、Co2+、Ni2+、Cu2+、Pb2+、及Mg2+。以鹼金屬鹽類為佳。
各個嵌段之重量平均分子量係於3000至250000克/莫耳之範圍,較佳地於6000至175000克/莫耳之範圍,及更佳地於8000至135000克/莫耳之範圍。該共聚物之重量平均分子量係於6000至500000克/莫耳之範圍,較佳地於12000至350000克/莫耳之範圍,及更佳地於16000至150000克/莫耳之範圍。
共聚物之一實施例為聚苯乙烯-嵌段-聚(4-乙烯基吡啶)。該聚苯乙烯嵌段具有30000至150000克/莫耳,較佳地於33000至135000克/莫耳之重量平均分子量,而該聚(4-乙烯基吡啶)嵌段具有2000至35000克/莫耳,較佳地於6000至30000克/莫耳之重量平均分子量。
以該溶液之總重為基準,共聚物係以0.05wt%至35wt%之量存在於該溶液。於一較佳實施例中,以該溶液之總重為基準,共聚物係以0.1wt%至0.5wt%之量存在於該溶液。
於摻雜該半導體基板之一個方法中,該摻雜劑前驅物及該共聚物係溶解於溶劑內及設置於該基板上。然後,該基板選擇性地藉由離心乾燥法、減壓乾燥法、或熱烤乾法處理以實質上蒸發去除該澆注溶劑。具有聚合物位在其上之該基板然後接受快速熱退火(又稱加熱)去除溶劑及輔助該半導體基板之摻雜。
該溶劑可為極性溶劑或非極性溶劑。溶劑之實施例為戊烷、環戊烯、醇類(例如,甲醇、乙醇、丁醇
等)、己烷、環己烷、苯、甲苯、1,4-二、氯仿、四氫呋喃、乙醚、二甲苯、均三甲苯、乙酸丙二醇甲醚、乙酸正丁酯、苯、甲苯、二氯甲烷、四氯化碳、己烷、乙醚等,或包含該等前述中之至少一者之組合。若有所需,可使用共溶劑。溶劑之實施例為甲苯及/或甲醇。
以該溶液之總重為基準,溶劑係以65wt%至99.95wt%,較佳地75wt%至98wt%及更特別地85wt%至95wt%之量存在於該溶液。於一較佳實施例中,以該溶液之總重為基準,溶劑係以99.5wt%至99.0wt%之量存在於該溶液。
該共聚物及該摻雜劑前驅物係添加至該溶劑以形成一溶液。溶液可接受攪動及接受升高之溫度以便輔助該聚合物之溶解。然後該溶液設置於該基板表面上。該基板表面在設置溶液冷其上之前可藉加熱或藉於溶劑內洗滌而預先清潔。
該溶液可藉旋塗法、滴注法、刮刀法、噴塗法、浸塗法、網印法、刷塗法等而設置於該基板上。塗覆該基板之較佳方法係透過旋塗法。該溶劑可自該基板表面蒸發去除留下共聚物塗覆膜設置於該基板上。該共聚物塗覆膜含有該摻雜劑。
第1圖為設置該摻雜劑於一基板上之方法實施例之示意圖。於此種方法中,該嵌段共聚物及該摻雜劑前驅物置於一溶劑內。該嵌段共聚物可與該摻雜劑前驅物錯合或包封之及相分離而形成球狀區域於該溶劑內,如
第1圖(a)顯示。第1圖(b)顯示已經設置於一基板上後之該溶液。如於第1圖(b)中可知,具有該摻雜劑前驅物嵌置於其中之該等球狀區域可促成在基板之表面上週期性間隔的結構之生成。退火處理可用以促進在該薄膜內由該球狀相分開的區域之形成。退火處理包括熱退火、溶劑蒸氣退火、微波退火、及梯度熱退火。當加熱該聚合物及基板時,該共聚物分解而留下該摻雜劑之濃縮區域在該基板內部。如於第1圖(c)中可知,此等區域乃週期性間隔開。
該共聚物塗覆膜(例如,第1圖(b)中之球狀區域層)作為其自身的封頂層,免除高度減壓蒸鍍一金屬氧化物層之需要,諸如二氧化矽層,其通常係用在既有的單層摻雜程序。又復,因該半導體基板係經以聚合物膜塗覆而非共價附接,也可免除非氧化性周圍條件的需要。
該共聚物塗覆膜之厚度可於數奈米(nm)至數百奈米(nm)之範圍,較佳地為3奈米至250奈米,及更佳地為5奈米至200奈米,及甚至更佳地為6奈米至120奈米。然而,預期可使用更薄的薄膜,只要小心避免針孔即可,針孔可能導致不均勻摻雜。若有所需,若小心減少退火後在該半導體基板上存在有增加的有機殘餘物,則也可使用更厚的膜。
然後,該基板連同設置其上之該共聚物塗覆膜接受退火(快速熱退火-RTA)至500℃至1500℃,較佳地700℃至1300℃之溫度歷時0.001秒至24小時,較佳地歷時0.01秒至12小時,及更佳地歷時0.1秒至3分鐘之時
間週期。退火可使用加熱對流、加熱傳導或輻射加熱進行。退火處理期間以對流式加熱為佳。
該退火可於真空或另外,於惰性氣氛下進行。合宜的惰性氣氛包括氮、氬、氖、氦、氮或二氧化碳。於一較佳實施例中,退火係於含氬之惰性氣氛下進行。
於該基板內部之所得摻雜劑濃度概況為基板之退火溫度及退火時間及該共聚物塗覆膜接受擴散之函數。其它影響因素為於退火溫度於半導體基板中之摻雜劑分子之溶解度及於退火溫度摻雜劑分子之擴散係數。如此,退火時間及退火溫度可視需要改變以達到期望的摻雜劑概況。因此,使用適當的低退火溫度及短退火時間,可獲得淺抵次5奈米之摻雜接面。
於退火期間,任何殘餘溶劑自該該共聚物塗覆膜蒸發,只留下聚合物。摻雜劑自含摻雜劑之聚合物擴散入該基板內至0.01奈米至1000奈米,較佳地0.05奈米至100奈米,較佳地0.09奈米至50奈米,及更佳地0.1奈米至10奈米之深度。該聚合物也可能降解,及降解產物能自該基板汽化。
於一個實施例中,該摻雜劑區域大小及該等摻雜劑區域之週期性係取決於該共聚物之分子量。隨著該共聚物之分子量增加,該區域間隔之週期性增大。隨著該嵌段之分子量增加,該平均摻雜劑區域之尺寸增大,及平均週期性也增加。
於一個實施例中,該平均摻雜劑區域之大
小為2奈米至100奈米。平均摻雜劑區域大小為該等摻雜劑區域之平均半徑。於另一個實施例中,該等摻雜劑區域之平均週期性為2奈米至200奈米。
此種摻雜方法輔助於電子裝置及電子物件諸如電晶體中以快速切換速度及高堆積密度形成源極、汲極、及通道延伸區之接面。額外應用包括,但非限制性,電晶體閘、奈米結構、二極體、光檢測器、光電池、及積體電路。
此處詳細說明之摻雜方法係藉下列非限制性實施例舉例說明。
本實施例驗證使用嵌段共聚物製造一經摻雜之基板,該嵌段共聚物具有氫鍵結能力,其與摻雜劑前驅物交互作用以形成球狀區域。
於此一實施例中,聚苯乙烯-嵌段-聚4-乙烯基吡啶(PS-b-P4VP)聚合物為該嵌段共聚物,4-羥基苯基二羥硼酸頻哪醇(pinacol)酯及氟銻酸六水合物係用作為摻雜劑前驅物。該聚合物及該等摻雜劑之結構式係描繪於第2圖。該溶劑為甲苯及甲醇。
具有不同分子量(顯示於下表1)之聚苯乙烯-嵌段-聚4-乙烯基吡啶(PS-b-P4VP)聚合物係購自聚合物來源(Polymer Source)且原封不動地就此使用。首先,該聚合物溶解於無水甲苯(5毫克/毫升)及於50℃攪拌5小時。於
一分開小瓶內,得自第2圖之適當摻雜劑前驅物溶解於1毫升甲醇。然後,不等量之該摻雜劑前驅物溶液添加至1毫升聚合物溶液而獲得具有不同的聚合物對摻雜劑前驅物莫耳比(1:0.1-1:0.5)之溶液。組合溶液於室溫攪拌24小時及隨後通過0.45微米(μm)PTFE過濾器過濾。此種合成製造具有不同大小及不同摻雜劑濃度之含摻雜劑之PS-b-P4VP球狀區域,其當組裝在基板之表面上且經熱退火時用在摻雜矽基板之離散奈米侷限體積是有用的。除了實用證據之外,組裝及退火處理之實施例提供如下。
聚苯乙烯-嵌段-聚4-乙烯基吡啶(PS-b-P4VP)乃典型二嵌段共聚物,其已知於「非極性」溶劑例如甲苯內自組裝成具有P4VP核心及PS外殼之球狀仿膠束狀聚集體。因該自組裝發生在該溶液相,此等聚集體之形態係與該等兩個嵌段之體積分量獨立無關,在甲苯內全部組裝成球狀聚集體。業已顯示針對強力分開的二嵌段共聚物於此等組裝中之聚集數目係取決於該等組成分嵌段之體積分量:
其中N A及N B分別為「核心」嵌段及「外殼」嵌段之聚合程度。針對PS-b-P4VP,Z 0=1.66,α=1.93及β=-0.73。如此,PS外殼及P4VP核心之相對尺寸容易藉變更N A及N B而在20奈米至60奈米之範圍內調整。
1H NMR光譜對局部環境的改變敏感。舉例言之,如於第3圖(A)中顯示,當聚合物鏈溶解於CDCl3時,自該等P4VP質子之共振出現在=8.5ppm化學移位。顯然因氯仿乃PS及P4VP二嵌段之良好溶劑,故該等聚合物鏈係呈非聚集態。相反地,相同聚合物在d8-甲苯中紀錄的1H NMR光譜顯示明顯地不存在有P4VP質子共振峰。此點指示P4VP質子於甲苯之延遲弛豫,於甲苯中該等聚合物鏈主要係呈聚集形式存在。
4-羥基苯基二羥硼酸頻哪醇(pinacol)酯(後文稱作SMB)之1H-NMR光譜顯示於第3圖(B)。如所預期,於CDCl3中及於d8-甲苯中之質子的化學移位不同。於兩種溶劑中,酚系-OH質子呈現為分開的單峰,=4.75ppm(甲苯)及=5.6ppm(氯仿)。於CDCl3中混合SMB與PS-b-P4VP結果導致錯合,如第4圖中顯示酚系-OH峰之消失可證。第4圖顯示聚合物加SMB混合物於a)CDCl3中及b)d8-甲苯中之1H-NMR光譜。又復,約在=6.75-7.75ppm的芳香族質子之共振證實了錯合物中SMB的存在。另一方面,當此種錯合係於d8-甲苯中進行時,未觀察得自SMB之芳香族質子之共振峰。如此指示由於SMB與P4VP嵌段之錯合,
故SMB已經成功地包封在聚合物球狀區域內部。
SMB之成功包封係進一步藉於薄膜幾何形狀紀錄在不同的P4VP-SMB錯合物上的FT-IR光譜證實。隨著SMB:P4VP比增高,可明確地區別某些波峰之強度及頻率的改變。
聚合物-SMB系統之FT-IR光譜部分顯示於第5圖。薄膜係藉將聚合物-SM溶液(如前製備)滴注在氯化鈉錠上製備。約3300cm-1之寬峰乃存在於SMB中的酚系-OH之特徵。但SMB與PS-b-P4VP因氫鍵結或質子化所致而錯合,結果導致此一峰的消失。此等資料進一步顯示4-羥基苯基二羥硼酸頻哪醇酯SM與該聚合物於固態透過酚系-OH基團而交互作用。
進行本實施例以驗證透過離心澆注法組裝摻雜劑聚合物膜。具有各種厚度(20奈米至30奈米)之聚合物膜以2000-3000rpm之速度自已經過濾之甲苯/甲醇溶液離心澆注至矽基板上。5毫克嵌段共聚物溶解於1毫升甲苯及於60℃攪拌4小時。10毫克二羥硼酸頻哪醇酯(SMB)溶解於1毫升甲醇,獲得10毫克/毫升之終溶液。然後,適量之此種溶液(0.01毫升-0.1毫升)添加至聚合物溶液以獲得具有在1:0.1至1:1間變化的聚合物對摻雜劑比之不同溶液。此等溶液於室溫攪拌12-24小時及通過0.45微米PTFE過濾器過濾。75微升(μL)適當溶液置於1厘米×1厘米正方塊經潔淨之矽基板上及以2000-3000rpm之速度
離心。允許該溶劑於周圍條件下汽化而產生乾膜。此等膜之標稱厚度為20奈米至30奈米,且發現取決於該嵌段共聚物之分子量(參考表1有關所使用的聚合物之分子量)。含摻雜劑分子之球狀區域P4VP嵌段以六角形緊密堆積形態在矽基板上組裝。聚苯乙烯嵌段填補間隙空間界定了球狀區域間之距離。表2列出沈積於矽上的PS-b-P4VP聚合物薄膜之球狀區域聚集體之大小及間隔。摻混第2圖中列出之小分子不會改變自PS-b-P4VP薄膜組裝的球狀區域之大小、形狀或形態。
摻雜劑自已乾燥的聚合物膜擴散入下方基板係透過波峰快速熱退火(RTA)提供,結果導致奈米級長度的侷限摻離。該等基板在惰性氬氣氣氛下藉由自室溫歷時5秒加熱至不等溫度(600℃-1000℃),及於此等溫度維持0.1秒至60秒之退火時間,接著快速冷卻回室溫進行熱退火。
摻雜劑擴散入矽基板之擴散深度概況係使用伴以離子濺鍍之二次離子質譜儀(SIMS)測定。如從第6
圖中之SIMS濺鍍概況顯然易見,於不同莫耳濃度(10mol%-50mol%)系統針對聚合物之全部分子量,全部退火時間(0.1大-60秒)用於PS-b-P4VP:SMB之900℃RTA退火中之硼濃度係限制於基板表面的頂上15奈米。更明確言之,可估計硼穿透深度距表面約為12奈米。比較上,空白基板本身在RTA之後不會顯示可察覺之摻雜劑劑量及穿透。
須注意SIMS分析期間離子產率之絕對值係對局部氧濃度極為敏感。如此,基板之表面的氧化經常導致誤導性高濃度。以第6圖之對照試樣為例,空白矽基板含有約1016-1018硼原子/立方厘米之一背景濃度。因此,在該基板之表面存在有誤導量之硼(灰資料點)。更適宜地,於相同的分析條件下,使用含摻雜劑之聚合物退火的基板或使用不含摻雜劑之聚合物退火的基板間之硼濃度之相對差異乃由含摻雜劑之聚合物誘使硼劑量實際增高之實際表現。
也須注意得自SIMS分析之組成資訊係就離子束之點大小(約100微米)求取平均值。因此理由,奈米級的有關橫向侷限摻雜區之資訊遺失,局部濃縮摻雜劑區域之報告濃度被低估(理論上可使用1.75之倍增因數來調整適當濃度)。遵照如下章節,電子顯微術用以闡明該橫向侷限摻雜,但不幸地,因缺乏矽與硼之Z-反差之故,摻硼試樣無法進行。
已擴散摻雜劑之電氣激化係使用四點探針測量研究,及資料摘述於第7圖。片電阻(Rs)係在使用SIMS
分析之全部試樣上測量。首先,在使用小分子量、中分子量及大分子量嵌段共聚物樣板摻雜的基板之Rs值間有明顯區別。小分子量嵌段共聚物(集合1,PS27k-b-P4VP7k)之Rs值為最低,而高分子量嵌段共聚物(集合3,PS109k-b-P4VP27k)之Rs值為最高;中分子量嵌段共聚物(集合2,PS58k-b-P4VP18k)之Rs值係位在該等兩個極端間。其次,因該等接面之高電阻本質,由極短的退火時間亦即0.1秒所形成的集合2接面及集合3接面未能測量得片電阻。因硼於矽之擴散為退火時間及退火溫度之函數,發明人假設集合2及集合3中之較高電阻係因硼自相鄰區域之有限擴散所致。如此導致不良連接的區域。考慮在該低分子量PS-b-P4VP膜聚合物前驅物膜中之富硼區域遠更緊密間隔,而隨著分子量的增高而漸進地間隔遠離(參見表2),此點相當合理。
第8圖顯示已組裝之PS-b-P4VP聚合物薄膜在RTA摻混之前的分接模式AFM影像;具有不等大小及不等間隔之球狀聚集體清晰可見,各個影像相對應於一特定分子量:a)PS27k-b-P4VP7k;b)PS58k-b-P4VP18k;c)PS109k-b-P4VP27k。
第9圖顯示下列之3-D表面拓樸結構:a)矽基板;b)波峰-RTA前之PS58k-b-P4VP18k:SMB(1:0.5)膜;於900℃波峰-RTA後之PS58k-b-P4VP18k:SMB(1:0.5)膜歷時c)0.1秒,d)1秒,e)10秒,及f)60秒。乾淨矽(Si)基板具有高度約1奈米之表面粗度特徵結構,而在該PS58k-b-P4VP18k:SMB聚合物沈積後,觀察得平均15奈米之
特徵結構大小。在RTA退火之後,(C-F)表面特徵結構之高度降至約5奈米,指示該等球狀區域之密化。將此等AFM影像與四點探針分析及SIM分析交互關聯,有明確證據證實得自PS58k-b-P4VP18k:SMB之硼摻混入下方矽且保有具有奈米侷限之電子上(且可能物理上)離散區。
進行本實施例以驗證透過嵌段共聚物之波峰快速熱退火以銻摻雜。為了驗證使用超大分子嵌段共聚物RTA摻雜辦法摻雜劑包涵之多樣性,及為了協助測定電子顯微術之特性,如前文描述發展出PS-b-P4VP:氟銻酸六水合物(後文稱作SMSb)摻雜系統。類似PS-b-P4VP:SMB系統,當薄膜形成時,PS-b-P4VP:SMSb在矽基板上組裝成六角形緊密堆積相。又復,當於900℃或1000℃歷時0.1秒進行RTA時,SIMS深度概況分析顯示銻擴散入矽基板內(第10圖)。第10圖顯示於900℃(綠)、950℃(藍)及1000℃(紅)歷時1秒之波峰RTA之後在基板上之SIMS銻(Sb)濃度;圓圈資料點相對應於PS27k-b-P4VP7k:氟銻酸六水合物SM聚合物對SMSb比為1:0.5,銻之濃度概況呈距該表面之深度之函數;灰資料點相對應於空白基板之銻濃度。
於1000℃之較高退火溫度觀察得有較大劑量(表面濃度較高及穿透深度較深兩者)之銻擴散入矽內。比較於確切RTA條件(900℃歷時1秒)下硼之擴散,觀察得較少量銻熱擴散入該矽基板內。此點係與銻相較於硼或磷之大容積溶解度較低及擴散係數較低有關,如表3中顯示。
電子顯微攝影技術(TEM-透射電子顯微術,SEM-掃描電子顯微術)係用以測定在RTA之前及在RTA之後含銻摻雜劑區之相關空間資訊。如先前描述,發明人將銻(Sb)前驅物摻混入發明人的P4VP聚集體內部以便輔助發明人之奈米侷限摻雜區的電子成像。不似摻雜於單晶矽基板上,結果所得的含銻摻雜劑之球狀區域與該薄膜接受在厚15奈米之多晶矽窗上的波峰RTA。退火前及退火後之TEM影像顯示於第11圖。第11圖顯示於(左)RTA之前及(右)於矽上於900℃的波峰RTA之後,嵌置於該聚合物膜內之銻叢簇之TEM影像。
聚合物膜(左)與退火後TEM基板之顯微照片間之差異極為清楚。於前者,嵌置於聚合物膜內的銻叢簇(黑圈)係經明確地界定且驗證準六角形堆積順序。此種形態係與使用AFM觀察得之形態相同。此等叢簇具有約20奈米之平均直徑及約30奈米之最近相鄰叢簇中心至中心距離。於該等退火後基板中,銻叢簇保有其一般形狀及六角形堆積順序,但略有變形。初步AFM測量值似乎指示該等基板在RTA後之表面拓樸結構並不平坦,且確實顯示
奈米大小之區域。但如第9圖顯示,在RTA之前(第9圖B)與在RTA之後(第9圖C至第9圖F)間之表面特徵結構之高度差大於10奈米。結合SIMS資料,可獲得結論:在波峰-RTA之前摻混於該薄膜內之大部分硼擴散入下方基板內。此外,在RTA後之殘留表面特徵結構之離散本質也在該等摻雜區之離散度指示。
第12圖顯示顯微照相其比較在波峰-RTA之前,PS58k-b-P4VP18k:SMSb薄膜之分接模式AFM(左)影像與TEM(右)影像;兩個影像中之準六角形形態學明顯,具有相同尺寸之離散富銻球狀區域。
組合PS-b-P4VP:SMB摻雜系統及PS27k-b-P4VP7k:SMSb摻雜系統之SIM深度概況、AFM成像、四點探針分析、及TEM影像分析(只使用於銻),有大量證據顯示於此等快速熱退火-RTA條件下硼及銻之摻雜於矽不僅侷限硼及銻至低於10奈米之深度,同時硼及銻也被橫向侷限於兩個維度之離散奈米尺寸區。就發明人所知,此乃使用RTA摻雜處理產生的3D奈米侷限摻雜劑區之首度驗證。此乃針對各種電子裝置朝向界定特定摻雜區之一重要步驟。
如由第11圖及第12圖中之資料可知,該基板中之摻雜劑之大小及週期性隨著嵌段共聚物之分子量而增加。摻雜劑濃度係於1018至1021原子/平方厘米之範圍。
此處描述之摻雜可用以生成二維摻雜基板或三維摻雜基板。舉例言之,該摻雜可應用於有紋理之基
板及具有凸部之三維基板。
Claims (13)
- 一種摻雜基板之方法,包含:設置包含共聚物、含有摻雜劑之摻雜劑前驅物及溶劑之組成物之塗覆層於基板上;其中該共聚物當於溶液內或於該基板之表面上時能夠相分離及嵌置該摻雜劑前驅物;及於550℃至1300℃之溫度退火該基板歷時0.1秒至24小時,以將該摻雜劑擴散入該基板內。
- 如申請專利範圍第1項所述之方法,其中該摻雜劑係選自於硼、磷、砷、銻、鋁、銦、及鎵。
- 如申請專利範圍第1項所述之方法,其中該基板為半導體基板。
- 如申請專利範圍第3項所述之方法,其中該基板包含矽、鍺、砷化鎵、砷化銦、磷化銦、及砷化銦鎵中之一或多者。
- 如申請專利範圍第1項所述之方法,其中進行單一退火步驟。
- 如申請專利範圍第1項所述之方法,其中該摻雜劑係擴散入該基板內至小於或等於()10奈米之深度。
- 如申請專利範圍第1項所述之方法,其中該共聚物為包含至少一個嵌段與該摻雜劑前驅物進行氫鍵結或離子鍵結之嵌段共聚物。
- 如申請專利範圍第1項所述之方法,其中該嵌段共聚物為聚苯乙烯-b-聚(4-乙烯基吡啶)。
- 如申請專利範圍第1項所述之方法,其中該摻雜劑前驅物為4-羥基苯基二羥硼酸頻哪醇(pinacol)酯、氟銻酸六水合物、或包含前述摻雜劑前驅物中之至少一者之組合。
- 一種半導體基板,係包含:直徑3奈米至30奈米之嵌置摻雜劑球狀區域;其中該區域包含13族原子或15族原子,其中該嵌置摻雜劑球狀區域係位在該基板表面之30奈米以內。
- 如申請專利範圍第10項所述之半導體基板,係包含矽。
- 如申請專利範圍第10項所述之半導體基板,其中該嵌置摻雜劑球狀區域於該基板內顯示週期性。
- 如申請專利範圍第10項所述之半導體基板,其中13族原子或15族原子之該區域係進一步擴散入該基板內以破壞或削弱該嵌置摻雜劑球狀區域,以形成更加連續濃度之摻雜劑原子。
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CN106229257A (zh) * | 2016-08-10 | 2016-12-14 | 北京大学 | 一种实现超陡峭掺杂梯度和超浅结深的分子层掺杂方法 |
CN109666334A (zh) * | 2017-10-17 | 2019-04-23 | Tcl集团股份有限公司 | 墨水及其制备方法与应用、及薄膜晶体管的制备方法 |
JP6480087B1 (ja) * | 2018-02-02 | 2019-03-06 | 新電元工業株式会社 | 半導体装置の製造方法 |
US20200020538A1 (en) * | 2018-07-11 | 2020-01-16 | Rohm And Haas Electronic Materials Llc | Patterned discrete nanoscale doping of semiconductors, methods of manufacture thereof and articles comprising the same |
CN113451139B (zh) * | 2021-06-23 | 2022-05-03 | 复旦大学 | 一种基于PTFE对TMDCs进行p型掺杂的方法及半导体 |
CN115117198A (zh) * | 2022-05-16 | 2022-09-27 | 上海交通大学 | 一种δ掺杂层制备方法及电子器件 |
US11840609B1 (en) * | 2023-04-12 | 2023-12-12 | King Faisal University | Method to prepare superhydrophobic sheets from virgin and waste polypropylene |
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