TWI559473B - 半導體邊界保護密封劑 - Google Patents

半導體邊界保護密封劑 Download PDF

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Publication number
TWI559473B
TWI559473B TW104113157A TW104113157A TWI559473B TW I559473 B TWI559473 B TW I559473B TW 104113157 A TW104113157 A TW 104113157A TW 104113157 A TW104113157 A TW 104113157A TW I559473 B TWI559473 B TW I559473B
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Taiwan
Prior art keywords
semiconductor
wafer
protective
active circuit
circuit layer
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TW104113157A
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English (en)
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TW201620094A (zh
Inventor
子群 趙
蓋倫 柯克帕特里克
立德 羅
雷澤厄 拉曼 卡恩
明王 施
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美國博通公司
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Publication of TW201620094A publication Critical patent/TW201620094A/zh
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Publication of TWI559473B publication Critical patent/TWI559473B/zh

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    • H01L23/3157—Partial encapsulation or coating
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Description

半導體邊界保護密封劑
本申請根據於2014年10月20日提交的美國申請第14/518,947號和2014年8月15日提交的美國臨時申請第62/037,899號主張優先權，其全部內容通過引用結合於此。
本發明係關於半導體封裝。
半導體封裝可以是包含一個或複數個半導體電子元件的金屬殼、塑膠殼、玻璃殼、或者陶瓷殼，也稱為裸片(die)或者積體電路(IC)。封裝提供對衝擊和腐蝕、以及環境因素(例如濕氣、氧化、高溫、及污染物)的保護措施。電接觸或者導線從封裝伸出並被連接到其他裝置和/或至中間的基板，或者直接至電路板。封裝可以僅有兩個導線或者接觸用於例如二極體的裝置，或者在微處理器的情況下具有幾百個導線或者接觸。
半導體封裝可以是專用的獨立裝置，可以裝配至最終產品的印刷電路板(PCB)或者印刷線路板(PWB)。IC可以連接至各種佈置的基板，以及堆疊多層。另外，封裝可以裝配在其他封裝之上以形成封裝堆疊裝置。半導體封裝也可以裝配至柔性電路，例如膠帶。
具有幾個特徵與功能的用戶產品會變得更加複雜。另外，許多用戶產品變得更小。因此，製造商利用封裝替代作為在更小的區域或者體積中達到更多特徵與功能的方法。
半導體封裝可以完全以晶圓級製造，包括以柵陣列配置製作單個IC、多級金屬噴鍍、封裝、及焊球的黏接(或者其他傳導性互連)。完成的晶圓然後被分離，即，分為單個的封裝的IC。
分離的通用方法是沿著IC之間的劃片街區(saw street)鋸切晶圓。晶圓劃片完全切割穿過單個封裝的IC。然而，鋸切可能損傷接近切口的區域，尤其介質層與金屬噴鍍層。另外，由於在分離步驟中的密封圈的損傷，裸片塗層可能變得與金屬噴鍍層分層。因此，分層可能穿透裸片的密封圈內部，並且導致IC的最終失敗。附加步驟也可能導致分層繼續傳播。其他類型的分離包括隱形切片和電漿切片。
在實施方式中，半導體封裝包括包含有源電路層的半導體單元。半導體封裝還包括有源電路層上的複數個接合焊盤，複數個接合焊盤被配置為連接至相應的外部導電連接器。半導體封裝還包括填充有源電路層的所有凹槽邊緣的保護密封塗層。保護密封塗層包含外部晶圓分離表面(exterior wafer-singulated surface，外部被單一化晶圓表面)。
較佳為前述外部晶圓切割表面(exterior wafer-cut surface，外部被切割晶圓表面)包括鋸切、蝕刻或者雷射改變的邊緣的一個或複數個。
較佳為前述保護密封塗層至少部分地覆蓋前述半導體單元的裸片(die)的周邊。
較佳為前述半導體封裝進一步包括焊球外部導電連接器。
較佳為前述半導體封裝進一步包括接合線外部導電連接器。
較佳為前述半導體封裝進一步包括附加保護密封塗層，係圍繞前述有源電路層上的前述外部導電連接器。
較佳為前述半導體封裝進一步包括附加保護密封塗層，係在前述半導體單元的非活性表面上。
較佳為前述保護密封塗層減少或者消除圍繞每個前述半導體單元的密封圈。
在另一種實施方式中，半導體封裝包括具有有源電路表面和非活性表面的半導體單元。半導體封裝還包括沿著有源電路表面的所有暴露的邊緣形成並且部分地沿著半導體單元的裸片邊緣延伸的凹槽。半導體封裝還包括填充在凹槽內並具有切割的、鋸切的、蝕刻的、或者雷射修改的外部表面的保護密封塗層。
較佳為前述裸片邊緣的剩餘部分包含晶圓切割邊緣。
較佳為前述凹槽沿著前述半導體單元的前述裸片邊緣延伸。
較佳為前述保護密封塗層的前述切割的、鋸切的、蝕刻的、或者雷射改變的外表面沿著前述半導體單元的前述裸片邊緣延伸。
較佳為前述半導體封裝進一步包括保護密封塗層，在前述半導體單元的前述非活性表面上。
較佳為前述半導體封裝進一步包括複數個焊球，係以球柵陣列在前述有源電路表面上。
較佳為前述半導體封裝包括焊線接合的半導體封裝(wire-bonded semiconductor package)。
較佳為前述保護密封塗層取代圍繞每個前述半導體單元的密封圈。
在另一種實施方式中，製造半導體封裝的方法包括將載帶(carry tape)黏至半導體晶圓的非活性表面。方法還包括在前述半導體晶圓的半導體單元之間切割或者蝕刻凹槽。凹槽通過半導體晶圓的有源電路層切割或者蝕刻。方法還包括將保護密封塗層材料施加到半導體單元之間的凹槽中，並通過保護密封塗層材料分離(singulate，單一化)半導體單元。
較佳為前述方法進一步包括將膜黏至前述半導體晶圓的外部導電連接器；以及圍繞前述外部導電連接器施加前述保護密封塗層材料
較佳為前述方法進一步包括穿過前述半導體單元之間的前述半導體晶圓切割或者蝕刻前述凹槽。
較佳為前述凹槽通過切割與蝕刻步驟的組合來形成。
較佳為前述施加發生在外部導電連接器連接至前述半導體單元之前。
較佳為前述方法進一步包括照射並去除通過遮罩中的開口暴露的前述保護密封塗層材料，前述開口對應於前述有源電路層的下面的接合焊盤。
較佳為前述方法進一步包括在仍以晶圓形式的封裝之後或者作為分離的前述半導體單元的最後測試，利用裸片探測器測試前述半導體單元。
在另一種實施方式中，製造半導體封裝的方法包括將複數個半導體元件以板條格式或陣列格式黏至黏性載體。格式包含相鄰的每對半導體元件之間的間隙。方法還包括在間隙內施加模塑料(mold compound)，其中，模塑料圍繞所有暴露的有源電路邊緣。方法還包括通過施加的模塑料分離複數個半導體元件。
較佳為前述方法進一步包括將外部焊球連接至有源電路層的相應的接觸焊盤；以及在前述有源電路層上施加前述模塑料以包圍連接的前述外部焊球。
較佳為前述方法進一步包括在前述有源電路層與施加至前述外部焊球的底表面的膜之間的前述有源電路層上施加前述模塑料。
較佳為前述方法進一步包括雷射燒蝕施加至前述外部焊球的底表面的前述模塑料。
較佳為前述方法進一步包括通過暴露的裸片模套(exposed die chase)或者壓模(compression mold)之一，在前述間隙內和前述有源電路層上施加前述模塑料。
較佳為前述方法進一步包括在施加至前述複數個半導體元件的背表面的前述模塑料上標記前述複數個半導 體元件。
較佳為前述複數個半導體元件包括重組的半導體元件。
較佳為前述方法進一步包括在以面板形式的裸片重組和鑄模成型之後、在成型的面板被分成條狀之後、或者作為分離的前述半導體元件的最後測試，測試前述複數個半導體元件。
已經通過總體介紹的方式提供前述段落，但不限制於以下申請專利的範圍。通過參照以下結合附圖所做的詳細描述，可更好理解所描述的實施方式和另外的優點。
本公開內容的更完整的評價和其許多附帶的優點將容易地被獲得，如同通過結合附圖所考慮的以下詳細描述而變得更好理解。
100、315、345、410、510、610、1330、1440、1510、1630、1720‧‧‧晶圓
110、1110、1840‧‧‧IC
120‧‧‧非活性表面
130、335、365、435、620、1320‧‧‧活性表面
140‧‧‧接觸焊盤
310、400‧‧‧晶圓級球柵陣列/WLBGA
320、350、420、530、650、710、800、920、1000、1410、1420、1820‧‧‧半導體單元
330、430、630、2030‧‧‧焊球
340‧‧‧晶圓級柱柵陣列
360‧‧‧導體支柱/銅柱
370‧‧‧線
440、640、1230、1350、1530‧‧‧載帶
450、660‧‧‧第一切口
460、720、910‧‧‧膠帶
470、535、930、1430‧‧‧保護材料
475‧‧‧IC區域
480‧‧‧密封圈
485‧‧‧劃線街區
520‧‧‧第二切口
540‧‧‧分離封裝
730‧‧‧保護塗層
1120‧‧‧基板
1130‧‧‧焊料凸塊
1135、1145‧‧‧接合焊盤
1150‧‧‧接合線
1210‧‧‧半導體晶圓
1220、1450、1520、1620、1850‧‧‧有源電路層
1240‧‧‧第一凹槽
1540‧‧‧第一凹槽/晶圓凹槽
1310、1610、1730‧‧‧遮罩帶
1340‧‧‧劃片街區
1360‧‧‧開口
1370‧‧‧保護密封填充材料
1710、1830‧‧‧保護密封材料
1810‧‧‧分離
2010‧‧‧重組半導體元件
2020‧‧‧黏性載體
2040‧‧‧保護塗層材料
2050‧‧‧單元
1900、2300‧‧‧方法
S1910、S1920、S1930、S1940、S2310、S2320、S2330‧‧‧步驟
圖1A至圖1B分別是根據一種實施方式的IC晶圓與單個分離的(singulated)IC的示意圖。
圖2A至圖2B是根據一種實施方式的IC的活性表面上的接合焊盤圖案的示意圖。
圖3A至圖3D分別是根據一種實施方式的具有外部連接器的晶圓的剖視圖。
圖4A是根據一種實施方式的具有劃片街區槽(saw street groove)的晶圓級球柵陣列(WLBGA)的剖視圖。
圖4B是根據一種實施方式的具有保護塗層填充的劃片街區槽的WLBGA的剖視圖。
圖4C是根據一種實施方式的具有密封圈的晶圓級IC的俯視圖。
圖4D是根據一種實施方式的沒有密封圈的晶圓級IC的俯視圖。
圖5A至圖5B分別是根據一種實施方式的分離的半導體單元的剖視圖與3D仰視圖。
圖6是根據一種實施方式的切割為半導體單元的全部晶圓的剖視圖。
圖7是根據一種實施方式的半導體單元之間填充的保護塗層的剖視圖。
圖8A至圖8B分別是根據一種實施方式的分離半導體單元的剖視圖與3D仰視圖。
圖9是根據一種實施方式的在半導體單元之間並且在半導體單元的頂部填充的保護塗層的剖視圖。
圖10A至圖10B分別是根據一種實施方式的分離的半導體單元的剖視圖與3D仰視圖與俯視圖。
圖11A是根據一種實施方式的將要連接至基板的BGA半導體單元的剖視圖。
圖11B是根據一種實施方式的連接至基板的焊線接合的半導體單元的剖視圖。
圖12A是根據一種實施方式的晶圓的剖視圖。
圖12B是根據一種實施方式的具有劃片街區槽的晶圓的剖視圖。
圖13A是根據一種實施方式的具有劃片街區槽和黏接的遮罩帶(mask tape)的晶圓的剖視圖。
圖13B至圖13C分別是根據一種實施方式的晶圓的圖案化遮罩帶與保護填充的凹槽的剖視圖。
圖14A至圖14B分別是根據一種實施方式的分離的半導體單元的剖視圖與3D仰視圖。
圖15是根據一種實施方式的具有兩個劃片街區槽的晶圓的剖視圖。
圖16是根據一種實施方式的具有施加的載帶(carry tape)和遮罩帶的晶圓的剖視圖。
圖17A至圖17B顯示根據一種實施方式的具有保護填充的劃片街區的晶圓的剖視圖。
圖18A至圖18B分別是根據一種實施方式的分離半導體單元的剖視圖與3D仰視圖。
圖18C至圖18D分別是根據一種實施方式的分離的半導體單元的剖視圖與3D底視與俯視圖。
圖19是根據一種實施方式的用於製造半導體封裝的方法的流程圖。
圖20A顯示根據一種實施方式的重組半導體元件的陣 列。
圖20B顯示根據一種實施方式的在重組半導體元件陣列上的模塑料。
圖20C顯示根據一種實施方式的在雷射燒蝕之後的重組半導體元件陣列。
圖20D顯示根據一種實施方式的雷射燒蝕的重組半導體元件陣列的分離。
圖20E顯示根據一種實施方式的單獨封裝的重組半導體元件。
圖20F顯示根據一種實施方式的單獨封裝的重組半導體元件的保護密封塗層的特寫圖示。
圖21顯示根據一種實施方式的具有黏至黏性載體的焊球的重組半導體元件的鑄型步驟。
圖22A至圖22B顯示根據一種實施方式的晶圓或者重組的半導體元件的塑封模套(mold chase)與柔性焊盤鑄模成型步驟。
圖23是根據一種實施方式的用於製造半導體封裝的方法的流程圖。
IC可以以晶圓級形式製造，其中，10個、100個、或者1000個IC形成在單個半導體晶圓內。晶圓材料可以是矽、砷化鎵、或者其他半導體材料。參考附圖，其中，幾個視圖中相同參考標號代表相同的或者對應的部分，圖1A顯示包含複數個IC 110的晶圓100。IC 110在形狀上可以是正方形或者矩形，以及適於具體製造步驟的其他形狀。
圖1B顯示IC 110的截面區域。IC 110具有非活性表面120和活性表面130。活性表面130具有複數個導電接觸區域或者接觸焊盤140，該複數個導電接觸區域或者接觸焊盤140設計成能使IC 110與其他裝置或者基板互連。IC接觸焊盤140可以具有多層，稱為凸點下金屬噴鍍(UBM，under-bump metallization)。基導電層可以包含鋁。因為焊料沒有很好地黏至鋁，所以另一個金屬層或者導電層可以在鋁墊片上圖案化。例示之UBM包括鋁、鎳釩、及銅的組合。然而，本文中描述的實施方式考慮幾個其他 UBM材料。本文中之後所指的接觸焊盤可以包括UBM層。
接觸焊盤140可以佈置成各種配置，取決於其將連接至另一個裝置或者基板的介質。圖2A顯示IC 110的俯視圖，俯視圖顯示主要佈置在IC 110的活性表面130的中心的複數個接觸焊盤140。該配置可以用於倒裝晶片類型的裝置，其中，裝置可以具有連接至接觸焊盤140的焊料凸塊或者銅柱。倒裝晶片裝置和連接的焊料凸塊被“翻轉”並連接至另一個裝置或者基板的接觸焊盤。圖2B顯示IC 110的俯視圖，俯視圖顯示主要圍繞IC 110的活性表面130的周邊佈置的複數個接觸焊盤140。該配置可以用於焊線接合類型的裝置。例如焊線接合裝置作為堆疊的裝置，或者將並排的焊線接合裝置黏接。接合線將焊線接合裝置的接觸焊盤140連接至另一個裝置或者基板的接觸焊盤。
圖3A是晶圓級球柵陣列(WLBGA)310的剖視圖，包含晶圓315和複數個半導體單元320。WLBGA 310也可以稱為晶圓級晶片尺寸封裝(WLCSP)，封裝的尺寸與晶片的尺寸相同或者僅稍微大於晶片的尺寸。每個半導體單元320包含IC和晶圓315的活性表面335上的複數個焊球330。圖3A是簡化的圖示，其中，僅顯示四個半導體單元320。足夠尺寸的晶圓315可以在剖視圖中具有更多的半導體單元320，例如在圖1A中的晶圓100。
圖3B是晶圓級柱柵陣列340的剖視圖，包含晶圓345和複數個半導體單元350。導體支柱360位於晶圓345的活性表面365上。導體支柱360是導電支柱，包含例如具有焊料表面塗層的銅芯。
圖3C顯示具有焊料蓋的銅柱360的外部連接。圖3D顯示線370外部連接。
圖4A是WLBGA 400的剖視圖，包含晶圓410和複數個半導體單元420。焊球430黏接至球柵陣列(BGA)中的晶圓410的活性表面435。其他配置包括但不限於此，細間距球柵陣列(FBGA)、針柵陣列(PGA)、柱柵陣列(CGA)、脊柵陣列(LGA)、Z互連陣列、以及其他。載帶440黏至晶圓410背面的非活性表面以在整個製造步驟中使半導體單元420保持在適當的空間佈局中。圖4A還顯示每個半導 體單元420之間的凹槽或者第一切口450。在實施方式中，雷射光束在每個半導體單元420之間的劃片街區穿行。第一切口450穿透活性表面435以去除劃片街區內的介電材料與金屬噴鍍。雷射光束還部分地切割穿過晶圓410。在其他實施方式中，電漿腐蝕或者機械鋸切可以用於第一切口450。
圖4B是WLBGA 400的剖視圖，其中，圖4A的載帶440已經去除。例如載帶440的黏帶可以通過機械去膠帶或者施加紫外線光至載帶440以使膠帶的黏性無效。膠帶460已經黏至焊球430的底表面。膠帶460的上表面具有厚的黏合層，其中，該黏合層圍繞每個焊球430。當在隨後步驟中施加真空時，黏合材料向上流動以部分地圍繞每個焊球430，使得在每個焊球430的底表面上的膠帶460中形成凹槽。然而，非黏帶也可以用於膠帶460。在其後的步驟，保護材料470填充在形成在晶圓410的活性表面435與膠帶460的頂表面之間的間隙內以包圍焊球430的暴露部分。保護材料470還填充通過第一切口450形成的劃片街區凹槽。施加真空以提高保護材料470的毛細流動以到達並填充晶圓410與膠帶460之間的所有的開放空間並且填充通過第一切口450形成的凹槽內。
保護材料470在劃片街區凹槽內並且沿著活性表面435提供保護密封塗層。保護材料470由熱固膠黏劑、使用膜輔助鑄模成型的模塑料、或者環氧樹脂製成。本文中描述的實施方式也考慮沿著半導體裸片的表面提供密封和保護塗層的其他材料。
在一種實施方式中，焊球430在凸出高度上約200微米。膠帶460的黏合材料圍繞焊球430約100微米的高度。這留下約100微米的差距，其中，保護材料470存在於活性表面435與膠帶460之間。本文中描述的實施方式考慮其他大小的保護材料470，並且將基於半導體元件的類型、材料、及大小不同。
圖4C顯示晶圓級形式的一些IC的俯視圖。圖4C僅顯示晶圓的部分圖示，因為在晶圓上可能存在更多的IC。IC區域475位於結構的中心，被密封圈480包圍。密封圈 480被用於保護IC。在實施方式中，密封圈480可以由兩個金屬圍欄製成，其中，每個金屬層上的金屬平面具有在金屬平面之間的金屬通孔。作為一個例子，兩個金屬圍欄的寬度可以是幾微米，例如2至5微米的寬度並且在金屬圍欄中間分開幾微米。劃線街區485存在於每個IC區域475與它的密封圈480之間。
本文中描述的用於保護性邊緣密封劑的實施方式提供減少或者完全去除密封圈，如在圖4D中顯示的。這在IC之間提供更大的區域。因此，IC可以一起更接近以利用更多的晶圓空間，並且產生每個晶圓的更多數量的總裸片。
在圖5A中，已經去除圖4B的膠帶460，並且晶圓510在半導體單元530之間的第二切口520中分離。劃片切割穿過半導體單元530之間的保護材料535，並且還切割穿過其餘的晶圓510以使半導體單元530遠離彼此完全分離。因為保護材料535存在於活性表面上以及凹槽內，所以晶圓劃片在執行第二切口520時，破壞介電層或者金屬噴鍍層。產生的分離封裝540具有在裸片的所有四個側邊緣並部分向上形成並且在圍繞每個焊球的活性表面上的保護材料。圖5B是分離封裝540的底部三維圖示。
圖6是另一實施方式的剖視圖600，顯示具有活性表面620的晶圓610、和連接至活性表面620的焊球630。晶圓610的非活性表面黏至載帶640以保持分離後的半導體單元650的空間佈局。製成第一切口660，在第一切口660中，晶圓610被部分地切割，例如在圖4A中顯示的。例如，第一切口660可以通過雷射刻槽製成。第一切口的例示是寬度為50微米至70微米。然而，本文中描述的實施方式考慮其他大小以適應半導體單元650的不同類型、材料、及尺寸。第二切口在劃片街區槽內製成以完全切穿晶圓610。第二切口延伸到載帶640中，但是沒有完全切穿載帶640。第二切口可以通過機械鋸切製成。替代地，代替兩個單獨的切口，可以通過電漿腐蝕或者機械鋸切製成單個切口。
載帶640保持半導體單元650的空間佈局，並且黏至晶圓邊緣(未圖示)以提供剛性框架。另一實施方式包括使 載帶640延伸，即，拉長載帶640，這可以通過對晶圓邊緣內的載帶640的背面按壓執行。這提供半導體單元650之間的更大的間隙(是寬度的兩倍)，即，100微米至140微米，如在圖6的底部附圖中顯示的。這使得提供更大的間隙，而無需實際上鋸切那樣大的切口。在該例示中，製成50微米至70微米的切口，但實現100微米至140微米的寬度。
圖7是顯示缺少圖6的載帶640的剖視圖。另一個膠帶720黏至半導體單元710的焊球的底表面。附貼至膠帶720的半導體單元710可以是與圖6相同的半導體單元和相同的佈局，或者半導體單元710可以是黏至膠帶720用於進一步處理的幾個選擇單元。膠帶720可以是圍繞焊球的黏帶或者非黏帶。保護塗層730從半導體單元710的上位置填充到劃片街區槽中，並且在半導體單元710與膠帶720之間的活性表面上。替代地，保護塗層730在上表面仍黏至圖6中顯示的載帶640的同時從半導體單元710的下表面填充。
在圖8A中，在每個相鄰的裸片之間切割保護塗層，但是沒有切穿半導體單元的任何有源電路。分離的半導體單元800除了具有活性表面上圍繞焊球的保護塗層，還具有在所有的四個側邊緣的整個表面上的保護塗層。圖8B是分離的半導體單元800的底部三維圖示。
圖9是在與上述實施方式類似的處理之後的黏至四個半導體單元920的膠帶910的剖視圖。膠帶910也可以是膠帶圍繞焊球的非黏帶。保護材料930填充在半導體單元920之間及頂部上。保護材料930也填充在每個半導體單元920與膠帶910之間的間隙。
圖10A是顯示四個半導體單元的分離的剖視圖。充滿保護材料的劃片街區被切割，但是半導體單元的有源電路未被切割。除了焊球的下表面，最終封裝的半導體單元1000完全被保護材料包圍。圖10B是封裝的半導體單元1000的底部與頂部三維圖示。
參考圖3A至圖10描述的實施方式，針對倒裝晶片類型的裝置，在該裝置中，焊球、支柱、或者圓柱連接至半 導體單元的有源表面。圖11A是顯示在IC 1110的有源表面上具有焊料凸塊1130的IC 1110的框圖。IC 1110“翻轉”使得有源表面在下邊緣上。這允許焊料凸塊1130直接連接至另一個裝置或者基板，例如基板1120。雖然未圖示，基板1120在其上表面上具有與IC 1110上的焊料凸塊1130的圖案匹配的接觸焊盤。焊料凸塊1130被帶入與基板1120的接觸焊盤接觸，並上升至焊料凸塊1130開始回流或者液化的溫度。當溫度降低時，回流的焊料凸塊1130凝固，並且變得電性地且機械地連接至基板1120上的接觸焊盤。
以上參考圖3A至圖5描述的實施方式在形成並且填充劃片街區之前並在半導體單元的分離之前，處理為在步驟早期使焊球連接至有源電路層。替代地，可以首先執行劃片街區的形成與填充，並且焊球或者其他導電性結構可以在處理的末尾連接至半導體單元。
現在回到圖3A至圖5描述替代實施方式。在該替代實施方式中，圖3A至圖3B的晶圓315與晶圓345不具有此時連接至晶圓的焊球330或者導體支柱360。在圖4A中，載帶440黏至晶圓410的後表面，並且在晶圓410的活性表面中的劃片街區中製成第一切口450。在該替代實施方式中未使用圖4B中的膠帶460。替代地，保護材料470填充在劃片街區中的第一切口450內，並且還完全覆蓋晶圓410的活性表面。焊接遮罩或者焊料範本，在使半導體單元分離之前施加在覆蓋有源電路層的保護塗層上。焊接遮罩可以由在暴露於紫外線(UV)光時可以圖案化的聚合物或者感光成像材料製成。包含與半導體單元的活性表面上的接觸焊盤匹配的複數個開口的焊接遮罩放置在晶圓上的保護塗層上。紫外線光穿過焊接遮罩中的開口暴露保護塗層。隨後去除焊接遮罩，並且去除保護塗層的暴露區域。焊球放置在接觸焊盤上的保護塗層的開口內，在圖5中顯示的分離之前或分離之後。焊球回流連接至半導體單元的接觸焊盤。
圖11B是顯示另一種類型的裝置，稱為焊線接合裝置的方塊圖。IC 1110相對於膠黏劑連接的基板1120直立放 置。上活性表面包含接合焊盤1135，接合焊盤1135通過接合線1150連接至基板1120的接合焊盤1145。圖11B僅顯示焊線接合裝置的一種實施方式。本文中描述的實施方式考慮用於焊線接合至其他裝置和/或其他類型的基板的幾個其他配置。
現在將描述用於隨後期望焊線接合的IC的實施方式。圖12A顯示半導體晶圓1210，半導體晶圓1210包含有源電路層1220。如在圖12B中顯示的，為了準備用於晶圓切割的晶圓，載帶1230附貼至半導體晶圓1210的非活性表面。晶圓切口或者第一凹槽1240通過半導體晶圓1210的劃片街區形成。晶圓切口或者第一凹槽1240可以通過雷射刻槽、電漿腐蝕、或者機械鋸切形成。在一種實施方式中，晶圓切口或者第一凹槽1240從劃片街區去除任何鈍化層、金屬噴鍍層、及層間介電材料，並且部分地切穿矽基板。
圖13A顯示遮罩帶1310施加至晶圓1330的活性表面1320，以為填充劃片街區1340作準備。載帶1350仍黏至晶圓1330的非活性表面。圖13B顯示直接在劃片街區1340上的遮罩帶1310內的開口1360的形成。開口1360可以通過雷射圖案化形成，例如雷射直射或者蝕刻。開口1360可以部分暴露劃片街區1340，如在圖13B中顯示的，或者開口1360可以完全暴露劃片街區1340。
圖13C顯示利用保護密封填充材料1370填充劃片街區1340。保護密封填充材料1370包括，但不限於模塑料、熱固性環氧樹脂、樹脂、或者膠黏劑。填充步驟包括，但不限於鑄模成型、真空鑄模成型、沉浸塗層、噴塗、及旋轉塗層。
圖14A顯示圖示13C的遮罩帶1310已經去除並且半導體單元1410分離以形成單獨的封裝的半導體單元1420。在一種實施方式中，晶圓劃片穿透保護材料1430並且切割通過剩餘的晶圓1440。晶圓分離的其他方法包括，但不限於蝕刻切割、雷射燒蝕、隱形切片、及電漿切片。封裝的半導體單元1420包含完全圍繞封裝的半導體單元1420的下週邊的保護材料1430，使得有源電路層1450 的所有的邊緣被保護材料1430保護。圖14B是封裝的半導體單元1420的底部三維圖示。
圖15顯示用於期望隨後的焊線接合的IC的晶圓級處理的另一種實施方式。包含複數個IC的晶圓1510具有有源電路層1520。載帶1530黏至晶圓1510的非活性表面。在晶圓1510與有源電路層1520內的劃片街區中製成複數個第一切口或者第一凹槽1540。例如，晶圓切口或者晶圓凹槽(第一凹槽)1540可以通過雷射刻槽、電漿腐蝕、或者機械鋸切形成。在一種實施方式中，晶圓切口或者晶圓凹槽1540從劃片街區去除任何鈍化層、金屬噴鍍層、及層間介電材料，並且部分地通過矽基板切割。第二切口或者第二凹槽1550完全通過晶圓1510製成並且部分地到載帶1530中。在實施方式中，第二切口或者第二凹槽1550通過晶圓鋸切製成。圖15顯示第一切口或者第一凹槽1540在寬度上比第二切口或者第二凹槽1550大。在一種實施方式中，較大的第一凹槽1540通過雷射刻槽或者電漿腐蝕形成，而第二凹槽1550通過晶圓鋸切形成。大部分的載帶1530仍然具有黏性，因此，繼續將分離的半導體單元相對於彼此保持在原位。
在另一種實施方式中，代替上述的第二切口或者第二凹槽，晶圓的背表面可以後磨削至第一凹槽的頂部。黏性載體或者使晶圓穩定的其他手段可用於在後磨削步驟中將晶圓保持在原位。該方法在較小的最後裸片方面佔優勢。
圖16顯示黏至晶圓1630的有源電路層1620的遮罩帶1610。圖17A顯示圖示15的載帶1530已經去除。保護密封材料1710從晶圓1720的背面填充在劃片街區中。遮罩帶1730為保護密封材料1710提供備用。圖17B顯示另一種實施方式，其中，保護密封材料1710施加至晶圓的後非活性表面，以及劃片街區內。保護密封材料1710包括，但不限於模塑料、熱固性環氧樹脂、樹脂、或者膠黏劑。保護密封材料1710可以通過鑄模成型、真空輔助鑄模成型、浸沒施加、噴塗層、及旋轉塗層施加。本文中描述的實施方式亦考慮其他施加方法。
圖18A是圖17A的實施方式的剖視圖，其中，利用保 護密封材料填充劃片街區。半導體單元在劃片街區內的保護密封材料之間分離1810，其中，在分離1810步驟中電路未被切割。最後封裝的半導體單元1820顯示保護密封材料1830完全圍繞IC1840的週邊以覆蓋IC的側邊緣與有源電路層1850的邊緣。圖18B是封裝的半導體單元1820的底部三維圖示。
圖18C是圖17B的實施方式的剖視圖，其中，利用保護密封材料填充劃片街區並覆蓋晶圓的後非活性表面。半導體單元在劃片街區內的保護密封材料之間分離1810，其中，在分離1810步驟中電路未被切割。最後封裝的半導體單元1820顯示保護密封材料1830完全圍繞週邊與IC1840的後非活性表面。除了有源電路層1850的底表面，最後封裝的半導體單元1820完全被保護密封材料1830覆蓋。圖18D是封裝的半導體單元1820的底部與頂部三維圖示。
現在回到圖12A至圖14描述替代實施方式。圖12A的半導體晶圓1210包含有源電路層1220。圖12B顯示半導體晶圓1210的背面上的載帶1230。第一切口或者第一凹槽1240通過有源電路層1220製成並且部分地通過半導體單元之間的矽晶圓。在圖13A中顯示的遮罩帶1310未施加至該替代實施方式。替代地，圖13C的保護密封填充材料1370填充在第一切口或者第一凹槽1240內，並且還覆蓋有源電路層1220。這在整個晶圓1330的活性表面上產生保護密封填充材料1370的連續層。
包含與半導體晶圓的活性表面上的接觸焊盤匹配的複數個開口的焊接遮罩放置在晶圓上的保護密封填充材料1370上。焊接遮罩可以由聚合物或者感光成像材料製成，聚合物或者感光成像材料在暴露於紫外線(UV)光時可以圖案化。紫外線光通過焊接遮罩中的開口暴露保護密封填充材料1370。隨後去除焊接遮罩，並且去除保護密封填充材料1370的暴露區域。接合線可以連接至保護密封填充材料1370的開口內有源電路層上的接觸焊盤。
參考圖19，將描述製造半導體封裝的方法1900。在步驟S1910，載帶黏至半導體晶圓的非活性表面。在步驟S1920，在半導體晶圓的半導體單元之間切割或者蝕刻凹 槽。凹槽切穿或者蝕刻穿過半導體晶圓的有源電路層。在一種實施方式中，凹槽利用切割與蝕刻步驟的組合形成。在步驟S1930，保護密封塗層材料施加到半導體單元之間的凹槽裡。在一種實施方式中，施加步驟出現在連接外部導電連接器至半導體單元之前。在步驟S1940，半導體單元通過保護密封塗層材料分離。在一種實施方式中，方法1900還包括將膜黏至半導體晶圓的外部導電連接器，並圍繞外部導電連接器施加保護密封塗層材料。在另一種實施方式中，方法還包括穿過半導體單元之間的半導體晶圓完全切割或者蝕刻凹槽。在另一種實施方式中，方法還包括照射並去除通過遮罩中的開口暴露的保護密封塗層材料，其中，開口與有源電路層的下面的接合焊盤對應。
本文中描述的方法與裝置可以施加至晶圓級裝置，如上所述，或者方法和裝置可以施加至重組裝置，如下前述。重組裝置與晶圓形成分離並且經受複數個測試。丟棄在一個或複數個測試中失敗的裝置，重裝通過測試的裝置用於進一步製造。這僅提供繼續處理好裝置的優勢，而不是完全通過處理攜載不好的裝置並在處理結束時丟棄它們。
圖20A顯示黏至黏性載體2020的重組半導體元件2010的3×8陣列。圖20A顯示重組半導體元件2010的矩形陣列。然而，本文中描述的實施方式考慮其他陣列，例如裝置板條、裝置的四方陣列、或者裝置的重組圓形晶圓陣列。圖20A還顯示在裝置的活性表面上具有以球柵陣列(BGA)的複數個焊球2030的重組半導體元件2010。然而，本文中描述的實施方式考慮其他外部互連，例如引腳柵格陣列、圓柱柵格陣列、或者配置用於隨後的焊線接合的複數個接觸焊盤。
圖20B顯示覆蓋焊球2030與有源電路層，以及在重組半導體元件2010中間的保護塗層材料2040，例如模塑料或者環氧樹脂。圖20C顯示暴露焊球2030的下部分。在一種實施方式中，雷射燒蝕被用於暴露焊球2030。近似焊球高度的一半通過模塑料暴露。然而，可以根據期望的最終產品使用其他暴露大小。在另一種實施方式中，膜放置在焊球2030的底表面上。保護塗層材料2040填充在重 組半導體元件2010的膜與有源表面之間，並圍繞單個焊球2030。
圖20D顯示將重組半導體元件2010分離為單個單元2050。單個單元2050的例示包括，但不限於球柵陣列(BGA)或者晶片級封裝(CSP)。分離可以通過鋸切、切割、或者蝕刻的一種或多種發生。分離僅通過模塑料發生，無需切割重組半導體元件2010。如在圖20E中顯示的，單個單元2050從黏性載體2020去除。
圖20F顯示單個單元2050的剖視圖示。保護塗層材料2040沿著單個單元2050的側面保留並且繼續圍繞拐角表面且向內朝向單個單元2050的周邊焊球2030。這提供密封有源電路層的邊緣以防止分層的優勢，還提供結構支撐至周邊焊球2030。
側壁模塑料的厚度可以依據最後的封裝產品改變。在一種實施方式中，模塑料的側壁厚度在從10μm至90μm的範圍內。在一種實施方式中，模注半導體元件(在去除任何模塑料之前)從裝置的背面至模塑料的頂表面可以近似560μm。通過雷射燒蝕或者其他方法去除的模塑料的量可以是190μm。該量的模塑料去除暴露近似焊球的一半。上述大小僅出於例示性目的，本文中描述的實施方式考慮設計用於具體的最終產品的其他大小。
圖21顯示重組半導體元件的焊球黏至黏性載體的一種實施方式。模塑料填充在重組半導體元件之間，以及每個裝置的活性層與黏性載體之間的間隙。圖21顯示模塑料也駐留在重組半導體元件的後非活性表面上。另一種實施方式包括利用膜或者膠帶覆蓋後表面，因此後表面上沒有施加模塑料。圖21進一步顯示黏性載體去除，並且重組半導體元件分離為單個單元。在其他實施方式中，模塑料可以以暴露的裸片模套或者通過壓縮模塑施加。圖22A顯示背表面黏至載體的複數個半導體元件。焊料凸塊嵌入柔性焊盤，因此焊料凸塊的上半部被覆蓋並且焊料凸塊的緊貼著裸片的下半部被暴露用於接收模塑料。在模塑料滲透開放空間並且設定之後，去除裸片模套與柔性焊盤。半導體元件被分離為單個單元。
圖22B顯示與圖22A的步驟類似的步驟，除了在施加裸片模套與柔性焊盤之前施加模塑料接近複數個裝置的中心。圖22A與圖22B的步驟可以施加至晶圓級半導體元件或者施加至重組半導體元件。
本文中描述的實施方式的多用性允許在幾個可能的處理階段進行測試。可以在以晶圓形式的劃片街區封裝之後，在以面板形式的裸片重組與鑄模成型之後，在鑄模成型的面板被分成板條形式，或者作為分離的IC單元的最後測試之後，使用裸片探測器進行測試。由於不同的供應商可以利用不同的測試平臺，所以測試靈活度提供成本節約。
圖23是製造半導體封裝的方法2300的流程圖。在步驟S2310，複數個半導體元件以板條格式或陣列格式黏至黏性載體。格式包含相鄰的每對半導體元件之間的間隙。在步驟S2320，模塑料被施加至間隙。模塑料圍繞所有暴露的有源電路邊緣。在步驟S2330，複數個半導體元件通過施加的模塑料分離。
方法2300還可以包括將外部焊球連接至有源電路層的相應的接觸焊盤，並且在有源電路層上施加模塑料以包圍連接的外部焊球。方法2300還可以包括在有源電路層與施加至外部焊球的底表面的膜之間的有源電路層上施加模塑料，雷射燒蝕施加至外部焊球的底表面的模塑料，通過暴露的裸片模套或者壓模之一將模塑料施加在間隙內並且在有源電路層上，或者在施加至複數個半導體元件的背表面的模塑料上標記複數個半導體元件的步驟的一個或複數個。在一種實施方式中，複數個半導體元件包括重組半導體元件。
半導體元件被處理多次並且經過幾個處理及測試程式。傳統的裝置趨向於在接近有源電路層的邊緣形成缺口(chipped-out)區域，尤其當裝置受到撞擊時。該缺口區域趨向於導致電路層與裸片的隨後分層，引起裝置的最終失敗。
本文中描述的實施方式提供更堅固的半導體元件。保護邊緣密封劑密封全部在裸片的所有四個側面的周圍的有源電路層的邊緣。保護邊緣密封劑在有源電路層上延伸以 包圍外部連接器，例如焊球。這提供焊球支撐並且保護位於裝置週邊的焊球的額外益處，增加裝置的可靠性。作為減少分層與增加的可靠性的結果，半導體封裝可以容納更大的裸片。作為一個例子，僅出於例示性目的，傳統的半導體封裝可以具有近似5mm x 5mm的裸片。較大尺寸的傳統裸片存在在處理與測試的步驟中出現缺口與分層頻率較高的風險。通過使用本文中描述的實施方式，可以使用8mm x 8mm或者10mm x 10mm的裸片尺寸並且仍然保持最小的分層與缺口，並具有增加的可靠性。使用本文中描述的實施方式的更大裸片也進行要求連接至基板以提供穩定性或者保護，引起成本節約。
本文中描述的方法與裝置是例示性的並顯示某些實施方式的特徵和步驟。實施方式不局限於任何具體順序或者本文中描述的例示性順序。
本文中描述的用於半導體封裝的實施方式可被用於許多施加，包括但不限於網路、移動、無線、可攜帶電子設備、及寬頻。在網路施加中，本文中描述的半導體封裝可被用於多核處理器、智能型處理器、伺服器消息塊(SMB)處理器、加密協同處理器、及安全處理器。在移動、無線施加、及可攜帶施加中，本文中描述的半導體封裝可被用於3G基帶處理器、LTE基帶處理器、移動視訊處理器、移動圖形處理器、施加處理器、觸摸控制器、無線功率、物聯網(IoT)及可佩帶的系統晶片(SoC)、無線視訊、及天線。在寬頻施加中，本文中描述的半導體封裝可被用於電纜機頂盒(STB)、衛星STB、網路協定(IP)STB、地面STB、超高清(HD)處理器、STB圖形處理器、及STB安全處理器。這些裝置和系統可被用於包括但不限於路由器、智慧手機、平板電腦、個人電腦、及例如手錶、鞋子、衣服、及眼鏡的可攜帶設備的產品。在一些實施方式中，本文中描述的裝置與系統可被用於WiFi組合晶片、施加處理器、功率管理晶片、及藍牙晶片。
上述討論僅公開並描述例示性實施方式。本技術領域中具有通常知識者會理解的是，在不背離其精神或基本特性的情況下，本公開內容可表現為其他具體的形式。因此， 本實施方式的本公開內容旨在進行說明，而非限制實施方式的範圍以及申請專利範圍。在此包括教導的可容易辨別的任何變體的公開內容部分限定上述申請專利範圍的術語的範圍，從而任何主題都不公開使用。
400‧‧‧WLBGA
410‧‧‧晶圓
420‧‧‧半導體單元
430‧‧‧焊球
435‧‧‧活性表面
440‧‧‧載帶
450‧‧‧第一切口

Claims (10)

  1. 一種半導體封裝，包括：半導體單元，包含有源電路層；複數個焊球連接至前述有源電路層並被配置為連接至相應的外部導電連接器；以及使用保護密封塗層填充前述有源電路層的凹槽邊緣，其中，前述保護密封塗層包含外部晶圓分離表面；以及前述複數個焊球延伸通過前述保護密封塗層的外表面的平面。
  2. 如請求項1所記載的半導體封裝，其中前述外部晶圓分離表面包括鋸切邊緣、蝕刻邊緣或者雷射改變的邊緣中的一個或複數個。
  3. 如請求項1所記載的半導體封裝，其中前述保護密封塗層至少部分地覆蓋前述半導體單元的裸片的周邊。
  4. 如請求項1所記載的半導體封裝，進一步包括焊球外部導電連接器或接合線外部導電連接器。
  5. 如請求項1所記載的半導體封裝，進一步包括附加保護密封塗層，係圍繞前述有源電路層上的前述外部導電連接器。
  6. 如請求項1所記載的半導體封裝，進一步包括附加保護密封塗層，係在前述半導體單元的非活性表面上。
  7. 如請求項1所記載的半導體封裝，其中前述保護密封塗層減少或者去除圍繞每個前述半導體單元的密封圈。
  8. 一種半導體封裝，包括： 半導體單元包含有源電路層；複數個焊球直接設置在前述有源電路層；以及使用保護密封塗層填充前述有源電路層的凹槽邊緣，其中前述保護密封塗層包含外部晶圓分離表面；每個前述複數個焊球延伸通過前述保護密封塗層的外表面的平面；以及每個前述複數個焊球設置在同一個平面。
  9. 一種製造半導體封裝的方法，包括：將載帶黏至半導體晶圓的非活性表面；在前述半導體晶圓的各半導體單元之間切割或者蝕刻至少一凹槽，其中，前述至少一凹槽切割穿過或者蝕刻穿過前述半導體晶圓的有源電路層；將保護密封塗層施加到前述半導體單元之間的前述至少一凹槽中；其中，複數個焊球設置在同一個平面上並且延伸通過前述保護密封塗層的外表面。
  10. 如請求項9所記載的製造半導體封裝的方法，進一步包括：將複數個半導體元件以條格式或陣列格式黏至黏性載體，其中前述格式包含相鄰的每對半導體元件之間的間隙；在前述間隙內施加模塑料，其中前述模塑料圍繞暴露的有源電路邊緣；以及通過施加的前述模塑料分離前述複數個半導體元件。
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