TWI553745B - 將一基板接合至一半導體發光裝置之方法 - Google Patents

將一基板接合至一半導體發光裝置之方法 Download PDF

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TWI553745B
TWI553745B TW101131072A TW101131072A TWI553745B TW I553745 B TWI553745 B TW I553745B TW 101131072 A TW101131072 A TW 101131072A TW 101131072 A TW101131072 A TW 101131072A TW I553745 B TWI553745 B TW I553745B
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bonding
wafer
substrate
semiconductor
emitting device
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TW101131072A
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TW201318079A (zh
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葛羅葛瑞 倍森
約翰 愛德華 艾波勒
保羅 史考特 馬丁
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皇家飛利浦電子股份有限公司
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    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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Description

將一基板接合至一半導體發光裝置之方法
本發明係關於將半導體發光裝置之晶圓接合至基板。
包括發光二極體(LED)、諧振腔發光二極體(RCLED)、諸如面射型雷射之垂直共振腔雷射二極體(VCSEL)及緣射型雷射的半導體發光裝置係在當前可得到之最有效率之光源當中。當前在製造能夠橫越可見光譜而操作之高亮度發光裝置時所關注之材料系統包括III族至V族半導體，尤其是鎵、鋁、銦與氮之二元、三元及四元合金，其亦被稱作III族氮化物材料。通常，藉由用金屬有機化學氣相沈積(MOCVD)、分子束磊晶(MBE)或其他磊晶技術在藍寶石、碳化矽、III族氮化物或其他合適基板上磊晶地生長具有不同組合物及摻雜劑濃度之半導體層堆疊來製造III族氮化物發光裝置。該堆疊常常包括：經摻雜有(例如)Si之一或多個n型層，其形成於基板上方；在作用區域中之一或多個發光層，其形成於該或該等n型層上方；及經摻雜有(例如)Mg之一或多個p型層，其形成於作用區域上方。電接點形成於n型區域及p型區域上。
圖6說明US 7,053,419中更詳細地所描述的接合至透明透鏡2之LED晶粒4。LED晶粒4包括具有n型導電性之第一半導體層80及具有p型導電性之第二半導體層100。半導體層80及100電耦接至作用區域120。n接點140及p接點160係以覆晶組態而安置於LED晶粒4之同一側上。透明頂置板340 係由諸如藍寶石、SiC、GaN或GaP之材料形成。透鏡2係用接合層6而接合至透明頂置板340。接合層6可為聚矽氧。接合層6可包括將藉由作用區域120發射之波長之光轉換成其他波長的發冷光材料。發冷光材料可為習知磷光體粒子。
本發明之一目標係提供一種經由一可撓性膜而將半導體發光裝置之一晶圓接合至一基板之方法。
一種根據本發明之實施例之方法包括將一可撓性膜定位於半導體發光裝置之一晶圓上方，每一半導體發光裝置包括一半導體結構，該半導體結構包括包夾於一n型區域與一p型區域之間的一發光層。經由該可撓性膜而將半導體發光裝置之該晶圓接合至一基板。在接合之後，該可撓性膜直接接觸該等半導體結構。該方法進一步包括在將該晶圓接合至該基板之後劃分該晶圓。
在圖6所說明之裝置中，透鏡2在LED晶片4自LED晶片之晶圓被單體化之後附接至LED晶片4。
在本發明之實施例中，包括安置於n型區域與p型區域之間的發光區域的半導體發光裝置之晶圓係藉由預形成之聚矽氧層壓膜而接合至基板。如本文所使用，「晶圓」指代在被劃分成較小結構之前的結構，諸如，已經生長有用於許多發光裝置之半導體材料的生長基板。儘管在以下實例中半導體發光裝置為發射藍光或UV光之III族氮化物 LED，但可使用除了LED以外之半導體發光裝置，諸如，由諸如其他III-V族材料、III族磷化物、III族砷化物、II-VI族材料、ZnO或以Si為基礎之材料之其他材料系統製成的雷射二極體及半導體發光裝置。
圖1說明半導體發光裝置。為了形成圖1所說明之裝置，使半導體結構13生長於生長基板11上。基板11可為任何合適基板，諸如，藍寶石、SiC、Si、GaN或複合基板。半導體結構13包括包夾於n型區域12與p型區域16之間的發光或作用區域14。首先可使n型區域12生長且n型區域12可包括具有不同組合物及摻雜劑濃度之多個層，包括(例如)諸如緩衝層或晶核層之製備層，及/或經設計成促進生長基板之移除之層，該等層可為n型或未被有意地摻雜，且可為針對使發光區域有效率地發射光所需要之特定光學、材料或電屬性而設計之n型或甚至p型裝置層。使發光或作用區域14生長於n型區域12上方。合適發光區域之實例包括單一厚或薄發光層，或包括藉由障壁層分離之多個薄或厚發光層之多量子井發光區域。接著可使p型區域16生長於發光區域14上方。類似於n型區域12，p型區域16可包括具有不同組合物、厚度及摻雜劑濃度之多個層，包括未被有意地摻雜之層或n型層。裝置中之所有半導體材料之總厚度在一些實施例中小於10 μm且在一些實施例中小於6 μm。在一些實施例中，可視情況使半導體材料在生長之後在介於200℃與800℃之間的溫度下退火。
將p接點33形成於p型區域16上。p接點33可為多層金屬 接點。可藉由(例如)蒸鍍或濺鍍來沈積直接接觸p型區域16之第一金屬層，接著藉由包括(例如)蝕刻或起離之標準光微影操作來圖案化該第一金屬層。第一金屬層可為與諸如銀之p型III族氮化物材料進行歐姆接觸的反射金屬。第一金屬層亦可為過渡金屬及銀之多層堆疊。過渡金屬可為(例如)鎳。第一金屬層之厚度在一些實施例中介於100 Å與2000 Å之間，第一金屬層之厚度在一些實施例中介於500 Å與1700 Å之間，且第一金屬層之厚度在一些實施例中介於1000 Å與1600 Å之間。可視情況使該結構在第一金屬層之沈積之後退火。可藉由(例如)蒸鍍或濺鍍將可選第二金屬層沈積於第一金屬層上方，接著藉由諸如蝕刻或起離之標準光微影操作來圖案化該第二金屬層。第二金屬層可為最低程度地與銀反應之任何導電材料，諸如，鈦及鎢之合金。此合金可部分地、完全地或根本不氮化。或者，第二金屬層可為鉻、鉑或矽，或可為經最佳化以用於黏著至周圍層且用於阻擋第一金屬層之擴散之以上材料中任一者的多層堆疊。第二金屬層之厚度在一些實施例中介於1000 Å與10000 Å之間，第二金屬層之厚度在一些實施例中介於2000 Å與8000 Å之間，且第二金屬層之厚度在一些實施例中介於2000 Å與7000 Å之間。
接著藉由標準光微影操作來圖案化該結構且藉由(例如)反應性離子蝕刻(RIE)(其中使用化學反應性電漿以移除半導體材料)或電感性耦合電漿(ICP)蝕刻(一RIE程序，其中藉由RF供電磁場產生電漿)來蝕刻該結構。在一些實施例 中，藉由用以圖案化p接點金屬層中之一或多者之光微影遮罩判定圖案。在此等實施例中，可在單一操作中蝕刻p接點金屬之後執行蝕刻。在一或多個區域中，移除p型區域16之整個厚度及發光區域14之整個厚度，從而顯露n型區域12之表面(圖1中說明三個此等區域)。
將金屬n接點36形成於藉由蝕除p型區域及發光區域而曝露之n型區域12之部分上。n接點36可為包括鋁之任何合適金屬，或包括鋁、鈦鎢合金、銅及金之多層金屬堆疊。在n接點36為多層堆疊之實施例中，第一金屬(亦即，鄰近於n型區域12之金屬)可經選擇以形成對GaN之歐姆接觸且反射藍光及白光。此第一層可為(例如)鋁。可藉由包括(例如)濺鍍、蒸鍍、電鍍或此等程序之組合的任何合適程序來沈積n接點36。
可(例如)藉由電漿增強型化學氣相沈積(PECVD)、化學氣相沈積(CVD)或蒸鍍將介電質38沈積於該結構上方。介電質38使n接點36及p接點33電隔離。藉由標準光微影操作來圖案化介電質38且藉由ICP蝕刻或RIE來蝕刻介電質38以曝露n接點36及p接點33。介電質38可為包括氮化矽、氧化矽及氮氧化矽之任何合適介電質。在一些實施例中，介電質38為反射堆疊。介電質38可形成於n接點36之前或之後。
將接合墊40a及40b形成於n接點及p接點以及介電質38上方，以將n接點及p接點重新分佈至適於接合至諸如PC板之另一結構的大導電墊中。接合墊通常為金屬，但可為任何 合適導電材料。接合墊40a係經由p接點33而電連接至p型區域16。接合墊40b係經由n接點36而電連接至n型區域12。接合墊40可為(例如)藉由濺鍍或藉由濺鍍及電鍍之組合而沈積的Cu或包含(例如)Ti、TiW、Cu、Ni及Au之多層金屬堆疊。接合墊40a及40b可藉由如圖1所說明之間隙或藉由諸如上文參考介電質38所描述之材料之固體介電質而電隔離。
圖1所說明之許多裝置同時形成於單一晶圓上。圖1所說明之發光裝置之特定結構與本發明之實施例不相關--可使用任何合適發光裝置結構。
在圖2中，諸如圖1所說明之裝置的裝置之晶圓附接至處置晶圓44。半導體結構13係經由金屬層31及接合層42而附接至處置晶圓44。圖2、圖3、圖4及圖5中之金屬層31包括上文所描述及圖1詳細地所說明之n接點36及p接點33、介電質38以及接合墊40。處置晶圓44在生長基板11之移除期間機械地支撐半導體結構13。處置晶圓44可為(例如)玻璃、藍寶石、矽或任何其他合適材料。接合層可僅形成於處置晶圓44上、僅形成於半導體結構13上，或形成於處置晶圓44及半導體結構13兩者上。該或該等接合層可為諸如有機材料之任何合適材料，有機材料係諸如藉由諸如旋塗之任何合適技術形成之聚矽氧。在形成該或該等接合層之後，在高溫下將處置晶圓44及半導體結構13按壓在一起。處置晶圓44與半導體結構13之間的接合無需任何對準，此係因為處置晶圓44稍後被移除且因此不含有必須與晶圓上 之個別發光裝置對準之特徵。
在圖3中，藉由包括(例如)雷射起離、蝕刻或機械技術的適於生長基板材料之任何技術自半導體裝置之晶圓移除生長基板11。可視情況薄化藉由移除生長基板11而曝露之半導體結構13之表面46(圖1中在與生長基板11之界面處的n型區域12之表面)，接著視情況(例如)藉由粗糙化或藉由形成圖案來紋理化表面46，以改良自半導體結構13之光提取。可藉由標準光微影及蝕刻來圖案化表面46且可藉由包括(例如)諸如KOH溶液中之光電化學蝕刻的蝕刻、機械研磨或切除的任何合適技術來粗糙化表面46。
在圖4中，接合層48形成於半導體結構13之經紋理化表面46上方。在一些實施例中，接合層48為可為完全或部分固化透明材料(諸如，聚矽氧)之可撓性膜。接合膜48可經形成為與半導體結構13及基板50分離，此情形准許緊密地控制該膜之厚度以及在該膜附接至半導體結構13之前測試及驗證該膜之特性。在一些實施例中，可將諸如金剛石之散熱材料添加至接合膜48。在一些實施例中，可將諸如金剛石、矽石、TiO2及/或其他無機添加劑之材料添加至接合膜48以調整該膜之折射率，以改良光學透射、造成光散射，及/或改良藉由安置於該膜中之波長轉換材料之轉換，如下文所描述。
在一些實施例中，將接合膜48形成於諸如乙烯/四氟乙烯膜之支撐膜上，該形成係(例如)藉由如下方式進行：使聚矽氧之混合物遍及支撐膜而散佈，接著完全地或部分地 固化聚矽氧。成品膜為固體。在一些實施例中，在形成接合膜48之後將保護膜形成於接合膜48上方，使得接合膜48包夾於一支撐膜與一保護膜之間。在用接合膜48進行第一接合(例如，至半導體結構13)之前移除支撐膜及保護膜中之一者，接著，在用接合膜48進行第二接合(例如，至基板50)之前移除支撐膜及保護膜中之另一者。
接合膜48係如下附接至半導體結構13或基板50。移除支撐膜及保護膜中之一者，接著預固化接合膜48。在介於100℃與150℃之間的溫度下預固化接合膜48歷時1分鐘至10分鐘，以便達成防止聚矽氧在接合期間熔融且可在半導體結構13或基板50上方維持目標接合膜厚度之膜硬度。在預固化接合膜48之後，在第一接合步驟中將接合膜48附接至半導體結構13。將包括接合膜48及半導體結構13之結構裝載至真空層壓機中以使用真空、高溫及高壓中之一或多者將接合膜48附接至半導體結構13之表面46。使溫度及壓力平衡，使得對於下文所描述之第二接合步驟，接合膜48維持黏著強度。舉例而言，接合膜48可在一些實施例中在介於60℃與100℃之間的溫度下、在一些實施例中在0.1 MPa與0.3 MPa之間的壓力下及在一些實施例中在約10-3托之真空下接合至半導體結構13。
接著經由接合層48而將半導體結構13接合至基板50。基板50可為透明高折射率材料，諸如，在接合至半導體結構13之前預形成為基板晶圓之玻璃。上述玻璃之折射率可在1.5至2.2之範圍內或在一些實施例中更高，其接近地匹配 於GaN之折射率(2.4)。用於基板50之合適材料包括合適高折射率玻璃，諸如，氯化鉛、溴化鉛、氟化鉀、氟化鋅、氧化鋁、氧化銻、氧化鉍、氧化硼、氧化鉛、氧化鋰、氧化磷、氧化鉀、氧化矽、氧化鈉、氧化碲、氧化鉈、氧化鎢或氧化鋅，或其任何混合物。舉例而言，高折射率玻璃亦包括諸如以下各者之材料：Schott玻璃LaSFN35、LaF10、NZK7、NLAF21、LaSFN18、SF59或LaSF3，或者Ohara玻璃SLAH51或SLAM60，或其混合物，諸如(Ge、As、Sb、Ga)(S、Se、Te、F、Cl、I、Br)硫族化物及硫族鹵化物玻璃之玻璃。在一些實施例中，基板50可包括諸如玻璃、氟化鎂及聚合物之較低折射率材料，或由該等較低折射率材料形成。
在將接合膜48接合至半導體結構13之後，自接合膜48移除支撐膜及保護膜中之另一者且將基板50定位於接合膜48之頂部上。接著將該結構置放於第二真空層壓機中，在一些實施例中，第二真空層壓機在比第一接合步驟中所使用之溫度及壓力高的溫度及壓力下將基板50接合至接合膜48。舉例而言，在一些實施例中，可在介於110℃與120℃之間的溫度下將基板50接合至接合膜48。儘管在以上實例中在第一接合步驟中將接合膜48附接至半導體結構13且在第二接合步驟中將接合膜48附接至基板50，但在一些實施例中在第一接合步驟中將接合膜48附接至基板50，接著在第二接合步驟中將接合膜48附接至半導體結構13。
在一些實施例中，將藉由發光區域發射之波長之光轉換 成其他波長的一或多種發冷光材料包括於接合膜48、基板50或其兩者中。藉由發光區域發射且入射於波長轉換材料上之光之全部或僅一部分可藉由波長轉換材料轉換。藉由發光區域發射之未經轉換光可為光之最終光譜之部分，但其無需如此。常見組合之實例包括發藍光LED與發黃光波長轉換材料之組合、發藍光LED與發綠光及紅光波長轉換材料之組合、發UV光LED與發藍光及黃光波長轉換材料之組合，及發UV光LED與發藍光、綠光及紅光波長轉換材料之組合。可添加發射其他顏色之光之波長轉換材料以修整自裝置所發射之光之光譜。波長轉換材料可為習知磷光體粒子、有機半導體、II-VI族或III-V族半導體、II-VI族或III-V族半導體量子點或奈米晶體、染料、聚合物，或發冷光之材料，諸如，GaN。若基板50及接合層48中之一者或其兩者包括習知磷光體粒子，則在一些實施例中，包括磷光體之結構足夠厚以容納通常具有約5微米至約50微米之大小之粒子。可使用任何合適磷光體，包括諸如Y3Al5O12：Ce(YAG)、Lu3Al5O12：Ce(LuAG)、Y3Al5-xGaxO12：Ce(YAlGaG)、(Ba1-xSrx)SiO3：Eu(BOSE)之以石榴石為基礎之磷光體，以及諸如(Ca,Sr)AlSiN3：Eu及(Ca,Sr,Ba)2Si5N8：Eu之以氮化物為基礎之磷光體。不同波長轉換材料可混合在一起或經形成為離散層。波長轉換材料可在此等結構之製造期間併入至接合膜48及/或基板50中。舉例而言，波長轉換材料可在聚矽氧混合物遍及支撐膜而散佈以形成接合膜48之前與聚矽氧混合。
如圖5所說明，在接合至基板50之後，(例如)藉由蝕刻、機械分離、雷射起離或任何其他合適技術移除處置晶圓44。(例如)藉由蝕刻或其他合適技術移除在移除處置晶圓44之後剩餘之任何接合材料42。接著可將晶圓劃分成個別裝置或裝置群組。圖5中說明與晶圓分離之三個結構之間的邊界52。因為半導體結構13及基板50被分割在一起，所以基板不寬於發光裝置，如圖5所說明。可(例如)藉由習知鋸切、藉由使用193 nm、248 nm或355 nm光之雷射切除或藉由射水切割來執行將晶圓分離成個別裝置或裝置群組。亦可經由刻劃及機械斷裂之組合而執行分離，刻劃係(例如)藉由習知鋸切、藉由使用193 nm、248 nm或355 nm光之雷射切除或藉由射水切割而執行。
在已詳細地描述本發明後，熟習此項技術者應瞭解，在本發明的情況下，可在不脫離本文所描述之發明性概念之精神的情況下對本發明進行修改。因此，不意欲使本發明之範疇限於所說明及描述之特定實施例。
2‧‧‧透明透鏡
4‧‧‧LED晶粒
6‧‧‧接合層
11‧‧‧生長基板
12‧‧‧n型區域
13‧‧‧半導體結構
14‧‧‧發光或作用區域
16‧‧‧p型區域
31‧‧‧金屬層
33‧‧‧p接點
36‧‧‧n接點
38‧‧‧介電質
40‧‧‧接合墊
40a‧‧‧接合墊
40b‧‧‧接合墊
42‧‧‧接合層/接合材料
44‧‧‧處置晶圓
46‧‧‧經紋理化表面
48‧‧‧接合層/接合膜
50‧‧‧基板
52‧‧‧邊界
80‧‧‧第一半導體層
100‧‧‧第二半導體層
120‧‧‧作用區域
140‧‧‧n接點
160‧‧‧p接點
340‧‧‧透明頂置板
圖1說明包括生長於生長基板上之半導體結構、金屬n接點及p接點以及接合墊的半導體發光裝置。
圖2說明接合至處置晶圓的半導體發光裝置之晶圓。
圖3說明在移除生長基板且紋理化半導體結構之頂部表面之後的圖2之結構。
圖4說明在接合至第二基板之後的圖3之結構。
圖5說明在移除處置晶圓且劃分晶圓之後的圖4之結構。
圖6說明接合至透明透鏡的先前技術之LED晶粒。
11‧‧‧生長基板
12‧‧‧n型區域
13‧‧‧半導體結構
14‧‧‧發光或作用區域
16‧‧‧p型區域
33‧‧‧p接點
36‧‧‧n接點
38‧‧‧介電質
40‧‧‧接合墊
40a‧‧‧接合墊
40b‧‧‧接合墊

Claims (11)

  1. 一種用於將一基板接合至半導體發光裝置之一晶圓的方法，其包含：將一可撓性膜定位於半導體發光裝置之該晶圓上方，每一半導體發光裝置包含一半導體結構，該半導體結構包含包夾於一n型區域與一p型區域之間的一發光層，其中該可撓性膜經形成為與該晶圓分離且接著經定位於該晶圓上方；經由該可撓性膜將該基板接合至半導體發光裝置之該晶圓，其中在接合之後，該可撓性膜直接接觸該半導體結構；及在將該晶圓接合至該基板之後劃分該晶圓。
  2. 如請求項1之方法，其中：每一半導體結構進一步包含安置於該n型區域上之一第一金屬接點及安置於該p型區域上之一第二金屬接點，其中該第一金屬接點及該第二金屬接點兩者皆形成於該半導體結構之一第一表面上；該可撓性膜直接接觸該半導體結構之與該第一表面相對之一第二表面。
  3. 如請求項1之方法，其中該可撓性膜包含一波長轉換材料。
  4. 如請求項1之方法，其中該可撓性膜包含聚矽氧。
  5. 如請求項1之方法，其中該可撓性膜透明。
  6. 如請求項1之方法，其中接合包含： 將該可撓性膜接合至該半導體結構；及在將該可撓性膜接合至該半導體結構之後將該可撓性膜接合至該基板。
  7. 如請求項1之方法，其中該基板為玻璃。
  8. 如請求項1之方法，其中該晶圓中之每一半導體發光裝置之該半導體結構生長於一單一生長基板上，該方法進一步包含：將半導體發光裝置之該晶圓接合至一處置晶圓；及在將半導體發光裝置之該晶圓接合至該處置晶圓之後移除該生長基板。
  9. 如請求項8之方法，其進一步包含紋理化藉由移除該生長基板曝露之該半導體結構之一表面。
  10. 如請求項9之方法，其中該可撓性膜定位於該經紋理化表面上方。
  11. 如請求項8之方法，其進一步包含在經由該可撓性膜而將該基板接合至半導體發光裝置之該晶圓之後移除該處置晶圓。
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EP2751852A1 (en) 2014-07-09
CN107086198A (zh) 2017-08-22
US10158049B2 (en) 2018-12-18
CN108269756A (zh) 2018-07-10
JP2014525683A (ja) 2014-09-29
TW201318079A (zh) 2013-05-01
JP2017139481A (ja) 2017-08-10
KR20140058658A (ko) 2014-05-14
CN103858243A (zh) 2014-06-11
WO2013030690A1 (en) 2013-03-07
CN107086198B (zh) 2020-09-11

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