TWI538152B - 在半導體晶粒上用於電鍍特徵的熔合匯流排 - Google Patents

在半導體晶粒上用於電鍍特徵的熔合匯流排 Download PDF

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Publication number
TWI538152B
TWI538152B TW101126105A TW101126105A TWI538152B TW I538152 B TWI538152 B TW I538152B TW 101126105 A TW101126105 A TW 101126105A TW 101126105 A TW101126105 A TW 101126105A TW I538152 B TWI538152 B TW I538152B
Authority
TW
Taiwan
Prior art keywords
interconnect
fuse
fuses
seal ring
forming
Prior art date
Application number
TW101126105A
Other languages
English (en)
Chinese (zh)
Other versions
TW201320290A (zh
Inventor
喬治Ｒ 李爾
凱文Ｊ 海斯
川特Ｓ 優林
Original Assignee
飛思卡爾半導體公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 飛思卡爾半導體公司 filed Critical 飛思卡爾半導體公司
Publication of TW201320290A publication Critical patent/TW201320290A/zh
Application granted granted Critical
Publication of TWI538152B publication Critical patent/TWI538152B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493—Fuses, i.e. interconnections changeable from conductive to non-conductive
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01904—Manufacture or treatment of bond pads using temporary auxiliary members, e.g. using sacrificial coatings or handle substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW101126105A 2011-07-22 2012-07-19 在半導體晶粒上用於電鍍特徵的熔合匯流排 TWI538152B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/189,054 US8349666B1 (en) 2011-07-22 2011-07-22 Fused buss for plating features on a semiconductor die

Publications (2)

Publication Number Publication Date
TW201320290A TW201320290A (zh) 2013-05-16
TWI538152B true TWI538152B (zh) 2016-06-11

Family

ID=46507887

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101126105A TWI538152B (zh) 2011-07-22 2012-07-19 在半導體晶粒上用於電鍍特徵的熔合匯流排

Country Status (4)

Country Link
US (1) US8349666B1 (https=)
EP (1) EP2549532B1 (https=)
JP (1) JP6028298B2 (https=)
TW (1) TWI538152B (https=)

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* Cited by examiner, † Cited by third party
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US8519513B2 (en) * 2012-01-04 2013-08-27 Freescale Semiconductor, Inc. Semiconductor wafer plating bus
JP5968711B2 (ja) * 2012-07-25 2016-08-10 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
ITMI20121599A1 (it) * 2012-09-25 2014-03-26 St Microelectronics Srl Dispositivo elettronico comprendente un transistore vtmos ed un diodo termico integrati
US8994148B2 (en) * 2013-02-19 2015-03-31 Infineon Technologies Ag Device bond pads over process control monitor structures in a semiconductor die
US10424521B2 (en) 2014-05-13 2019-09-24 Nxp Usa, Inc. Programmable stitch chaining of die-level interconnects for reliability testing
US20150371956A1 (en) * 2014-06-19 2015-12-24 Globalfoundries Inc. Crackstops for bulk semiconductor wafers
JP6435562B2 (ja) * 2014-12-02 2018-12-12 ローム株式会社 半導体装置および半導体装置の製造方法
US20180337228A1 (en) * 2017-05-18 2018-11-22 Taiwan Semiconductor Manufacturing Co., Ltd. Novel seal ring for iii-v compound semiconductor-based devices
FR3079342B1 (fr) * 2018-03-21 2020-04-17 Stmicroelectronics (Rousset) Sas Dispositif fusible integre
CN109461717A (zh) * 2018-10-15 2019-03-12 上海华虹宏力半导体制造有限公司 一种晶圆及其形成方法、等离子体裂片方法
US10978404B2 (en) * 2019-08-22 2021-04-13 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and method for fabricating semiconductor structure
CN115249667A (zh) * 2021-04-27 2022-10-28 三星电子株式会社 半导体装置
KR20220150158A (ko) * 2021-05-03 2022-11-10 에스케이하이닉스 주식회사 크랙 전파 가이드를 포함한 반도체 칩을 제조하는 방법
CN113410209B (zh) * 2021-06-09 2023-07-18 合肥中感微电子有限公司 一种修调电路
JP2023043036A (ja) * 2021-09-15 2023-03-28 キオクシア株式会社 半導体装置
US20240421077A1 (en) * 2023-06-15 2024-12-19 Taiwan Semiconductor Manufacturing Co., Ltd. Die stitching for stacking architecture in semiconductor packages

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JPS62108543A (ja) * 1985-11-06 1987-05-19 Hitachi Ltd 半導体装置の電極形成法
US5384727A (en) * 1993-11-08 1995-01-24 Advanced Micro Devices, Inc. Fuse trimming in plastic package devices
US6222212B1 (en) 1994-01-27 2001-04-24 Integrated Device Technology, Inc. Semiconductor device having programmable interconnect layers
US5813881A (en) 1994-02-08 1998-09-29 Prolinx Labs Corporation Programmable cable and cable adapter using fuses and antifuses
JP3119352B2 (ja) * 1998-04-15 2000-12-18 日本電気株式会社 半導体装置のメッキ構造体形成方法
US6350633B1 (en) 2000-08-22 2002-02-26 Charles W. C. Lin Semiconductor chip assembly with simultaneously electroplated contact terminal and connection joint
JP4502173B2 (ja) * 2003-02-03 2010-07-14 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
US6911360B2 (en) 2003-04-29 2005-06-28 Freescale Semiconductor, Inc. Fuse and method for forming
JP2006013229A (ja) * 2004-06-28 2006-01-12 Toshiba Corp 半導体装置及びその製造方法
JP4779324B2 (ja) * 2004-09-01 2011-09-28 セイコーエプソン株式会社 半導体装置及び半導体装置の製造方法
US7777338B2 (en) * 2004-09-13 2010-08-17 Taiwan Semiconductor Manufacturing Co., Ltd. Seal ring structure for integrated circuit chips
US7232711B2 (en) * 2005-05-24 2007-06-19 International Business Machines Corporation Method and structure to prevent circuit network charging during fabrication of integrated circuits
US8242576B2 (en) * 2005-07-21 2012-08-14 Taiwan Semiconductor Manufacturing Co., Ltd. Protection layer for preventing laser damage on semiconductor devices
US7575958B2 (en) 2005-10-11 2009-08-18 Freescale Semiconductor, Inc. Programmable fuse with silicon germanium
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US7586175B2 (en) * 2006-10-23 2009-09-08 Samsung Electronics Co., Ltd. Semiconductor wafer having embedded electroplating current paths to provide uniform plating over wafer surface
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US8373254B2 (en) * 2008-07-29 2013-02-12 Taiwan Semiconductor Manufacturing Company, Ltd. Structure for reducing integrated circuit corner peeling
JP2010153753A (ja) * 2008-12-26 2010-07-08 Renesas Electronics Corp 半導体装置
US8865592B2 (en) * 2009-02-03 2014-10-21 Infineon Technologies Ag Silicided semiconductor structure and method of forming the same

Also Published As

Publication number Publication date
JP2013026624A (ja) 2013-02-04
JP6028298B2 (ja) 2016-11-16
EP2549532B1 (en) 2020-06-03
EP2549532A2 (en) 2013-01-23
US20130023091A1 (en) 2013-01-24
US8349666B1 (en) 2013-01-08
EP2549532A3 (en) 2016-12-28
TW201320290A (zh) 2013-05-16

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