TWI536467B - 半導體裝置、半導體裝置之製造方法,及電源裝置 - Google Patents
半導體裝置、半導體裝置之製造方法,及電源裝置 Download PDFInfo
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- TWI536467B TWI536467B TW101102495A TW101102495A TWI536467B TW I536467 B TWI536467 B TW I536467B TW 101102495 A TW101102495 A TW 101102495A TW 101102495 A TW101102495 A TW 101102495A TW I536467 B TWI536467 B TW I536467B
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Description
在這裡所揭露之實施例係關於半導體裝置、半導體裝置之製造方法以及電源。
有一種習知之高電子遷移率電晶體(high electron mobility transistor;HEMT),其所具有之半導體積層結構係包含載體運行層與載體供應層。近幾年來,氮化鎵高電子遷移率電晶體已經被積極地開發。藉由使用氮化鋁鎵/氮化鎵之異質結作為以氮化鎵為基礎之化合物半導體,而形成氮化鎵-高電子遷移率電晶體之高電子遷移率電晶體結構,其中氮化鎵作為電子運行層,而氮化鋁鎵作為電子供應層而分層。
氮化鎵係為具有高破壞場強度之金屬,其能帶間隙係趨近於3.4電子伏特(eV),而大於矽之能帶間隙(趨近於1.1電子伏特)以及砷化鎵之能帶間隙(趨近於1.4電子伏特)。氮化鎵係為具有高飽和電子速度之材料。因此,氮化鎵預期將被用來實現可用高壓操作且可獲得高輸出之電源所用的半導體裝置。氮化鎵-高電子遷移率電晶體係預期作為具有高效率之開關元件而使用於電子裝置中之電源裝置。
具有上述氮化鎵-高電子遷移率電晶體的半導體晶片係設置在電路基材之支撐板上、導線框架之台座上等等。有一種用以將半導體晶片放置於支撐板之技術,係藉由使
用晶片接合劑(例如焊料和黏著劑等)接合半導體晶片之背面與支撐板之半導體晶片放置區域。例如:日本的專利公開公報第2006-156437號,日本的專利公開公報第6-132442號,以及日本的專利公開公報第58-207645號係公開作為相關技術。
鑑於上述情況,本發明之目的是提供一種半導體裝置、半導體裝置之製造方法以及電源,用以抑制當半導體晶片放置在基材的台座上時的移動或轉動所產生之位移。
根據本發明之一面向,一種半導體裝置之製造方法係包括:在支撐板之半導體晶片放置區域和半導體晶片之背面之一者形成具有第一金屬之層與具有第二金屬之層之一者;在半導體晶片放置區域和半導體晶片之背面之另一者的一區域上形成具有第一金屬之層與具有第二金屬之層之另一者,其中,形成具有第一金屬之層與具有第二金屬之層之該另一者之該區域係對應於形成有具有第一金屬之層與具有第二金屬之層之該一者之區域的一部份;以及,在將半導體晶片定位在半導體晶片放置區域後,形成包含有具有第一金屬與第二金屬之合金之層,以接合該半導體晶片與該半導體晶片放置區域。
在下文中將參閱附圖說明依據各實施例之半導體裝置、半導體裝置之製造方法以及電源裝置。參閱第1至第4圖說明依據第一實施例之半導體裝置與半導體裝置之製
造方法。
第一實施例之半導體裝置(其係使用例如以氮化物為基礎之化合物半導體(例如:以氮化鎵為基礎之化合物半導體)的化合物半導體裝置)係為封裝有半導體晶片的半導體封裝件,該半導體晶片具有以氮化物為基礎之半導體積層結構,該半導體積層結構具有載體運行層與載體供應層,並具有樹脂。半導體晶片亦稱為半導體元件或電源半導體元件,係由高電流所操控。離散封裝件係在以下的說明中作為例子。
如同第2圖與第3圖所顯示,半導體裝置包括半導體晶片1、在其上放置有半導體晶片1之台座2、接合層3、閘極引線21、源極引線22、汲極引線23、接合線(在此情況下為鋁線)4、以及模製化合物(molding compound)7。該模製化合物7也稱為模製樹脂。台座2係例如為導線框架之台座。台座2也稱為支撐板。
放置在台座2上之半導體晶片1之閘極墊24、源極墊25以及汲極墊26係分別以鋁線4與閘極引線21、源極引線22以及汲極引線23相耦合,並以模製化合物7進行封裝。在此情形中,與半導體晶片1之背面(基材之背面)固定的台座2係與汲極引線23電性耦合。第一實施例並不以此情形為限。台座2可電性耦合於源極引線22。
在此情形中,半導體晶片1包含氮化鎵-高電子遷移率電晶體,其具有以氮化鎵為基礎之半導體積層結構,包括氮化鎵電子運行層與氮化鎵鋁電子供應層。半導體晶片
例如為用於電源的氮化鎵-高電子遷移率電晶體晶片,其用作為設置於電子裝置內或電源裝置內之開關元件。以氮化鎵為基礎之高電子遷移率電晶體晶片1包括閘極電極、源極電極以及汲極電極在以氮化鎵為基礎之半導體層元件之上部。以氮化鎵為基礎之高電子遷移率電晶體晶片1包括佈線層,其包括位於上述電極之上部之絕緣膜以及佈線。閘極墊24、源極墊25以及汲極墊26外露於以氮化鎵為基礎之高電子遷移率電晶體晶片1之表面上。氮化鎵-高電子遷移率電晶體也稱為以氮化鎵為基礎之高電子遷移率電晶體。氮化鎵高電子遷移率電晶體晶片也稱為以氮化鎵為基礎之高電子遷移率電晶體晶片。
根據第一實施例之半導體裝置(離散封裝件)之製造方法將在以下作敘述。半導體裝置之製造方法也稱為半導體晶片之放置方法。包括有氮化物半導體積層結構(其具有載體運行層與載體支撐層)之半導體晶片1係固定於導線框架之台座2。例如,藉由例如鋁線之接合線4的連接方式,半導體晶片1之閘極墊24係與閘極引線21相耦合,汲極墊26係與汲極引線23相耦合,且源極墊25係與源極引線22相耦合。
半導體晶片1係例如使用樹脂藉由轉移成型方法進行封裝。也就是說,成型化合物7用以進行封裝以形成半導體晶片1。半導體晶片1係從導線框架移除,並獲得該半導體裝置(離散封裝件)。如同第11圖所顯示,舉例而言,如果晶片附接劑(例如包括焊料或導熱樹脂之黏合劑)將半
導體晶片1固定在導線框架之台座2上,半導體晶片1之例如移動或轉動的位移可能被產生。
根據第一實施例,半導體晶片1係以下列的方式固定在導線框架之台座2。如第1A圖所示,在導線框架之台座2上之半導體放置區域2A之整個表面上,係例如藉由電解鍍覆法形成銀層5做為具有第一金屬之層。銀層5之厚度例如趨近於5微米(μm)。銀層5所形成之區域可例如藉由電阻圖案化的方式被指定。半導體晶片放置區域2A的尺寸(面積)係幾乎相等於半導體晶片1之背面之尺寸(面積)。半導體晶片放置區域2A也稱為導線框架放置區域。在此情形中,藉由將微量的鋯(Zr)添加至銅所獲得之材料可作為導線框架。
在這階段中,如第5A圖所顯示,在導線框架之台座2上之圍繞著半導體晶片放置區域2A的區域,與錫(Sn)不興容的鉻層8可藉由電解鍍覆法形成為具有第三金屬之層,其係不與第一金屬與第二金屬中之至少一者產生反應。鉻層8之厚度可例如趨近於2微米(μm)。在此情形中,鉻層8所形成之區域可例如藉由電阻圖案化的方式被指定。這可避免錫層6於以下所述的熔化操作中滲出。
如第1B圖所示,在半導體晶片1之部分背面中,係例如藉由電解鍍覆法形成錫層6以作為包括有第二金屬之層。錫層6之厚度係例如趨近於2.6微米。在此情形中,錫層6係形成在半導體晶片1之背面之中央部分。以此方式,藉由在半導體晶片1之背面之中央部位形成錫層6,
而防止錫層6在以下所述之熱接合中滲出至半導體晶片放置區域2A周圍之區域。形成有錫層6之區域可例如藉由電阻圖案化的方式所指定。錫層6係形成在半導體晶片1背面之一部分。如同以下所述,藉由與銀層5進行合金化,錫層6具有將半導體晶片1定位在半導體晶片放置區域2A之功能。結果,錫層也稱為定位金屬層或定位凸塊。
在此情形中,較宜在半導體晶片1背面(例如,在用以支持以氮化鎵為基礎的半導體積層結構的碳化矽基材的背面)進行鈦/鎳/金的金屬化處理。較佳者為,在藉由濺鍍法、鍍覆法(例如電解鍍覆法以及無電鍍覆法)等等形成依序層疊有鈦、鎳、金之黏著層後,在黏著層上形成錫層6。例如,形成黏著層之鈦層、鎳層或金層的厚度係分別趨近於100奈米、200奈米以及100奈米。形成黏著層之區域可例如藉由電阻圖案化的方式指定。除了依序層疊有鈦、鎳、金的黏著層之外,亦可使用依序層疊有鈦、鉑、金的黏著層作為用以將錫層6黏著至半導體晶片1之背面的黏著層。亦即,鈦/鉑/金之金屬化處理可以在半導體晶片1之背面進行,例如在用以支撐以氮化鎵為基礎之半導體積層結構之碳化矽基材之背面進行。
如第1C圖所示,半導體晶片1係定位在台座2上之半導體放置區域2A上。如第1D圖所示,錫銀合金層9係形成為包括具有銀錫之合金的層,且半導體晶片1係與台座2上之半導體晶片放置區域2A接合。也就是說,半導體晶片1係定位在台座2上之半導體晶片放置區域2A,且該
半導體晶片1係以面朝上(face-up)之方式放置在半導體晶片放置區域2A中,使得形成在半導體晶片放置區域2A之整個表面的該銀層5與形成在半導體晶片1之部分背面之錫層6相接觸。藉由大約221度C以上至最高大約240度C的溫度進行熱接合,而形成了錫銀合金層9,且半導體晶片1係藉由錫銀合金層9而與台座2上之半導體晶片放置區域2A相接合。結果,半導體晶片1係固定於導線框架之台座2。也就是說,半導體晶片1係藉由利用錫銀合金層9之金屬連接方式確實地與導線框架之台座2上之半導體晶片放置區域2A相接合。在此情形中,作為接合金屬且用以連接半導體晶片1與導線框架之台座2之錫銀合金係可獲得高的熱輻射效應,這是因為錫銀合金具有低的熱阻(thermal resistance)之故。
如第5A圖所示,如果鉻層8係形成在導線框架之台座2上之圍繞半導體晶片放置區域2A之區域內,則如第5B圖所示,半導體晶片1係定位在台座2上之半導體晶片放置區域2A上。如第5C圖所示,係形成錫銀合金層9,且該半導體晶片1係與台座2上之半導體晶片放置區域2A相接合。
如上所述,如果當銀層5與錫層6相接觸時溫度大約221度或更高,則銀與錫具有共晶反應。因此,銀層5與錫層6接觸的部分係熔化與合金化,因而形成了該錫銀合金層9。大約221度C之溫度(其係為錫銀合金之熔點)係為錫和銀的二相圖之固相線溫度。在此情形中,由於錫層
6只設置在半導體晶片1之背面的一部分(在此情形中為中央部分)。因此,在該部分的銀層5與錫層6熔解與合金化,從而形成錫銀合金層9。在此情形中,銀與錫有共晶反應。根據錫與銀之二相圖,液相係產生在221度C之固相線溫度,且Ag3Sn(錫化三銀)與錫之固相係在等於或小於221度C之溫度產生。根據錫與銀之二相圖,錫化三銀之互溶度(solubility)極限係顯示趨近於73.2 wt%之銀以及趨近於26.8 wt%之錫。因此,如果銀的擴散熔化至錫係上升至銀之73.2 wt%或更高,則錫三化銀為固相。因此,銀擴散熔化至錫並未進一步進行。也就是說,銀層5與錫層6並未為熔化或擴散。結果,如果銀層與錫層的厚度比率為73.2:26.8,則銀層5與層6係在錫層6所形成之區域內(也就是說,在半導體晶片1之背面之一部分(在此情形中為中央部分))熔化並合金化,因而形成了該錫-銀合金層9。再者,即使銀層5與錫層6之厚度比率並非73.2:26.8,如果銀層5厚度增加,則銀層5與錫層6係在小於錫層6所形成之區域(亦即,在半導體晶片1之背面之一部分(在此情形中為中央部分))的區域中熔化並合金化,從而形成了該錫銀合金層9。因此,形成在錫層6所形成的區域所面對之區域以外的區域的銀層5係熔化,使得該錫-銀合金層9並未滲出。也就是說,形成在半導體晶片1之背面之該部分(在此情形中為中央部分)的錫層6以及形成在相對於該部分之區域的銀層5係熔化。形成在上述區域以外的區域(在此情形中係為在中央區域之外的區域)的銀層5並未
熔化,而維持為固體。
以上述方式所形成之半導體晶片之半導體裝置之結構,也就是放置結構將在以下作敘述。也就是說,如第1D圖所示,根據第一實施例之半導體裝置包括台座2、設置在台座2上的半導體晶片1、以及包括銀層5以及錫銀合金層9的接合層3,該接合層3設置於台座2與半導體晶片1之間。在此情形中,銀層5係與台座2接合,但銀層5僅與半導體晶片1相接觸。錫銀合金層9係用以接合台座2與半導體晶片1。錫銀合金層9係設置在台座2上之半導體晶片放置區域2A之中央部分,且銀層5係設置在台座2上之半導體晶片放置區域2A之中央部分外側。
如第5A圖所示,如果鉻層8係形成在導線框架之台座2之半導體晶片放置區域2A之周圍區域,則半導體晶片放置區域2A之周圍區域具有鉻層8,而如第5C圖所示,該鉻層8不會與含於錫銀合金層9中之錫產生反應。黏著層可設置於半導體晶片1與錫銀合金層9之間。
根據第一實施例之半導體裝置與半導體裝置之製造方法,其優點在於當半導體晶片1放置在導線框架之台座2上時,半導體晶片1之位移(例如移動或轉動)並未產生。也就是說,當半導體晶片1放置在導線框架之台座2上時,半導體晶片1能以高精確度固定(放置)在前述導線框架之台座2上之預定位置,而沒有例如位移之接合缺陷。包括在用以連接導線框架之台座2與半導體晶片1之接合層3中之錫銀合金的熔點係趨近於221度C,這溫度是比半導
體晶片1的操作溫度還要高。這防止半導體晶片1在操作過程中產生熱而造成位移。此外,根據第一實施例,由於錫銀合金層9係形成在半導體晶片放置區域2A之中央部位,故可防止錫銀合金層9滲出至導線框架之台座2上之半導體晶片放置區域2A周圍之區域。尤其,如果鉻層8係形成在導線框架之台座2上之半導體晶片放置區域2A之周圍區域,則確實地防止錫銀合金層9向外滲出。這可例如防止由導線接合所形成之接合表面(導線接合電極)被污染。結果,製造出具有高可靠性之半導體裝置,且製造產出率大輻提升。
如第4圖所示,如果半導體晶片1係與台座2上之半導體晶片放置區域2A接合,而焊料、銀膏或晶片接合劑103(例如導熱劑)係塗佈於半導體晶片1與半導體放置晶片2A之其中一背面之整個表面上,則製造具有高可靠度之半導體裝置是困難。也就是說,因為會產生半導體晶片1之諸如移動或轉動之位移、或者藉由導線接合所形成之接合線4之接合表面係在樹脂之硬化時因為焊料滲出或擴散而污染,因此製造出具有高可靠度之半導體晶片1是困難的。
以上述方式形成的半導體裝置之半導體晶片的操作中之熱阻係等於或小於0.3度C/W。該熱阻幾乎等於藉由銲料接合形成之半導體裝置之熱阻。即使半導體晶片1以上述方式與導線框架之台座2相接合,半導體晶片1之熱亦可以經由銀層5或錫銀合金9以及導線框架之台座2有
效地發散至外面。例如,在包含在電子裝置中之具有高電壓與高功率的電源所用的半導體裝置中,由於半導體晶片1所產生的熱的量增加,因此,控制電路的可靠性可能受到影響。然而,由於半導體晶片1的熱係以上述方式有效地發散至外部,因此可實現具有高可靠度之半導體裝置。
根據前述的第一實施例,銀層5係形成為具有第一金屬之層,錫層6係形成為具有第二金屬之層,且錫銀合金層9係形成為具有合金之層,該合金係藉由第一金屬與第二金屬之合金化而獲得。然而,具有第一金屬之層、具有第二金屬之層以及包括有具有第一金屬與第二金屬之合金之層並不限於上面所述之層。也就是說,具有第一金屬之層5可包括銀、銅、金、鉍、銦、鎳、鉛以及銻之一者作為第一金屬。具有第一金屬之層5可為具有第一金屬之第一金屬層。具有第一金屬之層5可為具有第一金屬與另一金屬之層。具有第一金屬之層5可為具有第一金屬與樹脂之層。在此情形中,具有第一金屬與樹脂之層係為添加有第一金屬粉末之樹脂層,例如,混合有第一金屬的導熱樹脂層。樹脂層亦稱為黏著劑。導熱樹脂層亦稱為導熱黏著劑。如果具有第一金屬之層5係為具有第一金屬與樹脂之層、或者如果具有第一金屬之層5係藉由使用包括有第一金屬與助焊劑之膏(例如銀膏)所形成,則可以使用例如塗佈法(dispense method)、網版印刷法(screen printing method)等印刷方法。根據上述實施例,為了形成添加有銀粉之樹脂層作為具有第一金屬之層5,係例如將包括有趨
近於50vol%之具有趨近於5微米(μm)之平均顆粒直徑的銀粉之環氧系樹脂材料形成為趨近於50微米之厚度。如同上述的第一實施例,當半導體晶片1係放置在導線框架之台座2上,可以防止半導體晶片1例如移動或轉動之位移。以上述方法形成之半導體裝置內之半導體晶片1之操作過程中之熱阻係等於或小於約0.5度C/W。該熱阻係相等於藉由使用導熱劑進行接合而製造之半導體裝置之操作過程中之熱阻。即使半導體晶片1係以上述方式與導線框架之台座2接合,半導體晶片1之熱亦可經由具有銀與樹脂之層5、具有錫銀合金與樹脂之層9、以及導線框架之台座2而有效地發散至外部。
具有第二金屬之層6可包括有會與第一金屬銀、銅、金、鉍、銦、鎳、鉛以及銻之一者產生反應之金屬作為第二金屬,也就是說,會熔化及合金化之金屬。例如,具有第二金屬之層6可包括錫、鉍、銦、鋅、銀、銻、銅、鎳以及鉛之一者作為第二金屬。也就是說,具有第二金屬之層6可為具有錫之錫層。具有第二金屬之層6可包括錫作為主成分以及鉍、銦、鋅、銀、銻、銅、鎳以及鉛之至少一者。具有第二金屬之層6可包括鉍、銦、鋅、銀、銻、銅、鎳以及鉛之至少一者。具有第二金屬之層6可為具有第二金屬之第二金屬層。具有第二金屬之層6可包含第二金屬及其他金屬。具有第二金屬之層6可包括第二金屬與樹脂。在此情況下,具有第二金屬與樹脂之層係例如為添加有第二金屬粉末之樹脂層,也就是說,混合有第二金屬
導熱樹脂層。如果具有第二金屬之層6包括第二金屬與樹脂、或者如果具有第二金屬之層係藉由使用包括有第二金屬與助焊劑之膏(例如錫膏)所形成,則可以使用塗佈法、例如塗佈法、網版印刷法等印刷方法。例如,根據上述的實施例,為了藉由使用錫膏以形成具有第二金屬之層6,係例如藉由網版印刷法而形成錫膏。接著,使錫膏經受回焊處理以在下述條件下形成:錫的熔點是約等於或高於232度C或最高250度C,持續時間約30秒或更長。在此情況下,如同上面所述的實施例,當半導體晶片1放置在導線框架之台座2上時可防止半導體晶片1例如移動或轉動之位移。以上述方式形成之半導體裝置中之半導體晶片1之操作期間中的熱阻係等於或小於約0.3度C/W。該熱阻幾乎等於以焊料接合方式所形成之半導體裝置之熱阻。即使半導體晶片1係以上述方式接合於導線框架之台座2,半導體晶片1的熱亦可經由銀層5、錫銀合金層9以及導線框架之台座2發散至外部。
包括有具有第一金屬與第二金屬之合金之層9係為具有第一金屬銀、銅、金、鉍、銦、鎳、鉛及銻其中一者、以及第二金屬之層,該第二金屬可與第一金屬反應以形成合金。例如,包括有具有第一金屬與第二金屬之合金之層係為包括第一金屬銀、銅、金、鉍、銦、鎳、鉛與銻之一者、以及第二金屬錫、鉍、銦、鋅、銀、銻、銅、鎳與鉛之一者之層。包括有具有第一金屬與第二金屬之合金的層可為具有第一金屬與第二金屬之合金層。包括有具有第一
金屬與第二金屬之合金之層可為具有第一金屬、第二金屬與其他金屬的合金層。包括有具有第一金屬與第二金屬之合金之層可為具有合金、第一金屬與第二金屬之層,且該合金具有第一金屬與第二金屬。包括有具有第一金屬與第二金屬之合金之層可為具有樹脂及合金之層,且該合金具有第一金屬與第二金屬。在此情況下,包括有合金(且該合金具有第一金屬與第二金)與樹脂之層係例如為與包括有第一金屬與第二金屬之合金混合之導熱樹脂層。
根據上述的第一實施例,可形成鉻層8作為具有第三金屬之層。具有第三金屬之層並不限於此情形。具有第三金屬之層8包括有不與第二金屬產生反應之金屬,也就是說,不與第二金屬形成固態溶體(solid solution)的金屬。例如,具有第三金屬之層8包括鉻、鐵、鈦以及鋯之一者。
根據上述實施例,具有第一金屬之層5係形成在導線框架之台座2上之半導體放置區域2A之整個表面上,且具有第二金屬之層6係形成在半導體晶片1之背面一部分(中央部分之一部分)。然而,層5與層6並不限於上述情況。也就是說,具有第一金屬之層5以及具有第二金屬之層6其中一者係形成在導線框架之台座2之半導體晶片放置區域2A上以及半導體晶片1之背面其中一者上。具有第一金屬之層5以及具有第二金屬之層6之另一者可形成在半導體晶片放置區域2A與半導體晶片1之背面之另一者之對應於形成有具有第一金屬之層5以及具有第二金屬之層6之
一者之區域的一部份的區域。
例如,具有第一金屬之層5可形成在導線框架之台座2上之半導體放置區域2A之一部分(中央部分之一部分),且具有第二金屬之層6可形成在半導體晶片1之背面之整個表面。形成在導線框架之台座2上之半導體放置區域2A之一部分(中央部分之一部分)之具有第一金屬之層5與形成在與該部分相對之區域的具有第二金屬之層6係熔化。形成在該區域以外之區域(中央部分外側之區域)之具有第二金屬之層6係未熔化而維持為固體。這可防止例如由於半導體晶片1之移動或轉動所產生之位移。具有第一金屬之層5係形成在導線框架之台座2上之半導體放置區域2A之中央部分。據此,防止包括第一金屬與第二金屬之層9從半導體放置區域2A周圍滲出。
如第6A圖所示,具有第一金屬之層5(在此情況中為銀層)可以形成在導線框架之台座2上之半導體放置區域2A之整個表面。如第6B圖所示,具有第二金屬之層6(在此情況中為錫層)可以形成在半導體晶片1背面之一部分(複數個部分)。例如,較佳者為,具有第二金屬之層6(在此情況中為錫層)係形成在半導體晶片1背面的對角線上之二個位置。錫層6可以例如藉由電解鍍覆法或網版印刷法形成。如第6C圖所示,半導體晶片1係定位在台座2之半導體放置區域2A上。如第6D圖所示,形成錫銀合金層9,且半導體晶片1係接合於台座2上之半導體放置區域2A。因此,具有第二金屬之層6係形成在半導體晶片1
背面之一部分(複數個部分),且具有第一金屬之層5係形成在相對於該部分之區域,且形成在該區域以外之區域(該複數個部分周圍的部分)內之具有第一金屬之層5則並未熔化並維持固態。此可防止半導體晶片1之例如移動或轉動之位移。由於具有第二金屬之層6係形成在半導體晶片1背面之複數個位置,因此係防止半導體晶片1在熱接合的情況下的轉動。具有第二金屬之層6係形成在未接觸導線框架之台座2上之半導體放置區域2A之外側邊緣的區域(周緣以外的區域)的複數個部分。此可防止在半導體晶片放置區域2A之周圍之包括有具有第一金屬與第二金屬之合金的層9於熱接合時滲出。在此情況下,鉻層8係形成在導線框架之台座2之半導體晶片放置區域2A周圍之區域。這確實地防止錫銀合金層9滲出。以上述方式形成之半導體裝置之半導體晶片1之操作期間之熱阻值係等於或小於約0.3度C/W。該熱阻值係相當於以焊料接合方式製造之半導體裝置之熱阻值。即使半導體晶片1係接合於導線框架之台座2,半導體晶片1之熱亦可透過銀層5、錫銀合金層9以及導線框架之台座2發散至外部。在第6A至6D圖係顯示在導線框架之台座2上之半導體晶片放置區域2A周圍之區域中形成鉻層8之情形的一例。然而,第一實施例並不限於這樣的情況。例如,鉻層8並非一定要形成。
反之,具有第一金屬之層5係形成在導線框架之台座2上之半導體晶片2A之一部分(複數個部分),且具有第二金屬之層6可形成在半導體晶片1背面之整個表面上。在
此情形中,得到的操作和效果相當於上面所描述的情況。如第7A圖所示,具有第一金屬之層5(在此情況中為銀層)可形成在導線框架之台座2上之半導體晶片放置區域2A之整個表面上。如第7B圖所示,具有第二金屬之層6(在此情況中為錫層)可形成在半導體晶片1背面之一部分(周緣)。如第7C圖所示,半導體晶片1係定位在台座2之半導體晶片放置區域2A上。如第7D圖所示,形成錫銀合金層9,且該半導體晶片1接合於台座2上之半導體晶片放置區域2A。因此,形成在半導體晶片1背面之一部分(周緣)之具有第二金屬之層6、以及形成與該部分相對向之區域的具有第二金屬之層6係熔化。形成該區域以外之區域內(位於周緣內之區域)之具有第一金屬之層5係未熔化且維持固態。這防止半導體晶片1之諸如移動或轉動之位移。尤其是,由於具有第二金屬之層係以上述的方式形成在半導體晶片1周緣,包括具有第一金屬與第二金屬之合金之層9可滲出在半導體晶片放置區域2A周圍。較佳地,具有不與第一金屬與第二金屬之至少一者產生反應之第三金屬之層8(在此情況中為鉻層)係形成在該導線框架之台座2上之半導體晶片放置區域2A之周圍區域。據此,防止錫在熔化操作中滲出,亦即,防止錫銀合金層9滲出。以上述方式所形成之半導體裝置之半導體晶片之操作期間之熱阻係相當於或小於約0.3度C/W。該熱阻係等於藉由銲料接合方式所製造之半導體裝置之熱阻。即使半導體晶片1與導線框架之台座2相接合,半導體晶片1之熱亦經由
銀層5、錫銀合金層9以及導線框架之台座2有效地發散至外部。第7A至7D圖說明在導線框架之台座2上之半導體晶片放置區域2A周圍之區域內形成鉻層8之情形。然而,第一實施例並不限定於此情形。鉻層8亦可不形成。
反之,具有第一金屬之層5係形成在導線框架之台座2上之半導體晶片放置區域2A之一部分(周緣部分)。在此情形中,所獲得之操作與效果相當於上述之情況。例如,具有第二金屬之層6可形成在導線框架之台座2上之半導體晶片放置區域2A整個表面,且具有第一金屬之層5可形成在半導體晶片背面之一部分。因此,形成在半導體晶片1背面之一部分且具有第一金屬之層5、與形成在對應於該部分之區域內的具有第二金屬之層6係被熔化。形成在上述區域以外之區域內的具有第二金屬之層6並未熔化並維持固態。這可防止半導體晶片1之諸如移動或轉動之位移。尤其,當具有第一金屬之層5係形成在半導體晶片1之背面之周緣,包括具有第一金屬與第二金屬之合金之層9可能會在半導體晶片放置區域2A周圍滲出。因此,較宜者為,具有不與第一金屬與第二金屬至少一者產生反應之第三金屬之層8,係形成在導線框架之台座2上之半導體晶片放置區域2A周圍的區域。結果,防止錫在熔化操作的過程中滲出。
反之,具有第二金屬之層6可形成在導線框架之台座2上之半導體晶片放置區域2A之一部分,且該層5可形成在半導體晶片1背面之整個表面上。在此情況下,所獲得
之操作與效果相當於上述情況。根據上述第一實施例,具有第一金屬之層5(銀層)係形成在導線框架之台座2上之半導體晶片放置區域2A之整個表面上,且具有第二金屬之層6(錫層)係形成在半導體晶片1之背面之一部分(中央部分之一部分)。因此,所製造的半導體裝置包括具有第一金屬之層5(銀層)設置於半導體晶片1與台座2之間,且層9(錫銀合金層,該層具有藉由對該第一金屬進行合金化所獲得之合金)包括具有第一金屬與第二金屬之合金。然而,第一實施例並不限於這樣的情況。
例如,如果具有第二金屬之層6係形成在導線框架之台座2上之半導體晶片放置區域2A的整個表面上,且具有第一金屬之層5係形成在半導體晶片1背面之一部分,則所製造的半導體裝置所包括之具有第二金屬之層6係設置在台座2與半導體晶片1之間,且所包括之層9(該層具有對該第二金屬進行合金化所獲得之合金)係包括具有第一金屬與第二金屬之合金。在此情形中,具有第二金屬之層6係接合於台座2並與半導體晶片1接觸。
例如,如果具有第一金屬之層5係形成在導線框架之台座2上之半導體晶片放置區域2A之一部分,且如果具有第二金屬之層6形成在半導體晶片1背面之整個表面上,則所製造的半導體裝置所包括之具有第二金屬之層6係設置在台座2與半導體晶片1之間,且所包括之層9(該層具有對第二金屬進行合金化所獲得之合金)係包括具有第一金屬與第二金屬之合金。在此情況下,具有第二金屬之層
6係接合於半導體晶片1且接觸該台座2。
例如,如果具有第二金屬之層6係形成在導線框架之台座2上之半導體晶片放置區域2A之一部分,且如果具有第一金屬之層5係形成在半導體晶片1背面之整個表面上,則所製造的半導體裝置所包括之具有第一金屬之層5係設置在台座2與半導體晶片1之間,且所包括之層9(該層具有對第一金屬進行合金化所獲得之合金)係包括具有第一金屬與第二金屬之合金。在此情形中,具有第一金屬之層5與半導體晶片1相接合並接觸台座2。
根據上述實施例,由於具有第一金屬之層5(銀層)係形成在導線框架之台座2上之半導體晶片放置區域2A的整個表面上,且具有第二金屬之層6(錫層)係形成在半導體晶片1之一部分(中央部分之一部分),因此所製造之半導體裝置係包括位在台座2上之半導體晶片放置區域2A之中央部分的層9(錫銀合金層,該層具有對該第一金屬進行合金化所獲得之合金)(該層9包括具有第一金屬與第二金屬之合金),且包括位在台座2上之半導體晶片放置區域2A之外的具有第一金屬的層5(銀層)。該第一實施例並不限於這樣的情況。
例如,如果具有第一金屬之層5係形成在導線框架之台座2上之半導體晶片放置區域2A之一部分(中央部分之一部分),且如果具有第二金屬之層6係形成在半導體晶片1之背面之整個表面上,則所製造之半導體裝置所包括之層9(該層具有對第二金屬進行合金化所獲得之合金)係包括
具有第一金屬與第二金屬之合金,並位在台座2上之半導體晶片放置區域2A之中央部分,且所包括之具有第二金屬之層6係位在台座2上之半導體晶片放置區域2A之外側。
例如,如果具有第一金屬之層5係形成在導線框架之台座2上之半導體晶片放置區域2A之整個表面上,且如果具有第二金屬之層6形成在半導體晶片1背面之一部分(複數個部分),則所製造的半導體裝置所包括之具有第一金屬與第二金屬之合金之層9係位在台座上之半導體晶片放置區域2A之複數個部分,且所包括之具有第一金屬之層5係位於具有合金之層9周圍,其中該層9設置在台座2上之半導體晶片放置區域2A之複數個部分。反之,若具有第一金屬之層5係形成在導線框架之台座2上之半導體晶片放置區域2A之一部分(複數個部分),且如果具有第二金屬之層6係形成在半導體晶片1背面之整個表面上,則所製造的半導體裝置所包括之層9(該層具有對第二金屬近行合金化所獲得之合金)係在台座2上之半導體晶片放置區域2A的複數個部分包括具有第一金屬與第二金屬之合金,且所包括之具有第二金屬之層6係位在具有合金之層周圍,其中該具有合金之層係設置在台座2上之半導體晶片放置區域2A的複數個部分。
例如,如果具有第一金屬之層5形成在導線框架之台座2上之半導體晶片放置區域2A之整個表面上,且如果具有第二金屬之層6形成在半導體晶片1背面之一部分(周緣部分),則所製造之半導體裝置所包括之具有第一金屬與第
二金屬之層9(該層具有對第一金屬進行合金化所獲得之合金)係位在台座2上之半導體晶片放置區域2A周緣,且所包括之具有第一金屬之層5係位在台座2上之半導體晶片放置區域2A之周緣部分。反之,如果具有第一金屬之層5係形成在導線框架之台座2上之半導體晶片放置區域2A一部分(周緣),且如果具有第二金屬之層6係形成在半導體晶片1背面之整個表面上,則所製造之半導體裝置所包括之層9(該層具有對第二金屬進行合金化所獲得之合金)係在台座2上之半導體晶片放置區域2A周緣包括有具有第一金屬與第二金屬之合金,且所包括之具有第二金屬之層6係在台座2上之半導體晶片放置區域2A之周緣內。
例如,若具有不與第一金屬與第二金屬之至少一者反應的第三金屬之層8係形成在導線框架之台座2上之半導體晶片放置區域2A周圍的區域,則所製造之半導體裝置包括具有第三金屬之層8,而該第三金屬係不與在具有合金之層9內所包括之第一金屬與第二金屬之至少一者產生反應,也就是說,層8所具有之其他金屬係不與具有合金之層9所包括之金屬產生反應。
根據該實施例之變化例(請見第7A至第7D圖),例如,如第8A至第8D圖所示,在將半導體晶片1接合於半導體晶片放置區域2A之前,突起部10可形成在具有第一金屬之層5之表面上。例如,有三個用以形成突起部10之方法。第一個用以形成突起部10之方法例如為,當藉由電解鍍覆法形成銀層5時,藉由改變電流密度,並且以島形形式施加銀。
例如,當具有趨近於5μ之厚度的銀層5藉由電解鍍覆法形成時,具有表面粗糙度±3μm的銀層5係藉由改變電流密度而形成。第二方法係用以形成突起部10在銀層5之表面上的方法,其係利用具有粒子尺寸#100至#200之鋁、氧化鋁及玻璃珠在銀層5上執行噴砂加工,藉以使銀層5的表面產生粗糙度。第三個用以在銀層5表面上形成突起部10之方法係藉由噴塗具有平均粒徑趨近於10μm至20μm之銀粉或是銀膏,以將銀粉或銀膏固定至銀層5。在此情況下,關於所製造之半導體裝置,突起部10係形成在銀層5之表面上。以此方式,在半導體晶片1接合於半導體晶片放置區域2A之前,突起部10可形成在具有第二金屬之層6以及具有第一金屬之層5其中一者之表面上,其中,該具有第二金屬之層6以及具有第一金屬之層5係形成在半導體晶片放置區域2A之整個表面上以及半導體晶片1之背面。在此情形中,關於所製造之半導體裝置,突起部10係形成在具有金屬之層(在此情況中為銀層)的表面上。因此,當半導體晶片1接合於導線框架之台座2上之半導體晶片放置區域2A時,突起部10係塑性變形。因此,台座2上之半導體晶片放置區域2A以及半導體晶片1之表面的接觸區域增加,因此可減少熱阻。以上述方法形成之半導體裝置內之半導體晶片之操作期間的熱阻係等於或小於大約0.1度C/W。該熱阻係小於藉由焊料接合方式所製造之半導體裝置之熱阻。即使半導體晶片1以上述方法接合於導線框架之台座2,半導體晶片1之熱亦可透過銀層
5、錫銀合金層9、突起部10以及台座2有效地發散至外部。第8A至8D圖說明了一種在導線框架之台座2上之半導體晶片放置區域2A之周圍區域形成鉻層8之情況。然而,第一實施例並不限於這種情況。鉻層8亦可不形成。第8A至第8D圖所說明之情況係應用於上述實施例之變形例。第一實施例並不限於這種情況。該情況可適用於上述實施例(見第1A至第1D圖)以及其他實施例(見第5A至第5C圖以及第6A至第6D圖)。
根據上述的第一實施例,係以離散封裝件作為一個例子。然而,第一實施例並不限於離散封裝件。其他半導體封裝件亦可適用。根據上述第一實施例,由於半導體裝置係藉由使用導線框架而製造,製造的半導體裝置包括在導線框架之台座2上之半導體晶片1。然而,第一實施例並不限於這樣的情況。如第9圖所示,半導體晶片1係設於電路基板11上,例如具有球閘陣列12的封裝基板,且半導體晶片11係以接合線4耦合於封裝電路基板11(例如金線)。在以成型化合物7封裝之半導體裝置(半導體封裝件)中,本發明可應用於接合層3,該接合層3用以接合電路基板11與半導體晶片1。本發明可適用於包括有半導體晶片在例如印刷基板(佈線基板)等之電路基板上的半導體裝置。例如封裝基板或印刷基板之電路基板係稱為支撐板。
參閱第10圖,根據第二實施例之電源裝置將作敘述。
根據第二實施例之電源裝置包括具有上述氮化鎵-高電子遷移率電晶體的半導體封裝件。例如,包括在上述半
導體封裝件內之氮化鎵-高電子遷移率電晶體係用於包括在作為伺服器之電源裝置內之功率因數校正電路(power factor correction;PFC)。
如第10圖所示,PFC電路包括二極體電橋30、抗流線圈31、第一電容器32、包括在上述半導體封裝件的氮化鎵-高電子遷移率電晶體33、二極體34與第二電容器35。在此情況下,PFC電路所具有之組構為,該二極體電橋30、抗流線圈31、第一電容器32、包括在上述半導體封裝內的氮化鎵-高電子遷移率電晶體33、電晶體34與第二電容器35係放置在電路基板上。
根據第二實施例,上述半導體封裝件之汲極引線23、源極引線22以及閘極引線21分別插入於電路基板之汲極引線插置單元、源極引線插置單元以及閘極導引插置單元,接著例如以焊料等進行固定。以此方式,包括在上述半導體封裝件之氮化鎵-高電子遷移率電晶體33係耦合於電路板上所形成之功率因數校正電路(PFC)。
在功率因數校正電路上,抗流線圈31之一端子與二極體34之陽極端子34皆耦合於氮化鎵-高電子遷移率電晶體33之汲極電極D。抗流線圈31之另一端子係耦合於第一電容器32之一端子,且二極體34的陰極端子耦合於第二電容器之一端子。第一電容器32之另一端子、氮化鎵-高電子遷移率電晶體33之源極電極以及第二電容器35之另一端子係接地。第一電容器32之二端子皆耦合於二極體電橋30之一對端子。二極體電橋30之另一對端子係耦合
於輸入交流(AC)電壓之輸入端子。第二電容器35之二端子皆耦合於用以輸出直流(DC)電壓之輸出端子。氮化鎵-高電子遷移率電晶體33之閘極電極G耦合於閘極驅動器(圖未示)。如果氮化鎵-高電子遷移率電晶體33係由閘極驅動器所驅動,該功率因數校正電路將輸入端子所輸入之交流電壓輸入轉換為直流電壓且接著從輸出端子輸出直流電壓。
因此,根據第二實施例之電源裝置具有提升可靠度之優點。也就是說,其優點為,由於根據第一實施例之半導體封裝具有高可靠性,因此可組構具有高可靠性的電源裝置。在此情形中,係已經敘述了在伺服器所使用之電源裝置內所包含之功率因數校正電路使用上述半導體裝置(氮化鎵-高電子遷移率電晶體或是具有氮化鎵-高電子遷移率電晶體之半導體封裝件)之情況。然而,第二實施例並不限於這樣的情況。例如,上述半導體裝置(氮化鎵-高電子遷移率電晶體或具有氮化鎵-高電子遷移率電晶體之半導體封裝件)可用於電子設備(電子裝置)中,例如伺服器以外之電腦。上述半導體裝置(半導體封裝件)可用於另一包括在電源裝置內之電路(例如直流-直流轉換器)。本發明並不限於上述實施例以及變化例所述之配置。
在上面所述的實施例以及變化例中,係以包括氮化鎵-高電子遷移率電晶體之半導體晶片作為例子。然而,半導體晶片並不限於這樣的例子。
這裡所述的所有例子與條件式語言作為教學之目的以幫助讀者理解本發明的原則與發明者所貢獻的概念以推
動技術,並應當被解釋為不限於這樣特別引用的例子與條件,且在說明書中的此等例子的組成亦非關於顯示本發明之優點與缺點。雖然本發明之實施例已經詳細地進行描述,惟應理解,在不悖離本發明之精神與範圍下,可進行各種變化、置換與改變。
1‧‧‧半導體晶片
2‧‧‧台座
2A‧‧‧半導體放置區域
3‧‧‧接合層
4‧‧‧接合線
5‧‧‧銀層
6‧‧‧錫層
7‧‧‧化合物
8‧‧‧鉻層
9‧‧‧錫銀合金層
10‧‧‧突起部
11‧‧‧電路基板
12‧‧‧球閘陣列
21‧‧‧閘極引線
22‧‧‧源極引線
23‧‧‧汲極引線
24‧‧‧閘極墊
25‧‧‧源極墊
26‧‧‧汲極墊
30‧‧‧二極體電橋
31‧‧‧抗流線圈
32‧‧‧第一電容器
33‧‧‧氮化鎵-高電子遷移率電晶體
34‧‧‧電晶體
35‧‧‧第二電容器
103‧‧‧晶片接合劑
第1A圖與第1B圖為用以說明根據第一實施例之製造半導體裝置之方法與半導體裝置之例子的平面圖;第1C圖與第1D圖為剖面圖,係用以說明根據第一實施例之製造半導體裝置之方法以及半導體裝置之例子;第2圖為平面圖,係用以說明根據第一實施例之半導體裝置之例子;第3圖為剖面圖,係用以說明根據第一實施例之半導體裝置另一個例子;第4圖為剖面圖,係用以說明使用晶片接合劑之習知情形的問題;第5A圖至第5C圖為方塊圖,係用以說明根據第一實施例之半導體裝置之製造方法以及半導體裝置的變形例,第5A圖為平面圖,第5B圖與第5C圖為剖面圖;第6A圖至第6D圖為方塊圖,係用以說明半導體裝置之製造方法與半導體裝置之另一個變形例,第6A圖與第6B圖為平面圖,而第6C圖與第6D圖為剖面圖;第7A圖至第7D圖為方塊圖,係用以說明半導體裝置之製造方法與半導體裝置之另一個變形例,第7A圖與第
7B圖為平面圖,而第7C圖與第7D圖為剖面圖;第8A圖至第8D圖為方塊圖,係用以說明半導體裝置之製造方法與半導體裝置之另一個變形例,第8A圖與第8B圖為平面圖,而第8C圖與第8D圖為剖面圖;第9圖為剖面圖,係用以說明根據第一實施例的半導體之變形例;第10圖為方塊圖說明根據第二實施例的包含在電源裝置內的PFC電路的例子;以及第11圖為平面圖,係用以說明本發明之問題。
1‧‧‧半導體晶片
2‧‧‧台座
21‧‧‧閘極引線
22‧‧‧源極引線
23‧‧‧汲極引線
24‧‧‧閘極墊
25‧‧‧源極墊
26‧‧‧汲極墊
4‧‧‧接合線
7‧‧‧化合物
Claims (18)
- 一種半導體裝置之製造方法,包括:在支撐板之半導體晶片放置區域和半導體晶片之背面之一者形成具有第一金屬之層與具有第二金屬之層之一者;在該半導體晶片放置區域和該半導體晶片之背面之另一者的一區域上形成該具有第一金屬之層與該具有第二金屬之層之另一者,其中,形成該具有第一金屬之層與該具有第二金屬之層之該另一者之該區域係對應於形成有該具有第一金屬之層與該具有第二金屬之層之該一者之區域的一部份;以及在將該半導體晶片定位在該半導體晶片放置區域後,形成包含有具有第一金屬與第二金屬之合金之層,以接合該半導體晶片與該半導體晶片放置區域;其中,該具有第一金屬之層與該具有第二金屬之層之一者係形成在該半導體晶片放置區域和該半導體晶片之背面之該一者的整個表面上,該具有第一金屬之層與該具有第二金屬之層之另一者係形成在該半導體晶片放置區域和該半導體晶片之背面之該另一者之該部分上。
- 如申請專利範圍第1項所述之半導體裝置之製造方法,其中,該具有第一金屬之層與該具有第二金屬之層之該另一者係形成在該半導體晶片放置區域和該半導體晶片之背面之該另一者之中央部分。
- 如申請專利範圍第1項所述之半導體裝置之製造方法,其中,該具有第一金屬之層與該具有第二金屬之層之該另一者係形成在該半導體晶片放置區域和該半導體晶片之背面之該另一者之複數個部分。
- 如申請專利範圍第1項所述之半導體裝置之製造方法,其中,該具有第一金屬之層與該具有第二金屬之層之該另一者係形成在該半導體晶片放置區域和該半導體晶片之背面之該另一者之周緣上。
- 如申請專利範圍第1項所述之半導體裝置之製造方法,復包括:在該支撐板上之該半導體晶片放置區域周圍之區域,形成具有第三金屬之層,而該第三金屬不與該第一金屬與該第二金屬之至少一者產生反應。
- 如申請專利範圍第1項所述之半導體裝置之製造方法,其中,該第一金屬係為銀、銅、金、鉍、銦、鎳、鉛、銻之其中一者,以及其中,該第二金屬係藉由與該第一金屬反應而形成合金。
- 如申請專利範圍第6項所述之半導體裝置之製造方法,其中,該第二金屬係為錫、鉍、銦、鋅、銀、銻、銅、鎳以及鉛之其中一者。
- 如申請專利範圍第5項所述之半導體裝置之製造方法,其中,該第一金屬係為銀、銅、金、鉍、銦、鎳、鉛以及銻之其中一者,且 其中,藉由與該第一金屬反應而形成合金之該第二金屬係為錫、鉍、銦、鋅、銀、銻、銅、鎳以及鉛之其中一者,其中,不與該第二金屬反應之該第三金屬係為鉻、鐵、鈦及鋯之其中一者。
- 如申請專利範圍第1項所述之半導體裝置之製造方法,復包括:在該半導體晶片背面形成該具有第一金屬之層或該具有第二金屬之層之前,在該半導體晶片背面上形成黏附層。
- 一種半導體裝置之製造方法,包括:在支撐板之半導體晶片放置區域和半導體晶片之背面之一者形成具有第一金屬之層與具有第二金屬之層之一者;在該半導體晶片放置區域和該半導體晶片之背面之另一者的一區域上形成該具有第一金屬之層與該具有第二金屬之層之另一者,其中,形成該具有第一金屬之層與該具有第二金屬之層之該另一者之該區域係對應於形成有該具有第一金屬之層與該具有第二金屬之層之該一者之區域的一部份;在該支撐板上之該半導體晶片放置區域周圍之區域,形成具有第三金屬之層,而該第三金屬不與該第一金屬與該第二金屬之至少一者產生反應;在將該半導體晶片定位在該半導體晶片放置區域 後,形成包含有具有第一金屬與第二金屬之合金之層,以接合該半導體晶片與該半導體晶片放置區域;以及在該具有第一金屬之層以及該具有第二金屬之層之一者的表面上形成突起部。
- 一種半導體裝置,包括:支撐板;半導體晶片,係設置在該支撐板上;具有金屬且設於該支撐板與該半導體晶片之間的層,該金屬係接合於該支撐板與該半導體晶片之一者;以及具有合金且設於該支撐板與該半導體晶片之間的該層,該合金係藉由將該金屬進行合金化所獲得者,且該層用以接合該支撐板與該半導體晶片;其中,該具有該合金之層係設置在該支撐板之該半導體晶片放置區域之中央部分,該具有金屬之層係設置在該支撐板上之該半導體晶片放置區域之該中央部分之外側。
- 如申請專利範圍第11項所述之半導體裝置,其中,該具有該合金之層係設置在該支撐板之該半導體晶片放置區域之複數個部分,以及其中,該具有該金屬之層係設置在該具有該合金之層之周緣上,其中,該具有該合金之層係設置在該支撐板之該半導體晶片放置區域之該複數個部分。
- 如申請專利範圍第11項所述之半導體裝置,其中,該 具有該合金之層係設置在該支撐板之該半導體晶片放置區域之該周緣上;且其中,該具有該金屬之層係設置在該支撐板之該半導體晶片放置區域之該周緣之內側。
- 如申請專利範圍第11項所述之半導體裝置,其中,該半導體裝置包括有設置在該半導體晶片放置區域之該周緣上的該層,且該層係包括不與該具有該合金之層所包含之該金屬產生反應的另一金屬。
- 如申請專利範圍第11項所述之半導體裝置,其中,該具有該金屬之層及該具有該合金之層復包括有樹脂。
- 如申請專利範圍第11項所述之半導體裝置,其中,黏附層係設於該半導體晶片與該具有該合金之層之間。
- 一種半導體裝置,包括:支撐板;半導體晶片,係設置在該支撐板上;第一層,具有金屬且設於該支撐板與該半導體晶片之間;第二層,具有合金且設於該支撐板與該半導體晶片之間,該合金係藉由將該金屬進行合金化所獲得者,且用以接合該支撐板與該半導體晶片;以及第三層,設置在該第一層之周緣上,且該層係包括不與具有該合金之該第一層所包含之該金屬產生反應的另一金屬;其中,具有金屬之該層係包括在其表面上的突起部。
- 一種電源裝置,包括: 支撐板;半導體晶片,係設於該支撐板上;具有金屬且設置於該支撐板與該半導體晶片之間的層,該金屬係接合於該支撐板與該半導體晶片之其中一者;以及半導體裝置,包括有具有合金且設置於該支撐板與該半導體晶片之間的層,該合金係藉由將該金屬進行合金化所獲得者,且該層用以接合該支撐板與該半導體晶片;其中,該具有該合金之層係設置在該支撐板之該半導體晶片放置區域之中央部分,該具有金屬之層係設置在該支撐板上之該半導體晶片放置區域之該中央部分之外側。
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CN103916001A (zh) * | 2012-12-30 | 2014-07-09 | 比亚迪股份有限公司 | 一种自主功率因数校正装置 |
JP6613194B2 (ja) * | 2016-03-30 | 2019-11-27 | 東レエンジニアリング株式会社 | 半導体装置の製造方法及び製造装置 |
JP6682391B2 (ja) * | 2016-07-22 | 2020-04-15 | 株式会社東芝 | 半導体装置、電源回路、及び、コンピュータ |
US10741644B2 (en) * | 2016-11-22 | 2020-08-11 | Delta Electronics, Inc. | Semiconductor devices with via structure and package structures comprising the same |
US11107755B2 (en) * | 2019-05-12 | 2021-08-31 | Zhanming LI | Packaging for lateral high voltage GaN power devices |
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JPS58207645A (ja) | 1982-05-28 | 1983-12-03 | Fujitsu Ltd | 半導体装置 |
JPH06132442A (ja) | 1992-10-19 | 1994-05-13 | Hitachi Ltd | 半導体装置およびその製造方法 |
US5436503A (en) * | 1992-11-18 | 1995-07-25 | Matsushita Electronics Corporation | Semiconductor device and method of manufacturing the same |
KR0181615B1 (ko) * | 1995-01-30 | 1999-04-15 | 모리시다 요이치 | 반도체 장치의 실장체, 그 실장방법 및 실장용 밀봉재 |
JP3409957B2 (ja) * | 1996-03-06 | 2003-05-26 | 松下電器産業株式会社 | 半導体ユニット及びその形成方法 |
EP1041617A4 (en) * | 1998-01-20 | 2001-07-18 | Citizen Watch Co Ltd | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME, AND STRUCTURE AND METHOD FOR FIXING SEMICONDUCTOR |
JP4023159B2 (ja) * | 2001-07-31 | 2007-12-19 | ソニー株式会社 | 半導体装置の製造方法及び積層半導体装置の製造方法 |
JP3787295B2 (ja) * | 2001-10-23 | 2006-06-21 | ローム株式会社 | 半導体装置 |
US7193326B2 (en) * | 2003-06-23 | 2007-03-20 | Denso Corporation | Mold type semiconductor device |
JP4882229B2 (ja) * | 2004-09-08 | 2012-02-22 | 株式会社デンソー | 半導体装置およびその製造方法 |
JP2006156437A (ja) | 2004-11-25 | 2006-06-15 | Seiko Epson Corp | リードフレーム及び半導体装置 |
JP2006202938A (ja) * | 2005-01-20 | 2006-08-03 | Kojiro Kobayashi | 半導体装置及びその製造方法 |
JP4325571B2 (ja) | 2005-02-28 | 2009-09-02 | 株式会社日立製作所 | 電子装置の製造方法 |
JP2007150119A (ja) * | 2005-11-30 | 2007-06-14 | Nec Corp | 半導体パッケージ及びそれに用いるAuSn膜付け工法 |
JP2009158725A (ja) * | 2007-12-27 | 2009-07-16 | Panasonic Corp | 半導体装置およびダイボンド材 |
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US20140203444A1 (en) | 2014-07-24 |
US9082756B2 (en) | 2015-07-14 |
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CN102646609B (zh) | 2014-12-03 |
US20120211901A1 (en) | 2012-08-23 |
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TW201250877A (en) | 2012-12-16 |
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