TWI523123B - 具有封裝件堆疊之積體電路封裝系統及其製造方法 - Google Patents

具有封裝件堆疊之積體電路封裝系統及其製造方法 Download PDF

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Publication number
TWI523123B
TWI523123B TW099108848A TW99108848A TWI523123B TW I523123 B TWI523123 B TW I523123B TW 099108848 A TW099108848 A TW 099108848A TW 99108848 A TW99108848 A TW 99108848A TW I523123 B TWI523123 B TW I523123B
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Taiwan
Prior art keywords
integrated circuit
substrate
encapsulation
conductor
package
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TW099108848A
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English (en)
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TW201108334A (en
Inventor
瑞查 格瑞恩提 帕格拉
杜拜泰
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星科金朋有限公司
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Description

具有封裝件堆疊之積體電路封裝系統及其製造方法 [相關申請案之交互參考]
本申請案包含相關於共同審查中之美國專利申請案第12/133,177號之標的內容，該相關申請案係讓渡給史特斯晶片封裝公司。
本發明大體上係關於積體電路封裝系統，而尤係關於具有囊封(encapsulation)之積體電路封裝系統。
積體電路封裝件為用於高性能電子系統之建構的塊體，提供使用於譬如自動車輛、口袋型個人電腦、手機、智慧型可攜式軍用裝置、航空太空船所需裝備之產品，以及需要小型電子支援許多複雜的功能之廣大線之其他的相似產品之應用。
譬如手機之小的產品能夠包含許多的積體電路封裝件，各具有不同的尺寸和形狀。在該手機內之各積體電路封裝件能夠包含大量複雜的電路系統。在各積體電路封裝件內的電路系統工作並使用電性連接而與其他積體電路封裝件之其他電路系統通訊。
產品必須在世界市場上競爭，並為了成功而必須吸引許多的消費者或買主。對於產品繼續改進特徵、性能、和可靠度同時降低產品成本、產品尺寸、和對於消費者和買主能夠快速有效購得，那是非常重要的。
在產品內電路系統之數量和電性連接之數量為改進任何產品之特徵、性能、和可靠度之關鍵。再者，執行電路系統和電性連接之方式係關係於封裝尺寸、封裝方法、和個別的封裝設計。
由於設計的彈性、增加之功能性、槓桿作用性(leveragability)、和增加之IO連通性能力，嘗試提供追求簡化的製造處理、較小的尺寸、較低的成本之完全解決方案已經失敗。
鑑於一直增加之商業競爭壓力，伴隨著成長之消費者期盼和縮減之對於市場上有意義的產品差異之機會，對於發現這些問題的答案是關鍵的。
對於這些問題之解決方案已經搜尋良久，但是先前技術發展未教示或建議任何的解決方案，且因此對於這些問題之解決方案已經長期困擾著熟悉此項技術者。
本發明提供一種製造積體電路封裝系統之方法，包含：形成囊封環繞具有非主動側和暴露之主動側之積體電路；以孔未暴露該積體電路形成穿過該囊封之該孔；形成貫穿導體於該孔中；以及以該主動側面對基板安裝具有由該囊封所環繞之積體電路之該基板。
本發明提供一種積體電路封裝系統，包含：積體電路，具有非主動側和主動側；囊封，環繞具有該非主動側和暴露之該主動側之該積體電路，而該囊封具有未暴露該積體電路之孔；貫穿導體，係於該孔中；以及基板，以該主動側面對該基板安裝有積體電路，該積體電路由囊封所環繞。
本發明之某些實施例具有其他的步驟或元件附加於或取代上述步驟或元件。對於熟悉此項技術者當參照所附圖式而閾讀下列之詳細說明，這些步驟或元件將會變得很清楚。
充分詳細的說明下列之實施例使得熟悉此項技術者能夠製造和使用本發明。應該了解到，根據本揭示內容，其他的實施例將為明顯的，而可以從事系統、製程、或機械改變而不會偏離本發明之範圍。
於下列說明中，提出了許多特定的詳細說明以提供對本發明之完全了解。然而，很顯然的，對於熟悉此項技術者而言，可不必作如此詳細說明即能實施本發明。為了避免模糊本發明，一些已熟知的電路、系統配置、和製程步驟將不作詳細揭示說明。
顯示該系統實施例之圖式為半圖形的，且並未按比例繪製，而尤其是一些尺寸是為了清楚表示而於圖式中予以非常誇大地顯示。相似情況，雖然於所示圖式中所看到的係為了容易說明而一般顯示相似的方向，但是於圖式中之此描繪大多為任意的。一般而言，本發明能夠操作於任何方向。
所揭示和說明之多個實施例具有一些共同的特徵，為了清楚和容易例示、說明、和對其了解，彼此相似和相同的特徵將大致以相似的參考號碼說明。為了方便說明之目的，該等實施例已經編號為第一實施例、第二實施例等，且並不欲有任何其他的意義，或對本發明提出限制。
為了說明之目的，此處所用之“水平(horizontal)”一詞定義為平行於本發明之平面或表面，而無關於其方向。“垂直(vertical)”一詞參考為垂直於剛才所定義之水平之方向。相關於該水平面而定義譬如“在上方(above)”、“在下方(below)”、“底部(bottom)”、“頂部(top)”、“側(side)”(如於“側壁(sidewall)”)、“較高(higher)”、“較低(lower)”、“上部(upper)”、“在‧‧‧之上(over)”、和“在‧‧‧下面(under)”等詞彙。詞彙“在上面(on)”意指元件之間有直接接觸。
本文中所用之詞彙“處理(processing)”包含當需要形成所述之結構時沉積材料或光阻、圖案化(patterning)、曝光、顯影(development)、蝕刻、清洗、和/或去除材料或光阻。
現在參照第1圖，圖中顯示本發明之第一實施例中積體電路封裝系統100之上視圖。積體電路封裝系統100能夠包含在基板104(譬如封裝件基板、電路板、或插入件(interposer))之上之譬如積體電路封裝件、被動組件、積體電路晶粒、散熱器、或者他們的任何組合之堆疊封裝件102。能看到譬如基於環氧樹脂化合物之底部填充膠(underfill)106低於堆疊封裝件102。底部填充膠106係可選擇使用的(optional)。
雖然了解到積體電路封裝系統100能夠具有不同的組構，但為了例示之目的，積體電路封裝系統100顯示帶有堆疊封裝件102，該堆疊封裝件102具有表面積(footprint)的面積要小於基板104之表面積的面積。舉例而言，堆疊封裝件102之相關表面積能夠是相同尺寸或大於基板104之表面積。
現在參照第2圖，圖中顯示沿著第1圖之線2－2之本發明之積體電路封裝系統100之剖面圖。積體電路封裝系統100能夠包含基底封裝件202，使用互連接204(譬如焊料、焊球、焊點、焊塊、或其他的導體結構)連接至堆疊封裝件102。
基底封裝件202較佳能夠包含電路組件206。電路組件206能夠包含積體電路208(譬如積體電路晶粒或積體電路裝置)、囊封210、和具有封裝件連接器212之基板104，該封裝件連接器212為譬如焊球、焊塊、金屬或金屬合金結構、或其他的導電結構。囊封210，例如，能夠包含有機模製化合物、環氧樹脂模製化合物(epoxy molding compound，EMC)、聚醯胺化合物、或者膜中導線(wire-in-film，WIF)。
積體電路208之側(side)214較佳能夠由囊封210所環繞。積體電路208之非主動側216和具有主動電路系統製造於其上之主動側218能夠從囊封210暴露。例如，囊封210之第一側220能夠與主動側218共平面。囊封210之第二側222能夠與非主動側216共平面。第一側220和第二側222能夠彼此平行。
能夠形成孔(hole)224穿過囊封210於第一側220與第二側222之間。孔224不暴露積體電路208之側214。
譬如包含焊料、鋁、銅、銀、金、或其他導電材料之導體之貫穿導體(through conductor)226能夠形成於各孔224之內。貫穿導體226能夠橫越各孔224之二端。貫穿導體226能夠用非直接連接至積體電路208之晶片墊228而被隔離，形成假貫穿有機通孔(through organic via，TOV)。
電路組件206能夠使用電性連接器232而安裝在基板104之上，以連接基板104與主動側218或者與貫穿導體226。封裝件連接器212能夠附接至相對置於面對電路組件206之基板104側之側。
譬如導電線路(trace)之導電層230能夠位於基板104之內或基板104上。導電層230能夠提供封裝件連接器212、電性連接器232、或封裝件連接器212與電性連接器232之間之連通性。底部填充膠106能夠施用於電路組件206與基板104之間。
堆疊封裝件102能夠使用互連接204而安裝在基底封裝件202之電路組件206之非主動側216之上。互連接204能夠位於貫穿導體226之上或者分佈於非主動側216之上。非主動側216能夠可選擇使用地包含在其上之可安裝之接點(contact)234，譬如重新分佈層(re-distribution layer，RDL)。沿著第二側222暴露之貫穿導體226亦能可選擇使用地包含有在其上之可安裝之接點234。
可安裝之接點234能夠是在貫穿導體226之上或者在非主動側216之面積之上。可安裝之接點234能夠位於互連接204與貫穿導體226或非主動側216之間。
為了例示之目的，積體電路封裝系統100顯示具有孔224，該等孔224具有垂直於第一側220之方向。應該了解到，積體電路封裝系統100能夠具有孔224之不同的組構。舉例而言，孔224能夠是歪斜的或鈍的至第一側220。
亦為了例示之目的，積體電路封裝系統100顯示具有孔224，該等孔224具有彼此間隔(separation)相等於其中一個孔224之剖面寬度距離。應該了解到，積體電路封裝系統100能夠具有孔224之不同的組構。舉例而言，孔224之間之間隔能夠多於或少於孔224之剖面寬度。
再者，為了例示之目的，積體電路封裝系統100顯示具有孔224，該等孔224具有均勻的剖面寬度橫越各孔224之長度。應該了解到，積體電路封裝系統100能夠具有孔224之不同的組構。舉例而言，孔224之剖面之剖面寬度能夠具有孔224之另一個剖面之不同的剖面寬度。
已發現到本發明提供具有改進密度連通性和成本效益之積體電路封裝系統100。減少各孔224之間之間隔距離將增加堆疊封裝件102與基底封裝件202之間連接之數目。減少各孔224之寬度將使得互連接204或電性連接器232減少尺寸導致在堆疊封裝件102與基底封裝件202之間增加之IO密度並且減少焊球崩陷(collapse)。
現在參照第3圖，圖中顯示於本發明之第二實施例中藉由第1圖之上視圖沿著線2--2所例示之積體電路封裝系統300之剖面圖。除了積體電路封裝系統300包含電路組件302和堆疊封裝件304(譬如積體電路封裝件、被動組件、積體電路晶粒、散熱器、或者他們的任何組合)之外，積體電路封裝系統300能夠相似於第2圖之積體電路封裝系統100。
電路組件302較佳能夠免除使用任何的重新分佈層，並且包含積體電路208、含有有機材料之囊封306、和具有封裝件連接器212之基板104。積體電路208能夠由囊封306所環繞，該囊封306具有包含主動側218之平面內之第一側308，和第二側310共平面並且在主動側218和非主動側216之間。
具有末端由開放通道(open passage)連接之孔312能夠形成鄰接積體電路208。各孔312能夠具有暴露鄰接該第一側308之末端，和暴露鄰接該第二側310之相對末端。
包含導電材料(譬如焊錫或具有導電和連通性質之其他的材料)之貫穿導體314能夠形成在各孔312內，用各孔312之相對端連接各孔312之末端。孔312或在各孔312內之貫穿導體314沒有直接連接於積體電路208之任何的晶片墊228。
堆疊封裝件304能夠安裝於電路組件302之上，緊鄰於非主動側216，使用互連接204至貫穿導體314，導致堆疊封裝件304、基板104、或系統整合之次一層級(level)(譬如印刷電路板或與封裝件連接器212連接之另一個封裝件)之間之連通性。堆疊封裝件304能夠與非主動側216隔離而不具有至非主動側216的連通性。
積體電路封裝系統300以總高度低於積體電路封裝系統100之總高度提供具有相等於積體電路封裝系統100之電性連通性之封裝的解決方案。
已發現到，本發明提供具有較積體電路封裝系統100節省成本和減少製造製程之積體電路封裝系統300。省略任何重新分佈層得到產生積體電路封裝系統300，導致了節省成本，係歸因於免除了使用重新分佈層材料和減少製造時間如消除重新分佈應用步驟之結果。
亦已發現到，本發明提供具有較積體電路封裝系統100減少之輪廓(profile)之解決方案以及進一步節省成本之積體電路封裝系統300。於非主動側216下方之第二側310，消除堆疊封裝件304和非主動側216之間之連通性，以及減少必須用於積體電路封裝系統300之囊封306之數量，導致減少輪廓和進一步之成本節省。
現在參照第4圖，圖中顯示本發明之第三實施例中藉由第1圖之上視圖沿著線2--2所例示之積體電路封裝系統400之剖面圖。除了積體電路封裝系統400包含基板402(譬如封裝件基板、電路板、或插入件)、基底開口(opening)404、和基底裝置406之外，積體電路封裝系統400能夠相似於積體電路封裝系統100。譬如中空的開口或中空的空間之基底開口404形成在基板402和封裝件連接器408之周邊內。
基底開口404較佳能夠具有內部的物理尺寸大於基底裝置406(譬如積體電路晶粒、被動組件、積體電路裝置、或他們的組合)之總外部物理尺寸。基底開口404能夠從基板402之一側，穿過基板402，至基板402之相對側而形成。
基底開口404較佳能夠位於電路組件206之積體電路208之主動側218之下方，暴露附接於積體電路208之電性連接器232。基底裝置406能夠插入於基底開口404，以及基底裝置406之電路系統能夠使用電性連接器232而與積體電路208之電路系統連接。
位於基板402之側內或側上之電性導電材料能夠提供與具有基板402之相對側之電性導電材料的連通性。於相對於面對該電路組件206之基板402之側的側上，封裝件連接器408(譬如焊球、焊塊、或導電柱)能夠提供堆疊封裝件102、積體電路208、基底裝置406、或基板402與次一層級之整合(integration)之間之連通性。
現在參照第5圖，顯示於本發明之第四實施例中藉由第1圖之上視圖沿著線2--2所例示之積體電路封裝系統500之剖面圖。除了積體電路封裝系統500包含堆疊封裝件502和電路組件504之外，積體電路封裝系統500能夠相似於積體電路封裝系統100。
電路組件504包含有積體電路208和囊封506，該囊封506包含有機材料。積體電路208之側214較佳能夠由包含有機材料之囊封506所環繞。積體電路208之非主動側216和主動側218能夠被暴露鄰接該囊封506。舉例而言，非主動側216和主動側218能夠是共平面於該囊封506。鄰接於該主動側218之囊封506之第一側508能夠與鄰接非主動側216之囊封506之第二側510共平面。
具有由開放通道連接之末端之孔512能夠形成鄰接該積體電路208。各孔512能夠具有末端暴露鄰接該第一側508，和相對的末端暴露鄰接該第二側510。電路組件504較佳能夠使用電性連接器232安裝於基板104之上，以用主動側218連接該基板104。
堆疊封裝件502(譬如積體電路封裝件、被動組件、積體電路晶粒、散熱器、或者他們的任何組合)較佳能夠使用互連接204或貫穿導體514而連接於電路組件504之上。
互連接204和貫穿導體514能夠由相同的材料製成，譬如包含焊錫、鋁、銅、銀、金、或其他導電材料之導體。貫穿導體514能夠於各端形成突出部(protrusion)516。突出部516能夠延伸超出該囊封506。互連接204提供堆疊封裝件502與非主動側216之間之連通性。
貫穿導體514能夠位於其中一個孔512之上，該孔512具有末端連接至該堆疊封裝件502，和相對端直接連接至該基板104，以提供穿過孔512和該堆疊封裝件502與基板104之間之連通性。
貫穿導體514能夠，例如，使用回流製程(reflow process)(譬如藉由紅外線裝置加熱、烤爐圍封、直接熱空氣之來源、或熱輻射裝置)附接至堆疊封裝件502，然後附接至基板104。此回流製程能夠附接互連接204至電路組件504。
回流製程能夠從譬如導電球、導電柱、或焊球之附接至堆疊封裝件502的導電結構(未顯示)形成貫穿導體514於孔512中。回流製程能夠形成貫穿導體514之突出部516。
當相較於積體電路封裝系統100之製造成本和製程時間，積體電路封裝系統500能夠提供於製造成本和製程時間之明顯的改進。相較於使用第2圖之貫穿導體226、互連接204、和用來連接第2圖之堆疊封裝件102之電性連接器232與基板104，該明顯的改進能夠歸因於使用貫穿導體514連接堆疊封裝件502與基板104。
現在參照第6圖，圖中顯示第2圖之積體電路封裝系統100於附接積體電路208至晶圓載體606之階段之剖面圖。積體電路208之主動側218能夠附接於晶圓載體606之上側604。
舉例而言，能夠使用接合劑(譬如蠟、可溶膠、熱可鬆卸黏著帶、靜電、或其他適當的附接材料)，用來附接積體電路208和晶圓載體606。在各積體電路208內之電路系統可以彼此相同或不同。
現在參照第7圖，圖中顯示第6圖於形成封蓋(cover)702之階段之結構。封蓋702能夠包含有機模製化合物在晶圓載體606之上側604之上，環繞積體電路208之側704。封蓋702能夠包含第一側220沿著主動側218和相對於該第一側220之第二側222。
能夠用許多種製程形成第二側222。舉例而言，能夠用模鑄、鋸切、研磨、或相似的控制表面處理方法形成第二側222。第二側222能夠與積體電路208之非主動側216共平面、在非主動側216之上、或在非主動側216之下。非主動側216能夠可選擇使用地暴露或未暴露於額外的保護。
現在參照第8圖，圖中顯示第7圖於形成孔224之階段之結構。能夠用許多種製程形成各孔224。舉例而言，能夠藉由鑽孔或蝕刻穿透封蓋702於該封蓋702之第二側222和第一側220之間形成孔224。孔224能夠形成鄰接至少其中之一側704。
現在參照第9圖，圖中顯示第8圖於填滿貫穿導體226之階段之結構。此填滿階段係可選擇使用的。貫穿導體226能夠使用許多不同的製程而形成於孔224中。舉例而言，貫穿導體226能夠用填滿製程、注入製程、或分配製程形成。貫穿導體226能夠從第一側220和第二側222暴露。
現在參照第10圖，圖中顯示第9圖於形成可安裝之接點234之階段之結構。該可安裝之接點234可選擇使用地施加於貫穿導體226之上或分佈於非主動側216之上。該可安裝之接點234能夠用許多種製程而形成。舉例而言，該可安裝之接點234能夠由電鍍、層疊、或氣相沉積而形成。
現在參照第11圖，圖中顯示第10圖於附接電性連接器232之階段之結構。第11圖之結構顯示定向於第一側220與主動側218面朝上之方向。第10圖之晶圓載體606 使用分離製程(譬如熱製程、紫外線製程、或者化學製程)而從第一側220和主動側218去除。
能夠使用附接製程而將電性連接器232附接於貫穿導體226或主動側218之上。舉例而言，附接製程能夠包含直接之對流熱或雷射。
現在參照第12圖，圖中顯示第11圖於單一化電路組件206之階段之結構。能夠用許多種製程單一化第7圖之封蓋702，譬如鋸切或雷射劃線器，形成囊封210。由於形成了電路組件206，積體電路208顯示與其他例子之積體電路208分離和隔離。
現在參照第13圖，圖中顯示本發明之進一步實施例中積體電路封裝系統100之製造方法1300之流程圖。方法1300包含於方塊步驟1302中形成囊封環繞具有非主動側和暴露之主動側之積體電路；於方塊步驟1304中以孔未暴露該積體電路形成穿過該囊封之該孔；於方塊步驟1306中形成貫穿導體於該孔中；以及於方塊步驟1308中以該主動側面對基板安裝具有由該囊封所環繞之積體電路之該基板。
所得到的方法、製程、裝備、裝置、產品、和/或系統係直接的、具成本效益的、不複雜、高度多樣性、和有效的，能夠藉由調適已知的技術而驚人地和不顯然地執行，並且因此容易適合有效地和經濟地於封裝件系統製造封裝件/與習知的製造方法或製程和技術完全相容。
本發明之另一個重要的態樣為有益地支援和服務減少成本、簡化系統、和增加效能之歷史的傾向。
本發明之這些和其他有價值之態樣因此促進技術之狀態至少至次一層級。
雖然本發明已結合特定之最佳實施模式而說明，但應了解到，對於熟習此技藝者而言，在鑑於上述之說明後，許多替換、修飾和改變將是明顯的。因此，本發明意欲包含所有落於所包含之申請專利範圍之範圍內之此等替換、修飾和改變。此說明書中所提出和所附圖式中所顯示之所有內容係將作例示說明用而並非欲用來限制本發明。
100、300、400、500．．．積體電路封裝系統
102、304、502．．．堆疊封裝件
104、402．．．基板
106．．．底部填充膠
202．．．基底封裝件
204．．．互連接
206、302、504．．．電路組件
208．．．積體電路
210、306、506．．．囊封
212、408．．．封裝件連接器
214、704．．．側
216．．．非主動側
218．．．主動側
220、308、508．．．第一側
222、310、510．．．第二側
224、312、512．．．孔
226、314、514．．．貫穿導體
228．．．晶片墊
230．．．導電層
232．．．電性連接器
234．．．可安裝之接點
404．．．基底開口
406．．．基底裝置
516．．．突出部
604．．．上側
606．．．晶圓載體
702．．．封蓋
1300．．．方法
1302、1304、1306、1308．．．方塊步驟
第1圖為於本發明之第一實施例中積體電路封裝系統之上視圖；
第2圖為沿著第1圖之線2－2之本發明之積體電路封裝系統之剖面圖；
第3圖為於本發明之第二實施例中藉由第1圖之上視圖沿著線2--2所例示之積體電路封裝系統之剖面圖；
第4圖為於本發明之第三實施例中藉由第1圖之上視圖沿著線2--2所例示之積體電路封裝系統之剖面圖；
第5圖為於本發明之第四實施例中藉由第1圖之上視圖沿著線2--2所例示之積體電路封裝系統之剖面圖；
第6圖為第2圖之積體電路封裝系統於附接積體電路至晶圓載體之階段之剖面圖；
第7圖為第6圖於形成封蓋之階段之結構；
第8圖為第7圖於形成孔之階段之結構；
第9圖為第8圖於填滿貫穿導體之階段之結構；
第10圖為第9圖於形成可安裝之接點之階段之結構；
第11圖為第10圖於附接電性連接器之階段之結構；
第12圖為第11圖於單一化電路組件之階段之結構；以及
第13圖為於本發明之進一步實施例中積體電路封裝系統之製造方法之流程圖。
100．．．積體電路封裝系統
102．．．堆疊封裝件
104．．．基板
106．．．底部填充膠
202．．．基底封裝件
204．．．互連接
206．．．電路組件
208．．．積體電路
210．．．囊封
212．．．封裝件連接器
214．．．側
216．．．非主動側
218．．．主動側
220．．．第一側
222．．．第二側
224．．．孔
226．．．貫穿導體
228．．．晶片墊
230．．．導電層
232．．．電性連接器
234．．．可安裝之接點

Claims (10)

  1. 一種製造積體電路封裝系統之方法，包括下列步驟：形成囊封環繞具有非主動側和主動側從該囊封暴露之積體電路，該主動側與該囊封之第一側共平面；以孔未暴露該積體電路形成穿過該囊封之該孔；形成貫穿導體於該孔中；以及以該主動側面對基板安裝具有由該囊封所環繞之積體電路之該基板。
  2. 如申請專利範圍第1項所述之方法，其中，形成該囊封環繞具有該非主動側和該主動側從該囊封暴露之該積體電路包含形成該囊封低於該非主動側。
  3. 如申請專利範圍第1項所述之方法，復包括：設置該基板具有基底開口；以及以該主動側面對基底裝置連接在該基底開口內側之該基底裝置。
  4. 如申請專利範圍第1項所述之方法，復包括：在該貫穿導體之上或該非主動側之上形成可安裝之接點；以及在該非主動側之上和該貫穿導體之上連接堆疊封裝件。
  5. 如申請專利範圍第1項所述之方法，其中，形成該貫穿導體包含以突出部延伸超過該囊封形成具有該突出部之該貫穿導體；以及復包括： 連接堆疊封裝件在該非主動側之上和該貫穿導體之上包含連接該突出部至該堆疊封裝件和該基板。
  6. 一種積體電路封裝系統，包括：積體電路，具有非主動側和主動側；囊封，環繞具有該非主動側和該主動側從該囊封暴露之該積體電路，該主動側與該囊封之第一側共平面，而該囊封具有未暴露該積體電路之孔；貫穿導體，係於該孔中；以及基板，以該主動側面對該基板安裝有積體電路，該積體電路由該囊封所環繞。
  7. 如申請專利範圍第6項所述之系統，其中，該囊封低於該非主動側。
  8. 如申請專利範圍第6項所述之系統，其中：該基板包含具有基底開口之該基板；以及復包括：基底裝置，以該主動側面對該基底裝置在該基底開口之內側。
  9. 如申請專利範圍第6項所述之系統，復包括：可安裝之接點，在該貫穿導體之上或該非主動側之上；以及堆疊封裝件，連接在該可安裝之接點之上。
  10. 如申請專利範圍第6項所述之系統，其中：該貫穿導體包含以突出部延伸超過該囊封之該突出部；以及 復包括：堆疊封裝件，連接在該非主動側之上和該貫穿導體之上，包含該突出部連接至該堆疊封裝件和該基板。
TW099108848A 2009-03-26 2010-03-25 具有封裝件堆疊之積體電路封裝系統及其製造方法 TWI523123B (zh)

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