TWI514409B - 記憶體裝置電力管理器及其方法 - Google Patents

記憶體裝置電力管理器及其方法 Download PDF

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Publication number
TWI514409B
TWI514409B TW099101838A TW99101838A TWI514409B TW I514409 B TWI514409 B TW I514409B TW 099101838 A TW099101838 A TW 099101838A TW 99101838 A TW99101838 A TW 99101838A TW I514409 B TWI514409 B TW I514409B
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TW
Taiwan
Prior art keywords
memory
die
memory device
power state
logic
Prior art date
Application number
TW099101838A
Other languages
English (en)
Chinese (zh)
Other versions
TW201108241A (en
Inventor
Joe M Jeddeloh
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of TW201108241A publication Critical patent/TW201108241A/zh
Application granted granted Critical
Publication of TWI514409B publication Critical patent/TWI514409B/zh

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3275Power saving in memory, e.g. RAM, cache
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • G06F1/3225Monitoring of peripheral devices of memory devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/148Details of power up or power down circuits, standby circuits or recovery circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G11C7/1012Data reordering during input/output, e.g. crossbars, layers of multiplexers, shifting or rotating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Power Sources (AREA)
  • Semiconductor Memories (AREA)
TW099101838A 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法 TWI514409B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/359,039 US9105323B2 (en) 2009-01-23 2009-01-23 Memory device power managers and methods

Publications (2)

Publication Number Publication Date
TW201108241A TW201108241A (en) 2011-03-01
TWI514409B true TWI514409B (zh) 2015-12-21

Family

ID=42355131

Family Applications (3)

Application Number Title Priority Date Filing Date
TW099101838A TWI514409B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法
TW104136077A TWI590255B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法
TW106114950A TWI628665B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法

Family Applications After (2)

Application Number Title Priority Date Filing Date
TW104136077A TWI590255B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法
TW106114950A TWI628665B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法

Country Status (7)

Country Link
US (2) US9105323B2 (enExample)
EP (2) EP3223281B1 (enExample)
JP (2) JP5762312B2 (enExample)
KR (1) KR101609311B1 (enExample)
CN (2) CN104699226B (enExample)
TW (3) TWI514409B (enExample)
WO (1) WO2010085657A2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105229560A (zh) * 2013-06-14 2016-01-06 英特尔公司 用于向设备提供电力的方法和装置

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7978721B2 (en) * 2008-07-02 2011-07-12 Micron Technology Inc. Multi-serial interface stacked-die memory architecture
US7929368B2 (en) * 2008-12-30 2011-04-19 Micron Technology, Inc. Variable memory refresh devices and methods
US8127185B2 (en) 2009-01-23 2012-02-28 Micron Technology, Inc. Memory devices and methods for managing error regions
US9105323B2 (en) 2009-01-23 2015-08-11 Micron Technology, Inc. Memory device power managers and methods
US8018752B2 (en) * 2009-03-23 2011-09-13 Micron Technology, Inc. Configurable bandwidth memory devices and methods
US8612809B2 (en) 2009-12-31 2013-12-17 Intel Corporation Systems, methods, and apparatuses for stacked memory
US9123552B2 (en) 2010-03-30 2015-09-01 Micron Technology, Inc. Apparatuses enabling concurrent communication between an interface die and a plurality of dice stacks, interleaved conductive paths in stacked devices, and methods for forming and operating the same
US8547769B2 (en) 2011-03-31 2013-10-01 Intel Corporation Energy efficient power distribution for 3D integrated circuit stack
US9256279B2 (en) 2011-06-29 2016-02-09 Rambus Inc. Multi-element memory device with power control for individual elements
KR101915073B1 (ko) 2011-12-20 2018-11-06 인텔 코포레이션 2-레벨 메모리 계층구조에서 메모리측 캐쉬의 동적인 부분적 전원 차단
CN104011620B (zh) 2011-12-21 2017-07-07 英特尔公司 分立存储器部分中的电源管理
KR101678751B1 (ko) * 2011-12-23 2016-11-23 인텔 코포레이션 스택 메모리 아키텍처의 별개의 마이크로채널 전압 도메인들
US9026808B2 (en) * 2012-04-26 2015-05-05 Freescale Semiconductor, Inc. Memory with word level power gating
US9317087B2 (en) 2012-04-26 2016-04-19 Ravindraraj Ramaraju Memory column drowsy control
US20140082385A1 (en) * 2012-09-14 2014-03-20 Curtis G. Reule On demand power management for solid-state memory
US10042750B2 (en) 2013-03-15 2018-08-07 Micron Technology, Inc. Apparatuses and methods for adaptive control of memory using an adaptive memory controller with a memory management hypervisor
US9147438B2 (en) * 2013-10-23 2015-09-29 Qualcomm Incorporated Monolithic three dimensional (3D) integrated circuits (ICs) (3DICs) with vertical memory components, related systems and methods
US9959936B1 (en) * 2014-03-12 2018-05-01 Marvell International Ltd. Temperature-based memory access
US10289604B2 (en) * 2014-08-07 2019-05-14 Wisconsin Alumni Research Foundation Memory processing core architecture
US10303235B2 (en) 2015-03-04 2019-05-28 Qualcomm Incorporated Systems and methods for implementing power collapse in a memory
US10117196B2 (en) * 2015-08-26 2018-10-30 Qualcomm Incorporated Dynamically configurable apparatus for operating within the current capabilities of the power source
US11487445B2 (en) * 2016-11-22 2022-11-01 Intel Corporation Programmable integrated circuit with stacked memory die for storing configuration data
US10353455B2 (en) 2017-07-27 2019-07-16 International Business Machines Corporation Power management in multi-channel 3D stacked DRAM
EP3580691B1 (en) * 2017-08-31 2020-07-01 FotoNation Limited A peripheral processing device
TWI659308B (zh) * 2017-12-08 2019-05-11 旺宏電子股份有限公司 記憶體裝置及其操作方法
US12118056B2 (en) 2019-05-03 2024-10-15 Micron Technology, Inc. Methods and apparatus for performing matrix transformations within a memory array
US11853385B2 (en) 2019-12-05 2023-12-26 Micron Technology, Inc. Methods and apparatus for performing diversity matrix operations within a memory array
KR20220030348A (ko) 2020-08-27 2022-03-11 삼성전자주식회사 메모리 장치
WO2022060559A1 (en) * 2020-09-18 2022-03-24 Rambus Inc. Methods and circuits for aggregating processing units and dynamically allocating memory
US11334260B2 (en) * 2020-10-14 2022-05-17 Micron Technology, Inc. Adaptive memory system
US11741043B2 (en) * 2021-01-29 2023-08-29 The Trustees Of Dartmouth College Multi-core processing and memory arrangement
US20230214270A1 (en) * 2021-12-31 2023-07-06 Western Digital Technologies, Inc. Readiness states for partitioned internal resources of a memory controller
KR20250143551A (ko) 2024-03-25 2025-10-02 권재현 골프 스윙 연습장치

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6079024A (en) * 1997-10-20 2000-06-20 Sun Microsystems, Inc. Bus interface unit having selectively enabled buffers
US20030229821A1 (en) * 2002-05-15 2003-12-11 Kenneth Ma Method and apparatus for adaptive power management of memory
US7307338B1 (en) * 2004-07-26 2007-12-11 Spansion Llc Three dimensional polymer memory cell systems

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5197140A (en) * 1989-11-17 1993-03-23 Texas Instruments Incorporated Sliced addressing multi-processor and method of operation
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US5396635A (en) * 1990-06-01 1995-03-07 Vadem Corporation Power conservation apparatus having multiple power reduction levels dependent upon the activity of the computer system
US5524248A (en) * 1993-07-06 1996-06-04 Dell Usa, L.P. Random access memory power management system
JPH11161778A (ja) * 1997-11-26 1999-06-18 Ricoh Co Ltd デジタル画像処理システム
DE69827589T2 (de) * 1997-12-17 2005-11-03 Elixent Ltd. Konfigurierbare Verarbeitungsanordnung und Verfahren zur Benutzung dieser Anordnung, um eine Zentraleinheit aufzubauen
US6125429A (en) * 1998-03-12 2000-09-26 Compaq Computer Corporation Cache memory exchange optimized memory organization for a computer system
US20020124195A1 (en) * 1998-11-04 2002-09-05 Puthiya K. Nizar Method and apparatus for power management in a memory subsystem
JP2000222285A (ja) 1999-01-29 2000-08-11 Matsushita Electric Ind Co Ltd メモリー電力管理装置
US6141283A (en) * 1999-04-01 2000-10-31 Intel Corporation Method and apparatus for dynamically placing portions of a memory in a reduced power consumption state
JP2001035146A (ja) 1999-07-22 2001-02-09 Hitachi Ltd 半導体記憶装置
KR100603926B1 (ko) * 1999-10-25 2006-07-24 삼성전자주식회사 여러 전원 관리 상태를 갖는 컴퓨터 시스템을 위한 전원 공급 제어 회로 및 그의 제어 방법
US6691237B1 (en) * 2000-08-08 2004-02-10 Dell Products, L.P. Active memory pool management policies
US6618791B1 (en) * 2000-09-29 2003-09-09 Intel Corporation System and method for controlling power states of a memory device via detection of a chip select signal
US7089436B2 (en) * 2001-02-05 2006-08-08 Morpho Technologies Power saving method and arrangement for a configurable processor array
JP3962924B2 (ja) * 2003-03-20 2007-08-22 セイコーエプソン株式会社 半導体装置、半導体回路、電子機器及びクロック供給制御方法
US7428644B2 (en) * 2003-06-20 2008-09-23 Micron Technology, Inc. System and method for selective memory module power management
JP2005018740A (ja) * 2003-06-23 2005-01-20 Samsung Electronics Co Ltd 電子装置
US20050125701A1 (en) * 2003-12-03 2005-06-09 International Business Machines Corporation Method and system for energy management via energy-aware process scheduling
US7085152B2 (en) * 2003-12-29 2006-08-01 Intel Corporation Memory system segmented power supply and control
US7064994B1 (en) * 2004-01-30 2006-06-20 Sun Microsystems, Inc. Dynamic memory throttling for power and thermal limitations
JP4205613B2 (ja) * 2004-03-01 2009-01-07 エルピーダメモリ株式会社 半導体装置
DE102004047752B3 (de) 2004-09-30 2006-01-26 Infineon Technologies Ag Halbleiterbauteil mit Temperatursensor
US9384818B2 (en) * 2005-04-21 2016-07-05 Violin Memory Memory power management
US20060258354A1 (en) * 2005-05-13 2006-11-16 Ul Haq Tanveer Method for restricting mobility in wireless mobile systems
US7444526B2 (en) * 2005-06-16 2008-10-28 International Business Machines Corporation Performance conserving method for reducing power consumption in a server system
JP2008544437A (ja) 2005-06-24 2008-12-04 メタラム インコーポレイテッド 一体化されたメモリコア及びメモリインターフェース回路
US8010764B2 (en) * 2005-07-07 2011-08-30 International Business Machines Corporation Method and system for decreasing power consumption in memory arrays having usage-driven power management
US7464225B2 (en) * 2005-09-26 2008-12-09 Rambus Inc. Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology
EP3364298B1 (en) 2006-07-31 2019-12-11 Google LLC Memory circuit system and method
US8051022B2 (en) * 2006-12-08 2011-11-01 Pandya Ashish A Embedded programmable intelligent search memory (PRISM) that simultaneously performs regular expression based search and signature pattern based search
WO2008076790A2 (en) * 2006-12-14 2008-06-26 Rambus Inc. Multi-die memory device
US7930576B2 (en) * 2007-04-10 2011-04-19 Standard Microsystems Corporation Sharing non-sharable devices between an embedded controller and a processor in a computer system
US20080270811A1 (en) * 2007-04-26 2008-10-30 Super Talent Electronics Inc. Fast Suspend-Resume of Computer Motherboard Using Phase-Change Memory
US8645740B2 (en) * 2007-06-08 2014-02-04 Apple Inc. Methods and systems to dynamically manage performance states in a data processing system
US9105323B2 (en) 2009-01-23 2015-08-11 Micron Technology, Inc. Memory device power managers and methods

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6079024A (en) * 1997-10-20 2000-06-20 Sun Microsystems, Inc. Bus interface unit having selectively enabled buffers
US20030229821A1 (en) * 2002-05-15 2003-12-11 Kenneth Ma Method and apparatus for adaptive power management of memory
US7307338B1 (en) * 2004-07-26 2007-12-11 Spansion Llc Three dimensional polymer memory cell systems

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105229560A (zh) * 2013-06-14 2016-01-06 英特尔公司 用于向设备提供电力的方法和装置
CN105229560B (zh) * 2013-06-14 2018-02-09 英特尔公司 用于向设备提供电力的方法和装置

Also Published As

Publication number Publication date
EP3223281A2 (en) 2017-09-27
JP5762312B2 (ja) 2015-08-12
EP3223281B1 (en) 2019-07-31
TW201729185A (zh) 2017-08-16
KR20110115587A (ko) 2011-10-21
CN104699226A (zh) 2015-06-10
EP2389633A2 (en) 2011-11-30
TW201108241A (en) 2011-03-01
JP2012515989A (ja) 2012-07-12
EP3223281A3 (en) 2017-12-13
TW201604887A (zh) 2016-02-01
CN104699226B (zh) 2017-11-14
EP2389633B1 (en) 2017-04-05
US20150357010A1 (en) 2015-12-10
TWI590255B (zh) 2017-07-01
KR101609311B1 (ko) 2016-04-05
JP6041928B2 (ja) 2016-12-14
CN102292715B (zh) 2015-04-22
US9583157B2 (en) 2017-02-28
TWI628665B (zh) 2018-07-01
EP2389633A4 (en) 2012-10-31
US20100191999A1 (en) 2010-07-29
US9105323B2 (en) 2015-08-11
WO2010085657A3 (en) 2010-10-21
CN102292715A (zh) 2011-12-21
JP2015158948A (ja) 2015-09-03
WO2010085657A2 (en) 2010-07-29

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