TWI476877B - 氣腔式封裝結構及方法 - Google Patents
氣腔式封裝結構及方法 Download PDFInfo
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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Description
本發明係有關一種半導體晶片封裝結構及方法,尤指一種適用於高頻或高功率半導體元件之氣腔式封裝結構及方法。
半導體晶片製作完成後,須經過封裝程序的處理,以提供晶片支撐,並保護晶片不受溼氣腐蝕及其他損壞。傳統半導體晶片之封裝,係先將晶片及銲線接合於一承載體之上,再以如聚合物等膠材將晶片整個密封住,以保護晶片電路避免遭水氣破壞,然而對高頻元件而言,傳統封裝方式會影響元件的高頻特性。
氣腔式封裝方法係在晶片與封裝外殼間形成一密封氣腔,封裝體中的介質為氣體(真空氣體、氮氣、一般空氣),可提供晶片高絕緣性能,進而降低功率之損耗,特別適用於高頻率和高功率應用,如射頻(RF)系統、微波(Microwave)系統、微機電系統(MEMS)、微光機電系統(MOEMS)以及感光元件(如CCD、CMOS等)。
然而傳統氣腔式封裝製程當封裝膠材在烘烤固化時,常因為封裝體氣腔內的氣體排出而造成封裝膠材破孔,若生產複數個相連封裝體,當封裝膠材同時烘烤固化時,更會造成封裝膠材被氣腔內排出之氣體壓力擠壓而溢流至相鄰封裝體內,進而影響晶片功能,故傳統氣腔式封裝多採用單顆封裝的方式以避免破孔及溢膠,封裝產率也因此受到限制。
本發明之主要目的在於提供一種氣腔式封裝結構,於複數個相連氣腔式封裝體之間設置開放式氣槽,使封裝體在封裝膠材固化的過程中,氣腔內之氣體可從開放式氣槽排出,因此能降低封裝體膠材破孔機率,並能一次封裝複數個封裝體,同時提高封裝良率及生產率。
為達上述目的,本發明提供一種氣腔式封裝結構,包含一承載體(carrier)、複數個晶片(die)、複數條銲線(wire)、複數個牆體(wall)以及一上蓋(lid),其中該承載體具有複數個晶座(die pad)及複數個引腳(lead);該複數個晶片中之每一晶片係接合於一晶座之上;該複數條銲線係用以電性連結複數個晶片與複數個引腳;該複數個牆體係設置於承載體之上,以形成複數個腔室,其中每一個腔室係容置有至少一晶座及複數個引腳,且每一牆體設有至少一與外界相連通之開放式氣槽;而該上蓋係以封裝膠材覆蓋黏附於複數個牆體之上,藉以將該複數個腔室密封而形成複數個密閉氣腔;在上蓋與牆體間之封裝膠材固化的過程中,腔室內之氣體可從開式氣槽排出;該氣腔式封裝結構經切割即形成複數個具有密閉氣腔的封裝體。
本發明亦提另一種氣腔式封裝結構,包含一承載體、複數個晶片、複數條銲線以及一上蓋,其中該承載體具有複數個晶座及引腳;該複數個晶片中之每一晶片係接合於一晶座之上;該複數條銲線係用以電性連結複數個晶片與複數個引腳;該上蓋下方設有複數個腔室,任兩個相鄰腔室之間設有至少一與外界相連通之開放式氣槽;而該上蓋係以封裝膠材覆蓋黏附於承載體之上,使
每一個腔室內覆蓋有至少一晶座及複數個引腳,並使該複數個腔室密封而形成複數個密閉氣腔;上蓋與承載體密封過程中,腔室內之氣體可從開式氣槽排出;該氣腔式封裝結構經切割即形成複數個具有密閉氣腔的封裝體。
此外,本發明提供一種氣腔式封裝方法,包括以下步驟:A1.提供一承載體,具有複數個晶座及複數個引腳;A2.形成複數個牆體於承載體之上,以形成複數個腔室,其中每一個腔室容置有至少一晶座及複數個引腳,且每一個牆體上設有至少一與外界相連通之開放式氣槽;A3.提供複數個晶片,其中每一個晶片係接合於一晶座上;A4.提供複數條銲線,銲接於複數個晶片與複數個引腳之間供電性連接;A5.提供一上蓋,塗佈封裝膠材於該上蓋之下或複數個牆體之上,將上蓋覆蓋於複數個牆體之上,固化該封裝膠材使上蓋黏附於複數個牆體之上,以使複數個腔室密封而形成具有密閉氣腔的複數相連氣腔式封裝體;A6.切割該具有密閉氣腔的複數相連氣腔式封裝體,以產生複數個氣腔式封裝體。
本發明亦提供另一種氣腔式封裝方法,包括以下步驟:B1.提供一承載體,具有複數個晶座及複數個引腳,並提供複數個晶片,其中每一個晶片係接合於一晶座上;B2.提供複數條銲線,銲接於複數個晶片與複數個引腳之間供電性連接;
B3.提供一上蓋,其下方設有複數個腔室,且於任兩個相鄰腔室之間設有至少一與外界相連通之開放式氣槽;B4.塗佈封裝膠材於上蓋之下或承載體之上,蓋覆該上蓋於該承載體之上,使每一腔室內至少有一個晶座及複數個引腳,固化封裝膠材使上蓋黏附於承載體之上,以使該複數個腔室密封而形成具有密閉氣腔的複數相連氣腔式封裝體;B5.切割該具有密閉氣腔的複數相連氣腔式封裝體,以產生複數個氣腔式封裝體。
於實施時,前述結構中之承載體係由金屬材料或陶瓷材料所構成。
於實施時,前述結構中之封裝膠材係為環氧樹脂、UV膠或錫金。
於實施時,前述結構中之牆體係由高分子聚合物、陶瓷或金屬材料所構成。
於實施時,前述結構中之上蓋係由高分子聚合物、陶瓷、玻璃或金屬材料所構成。
於實施時,前述方法之該封裝膠材係以加熱方式固化。
為對於本發明之特點與作用能有更深入之瞭解,茲藉實施例配合圖式詳述於後:
第1A圖係為本發明所提供之氣腔式封裝結構之一實施例之剖面結構示意圖,包含一承載體101、複數個晶片103、複數條銲
線104、複數個牆體110以及一上蓋120,其中承載體101具有複數個晶座102及複數個引腳106;複數個晶片103中之每一晶片係接合於一晶座102之上;複數條銲線104係用以電性連結複數個晶片103與複數個引腳106;複數個牆體110係設置於承載體101之上,以形成複數個腔室111,其中每一個腔室111係容置有至少一晶座102及複數個引腳106,且每一牆體110設有至少一與外界相連通之開放式氣槽112;而上蓋120係以封裝膠材105覆蓋黏附於複數個牆體110之上,藉以將複數個腔室111密封而形成複數個密閉氣腔。將第1A圖所示之封裝結構進行切割,即可獲得複數個如第1B圖所示之具有密閉氣腔的封裝體100。
於實施時,前述實施例中之承載體101可為導線架式(lead-frame base)、基板式(substrate base)或陶瓷式(ceramic base),其中導線架式承載體可由銅合金、鎳合金、鈀合金或金合金等金屬材料所構成;基板式承載體可由銅、樹脂、綠漆、金等材料組成;陶瓷式承載體係可由氧化鋁、氮化鋁、或氧化鈹等陶瓷材料所構成;晶片103為半導體晶片,以化合物半導體晶片為較佳;晶片103可以如銀膠等膠質材料黏附接合於晶座102上,一個晶座上可接合一或多個晶片;銲線104係由導電性佳的金屬材料所構成,其中以金或含金金屬為較佳;牆體110可依承載體上之晶座排列方式以及最後完成封裝體的設計製作成所需形狀,牆體上之開放式氣槽112可單邊或多邊與外界連通,或透過其他牆體上之開放式氣槽與外界連通,第4圖為一牆體之一實施例之俯視圖,其中晶座係以陣列方式排列,牆體110縱橫交錯形成於承載體之上,以形成陣列方式排列之腔室111,其中每一個腔室係容置有至
少一晶座及複數個引腳,晶座上接合晶片103,而晶片103以銲線104電性聯接於引腳,而牆體上之開放式氣槽112互相連通成一網格狀,覆蓋上蓋並以封裝膠材密封後即形成複數個相連的封裝體陣列,以2mm×2mm之封裝體為例,一次封裝作業可生產接近2000個封裝體;黏合牆體110與上蓋120之封裝膠材可選擇為熱固性封裝膠材如環氧樹脂、UV膠或錫金;牆體110可由高分子聚合物如液晶高分子聚合物(Liquid Crystal Polymer,LCP)、塑膠、陶瓷或金屬材料所構成;而上蓋120可由高分子聚合物如液晶高分子聚合物(Liquid Crystal Polymer,LCP)、塑膠、陶瓷、玻璃或金屬材料所構成。
第2A圖係為本發明所提供之氣腔式封裝結構之另一種實施例之剖面結構示意圖,包含一承載體201、複數個晶片203、複數條銲線204以及一上蓋210,其中承載體201具有複數個晶座202及複數個引腳206;複數個晶片203中之每一晶片係接合於一晶座202之上;複數條銲線204係用以電性連結複數個晶片203與複數個引腳206;上蓋210下方設有複數個腔室211,任兩個相鄰腔室之間設有至少一與外界相連通之開放式氣槽212,上蓋210係以封裝膠材205黏附於承載體201之上,使每一個腔室內覆蓋有至少一晶座及複數個引腳,並使該複數個腔室密封而形成複數個密閉氣腔。將第2A圖所示之封裝結構進行切割,即可獲得複數個如第2B圖所示之具有密閉氣腔的封裝體200。
於實施時,前述實施例中之承載體201可為導線架式(lead-frame base)、基板式(substrate base)或陶瓷式(ceramic base),其中導線架式承載體可由銅合金、鎳合金、鈀合金或金合金等金
屬材料所構成;基板式承載體可由銅、樹脂、綠漆、金等材料組成;陶瓷式承載體係可由氧化鋁、氮化鋁、或氧化鈹等陶瓷材料所構成;晶片203為半導體晶片,以化合物半導體晶片為較佳;晶片203可以如銀膠等膠質材料黏附接合於晶座202上,一個晶座上可接合一或多個晶片;電性連接晶片與承載體之銲線204係由導電性佳的金屬材料所構成,其中以金或含金金屬為較佳;本實施例以一個一體成型之上蓋210取代前述實施例於承載體101上設置複數個牆體及腔室之方式,上蓋210之構型可依承載體101上之晶座排列方式以及最後完成封裝體的設計製作成所需形狀,上蓋中所設置之開放式氣槽212可單邊或多邊與外界連通,或透過其他上蓋中之開放式氣槽與外界連通,第6圖為一上蓋之一實施例之仰視圖,上蓋210所形成之腔室211係以陣列方式排列,而腔室間之開放式氣槽212互相連通成一網格狀,塗佈封裝膠材205於上蓋210之下或承載體201之上,覆蓋上蓋210於承載體201上,並將封裝膠材205固化後即形成複數個相連的氣腔式封裝體陣列,以2mm×2mm之封裝體為例,一次封裝作業可生產接近2000個封裝體;黏合上蓋210與承載體201之封裝膠材係為可選擇熱固性封裝膠材如環氧樹脂、UV膠或錫金;上蓋210可由聚合物如液晶高分子聚合物(Liquid Crystal Polymer,LCP)、塑膠、陶瓷、玻璃或金屬材料所構成。
第3A~3G圖係為本發明所提供之氣腔式封裝方法之一種實施步驟:A1.提供一承載體101,具有複數個晶座102及複數個引腳106;
A2.形成複數個牆體110於該承載體之上,以形成複數個腔室111,其中每一個腔室容置有至少一晶座102及複數個引腳106;於每一個牆體110上設有至少一與外界相連通之開放式氣槽112;A3.提供複數個晶片103,其中每一個晶片103係接合於一晶座102上;A4.提供複數條銲線104,銲接於晶片103與複數個引腳106之間供電性連接;A5.提供一上蓋,塗佈封裝膠材105於上蓋120之下或複數個牆體110之上,將上蓋120覆蓋於複數個牆體110之上,固化封裝膠材105使上蓋120黏附於複數個牆體110之上,以使複數個腔室111密封而形成具有密閉氣腔的複數相連氣腔式封裝體;A6.切割該具有密閉氣腔的複數相連氣腔式封裝體,以產生複數個氣腔式封裝體100。
於實施時,前述實施步驟中牆體110上之開放式氣槽112可於牆體形成後再加以切割(如第3A及3B圖),或直接於承載體101上形成具有開放式氣槽112之牆體110;封裝膠材可選擇為熱固性膠材如環氧樹脂、UV膠或錫金,可塗佈於上蓋下方或牆體上方,將上蓋120覆蓋於牆體110之後,以加熱方式固化該封裝膠材105,使上蓋120黏附於牆體110之上;在此步驟中,因加熱造成腔室111內外壓差而使腔室111中的氣體壓力排出,塗佈於上蓋120及牆體110間的封裝膠材105會因受擠壓而溢出(如第3F圖之箭號所示),而因本發明所提供之結構於封裝牆體110間設有開放式氣槽112,因此溢膠可流入開放式氣槽112,腔室111中的
氣體亦可從開放式氣槽112排出,而不會破壞相鄰封裝體的結構。
第5A~5F圖係為本發明所提供之氣腔式封裝方法之一種實施步驟:B1.提供一承載體201,具有複數個晶座202及複數個引腳206,並提供複數個晶片203,其中每一個晶片係接合於一晶座202上;B2.提供複數條銲線204,銲接於複數個晶片203與複數個引腳206之間供電性連接;B3.提供一上蓋210,其下方設有複數個腔室211,且於任兩個相鄰腔室之間設有至少一與外界相連通之開放式氣槽212;B4.塗佈封裝膠材於上蓋210之下或承載體201之上,蓋覆上蓋210於承載體201之上,使每一腔室211內至少有一個晶座202及複數個引腳206,固化封裝膠材205使上蓋210黏附於承載體201之上,以使該複數個腔室211密封而形成具有密閉氣腔的複數相連氣腔式封裝體;B5.切割該具有密閉氣腔的複數相連氣腔式封裝體,以產生複數個氣腔式封裝體200。
於實施時,前述實施步驟中上蓋210中之開放式氣槽212可於上蓋形成後再加以切割,或直接以模型製作成具有開放式氣槽之上蓋;封裝膠材205可選擇為熱固性膠材如環氧樹脂、UV膠或錫金,可塗佈於上蓋210下方或承載體上201方,將上蓋210覆蓋於承載體201之後,以加熱方式固化該封裝膠材205,使上蓋210黏附於承載體201之上;在此步驟中,因加熱造成腔室211內外壓差而使腔室211中的氣體壓力排出,塗佈於上蓋210及承載
體201間的封裝膠材205會因受擠壓而溢出(如第5E圖之箭號所示),腔室211中排出的氣體及溢膠可從上蓋210中的開放式氣槽212排出,而不會破壞相鄰封裝體的結構。
本發明具有以下優點:
1.本發明所提供之氣腔式封裝結構及方法,可於一承載體上一次製作大量氣腔式封裝體,因此可提高氣腔式封裝產量。
2.本發明所提供之氣腔式封裝結構及方法,可適用於任何尺寸、型式與材料之氣腔式封裝體,只要在複數個相連氣腔式封裝體之間設置與外界相連通的開放式氣槽,當封裝膠材在固化時氣腔式封裝體之氣腔內的氣體壓力就可透過開放式氣槽排出,可以預防氣腔式封裝體的封裝膠材破孔的發生,進而提高氣腔式封裝良率。
3.本發明所提供之氣腔式封裝結構及方法,因氣腔式封裝體膠材破孔的機率降低,故可減少封裝膠材的用量,可避免因溢膠過多而滴落至晶片而影響晶片電性,進而提高氣腔式封裝成品良率。
4.本發明所提供之氣腔式封裝結構及方法,於承載體上形成設有開放式氣槽之牆體後,將一上蓋以封裝膠材覆蓋黏於牆體上,將封裝膠材固化後即可進行切割形成單顆氣腔式封裝體,或直接製作設有開放式氣槽之上蓋,再將上蓋以封裝膠材覆蓋黏附於承載體上,即可進行切割形成單顆氣腔式封裝體;兩種封裝結構切割後封裝邊緣皆不需再經過研磨處理,其製作步驟較傳統氣腔式封裝方法簡便,因此可降低生產成本。
綜上所述,本發明確實可達到預期之目的,而提供一種氣腔
式封裝結構,具有複數個相連的氣腔式封裝體,且相鄰封裝體之間設有開放式氣槽,使氣腔式封裝體的封裝膠材在固化的過程中,氣腔式封裝體之氣腔內的氣體壓力可從開放式氣槽排出,因此能降低氣腔式封裝體的封裝膠材破孔機率,並能一次封裝複數個氣腔式封裝體,同時提高氣腔式封裝良率及生產率。其確具產業利用之價值,爰依法提出專利申請。
又上述說明與圖式僅是用以說明本發明之實施例,凡熟於此業技藝之人士,仍可做等效的局部變化與修飾,其並未脫離本發明之技術與精神。
100‧‧‧氣腔式封裝體
101‧‧‧承載體
102‧‧‧晶座
103‧‧‧晶片
104‧‧‧銲線
105‧‧‧封裝膠材
106‧‧‧引腳
110‧‧‧牆體
111‧‧‧腔室
112‧‧‧開放式氣槽
120‧‧‧上蓋
200‧‧‧氣腔式封裝體
201‧‧‧承載體
202‧‧‧晶座
203‧‧‧晶片
204‧‧‧銲線
205‧‧‧封裝膠材
206‧‧‧引腳
210‧‧‧上蓋
211‧‧‧腔室
212‧‧‧開放式氣槽
第1A及1B圖 係為本發明所提供之一種氣腔式封裝結構之一種實施例之剖面結構示意圖。
第2A及2B圖 係為本發明所提供之一種氣腔式封裝結構之另一種實施例之剖面結構示意圖。
第3A~3G圖 係為本發明所提供之一種氣腔式封裝方法之一種實施步驟。
第4圖 係為本發明所提供之一種氣腔式封裝結構之一種實施例中之截面俯視圖。
第5A~5F圖 係為本發明所提供之一種氣腔式封裝方法之另一種實施步驟。
第6圖 係為本發明所提供之一種氣腔式封裝結構之一種實施例中上蓋之仰視圖。
第7圖 係為本發明所提供之一種氣腔式封裝方法之流程圖。
第8圖 係為本發明所提供之另一種氣腔式封裝方法之流程圖。
100‧‧‧氣腔式封裝體
101‧‧‧承載體
102‧‧‧晶座
103‧‧‧晶片
104‧‧‧銲線
105‧‧‧封裝膠材
106‧‧‧引腳
110‧‧‧牆體
111‧‧‧腔室
112‧‧‧開放式氣槽
120‧‧‧上蓋
Claims (15)
- 一種氣腔式封裝結構,包含:一承載體,具有複數個晶座及複數個引腳;複數個晶片,其中每一晶片係接合於一晶座之上,且其中一晶片包含一個高頻半導體元件、微機電系統元件或表面聲波元件;複數條銲線,係用以電性連結該複數個晶片與該複數個引腳;複數個牆體,係設置於該承載體之上,以形成複數個腔室,其中每一個腔室係容置有至少一晶座及複數個引腳,且每一牆體設有至少一與外界相連通之開放式氣槽;以及一上蓋,係以封裝膠材覆蓋黏附於該複數個牆體之上,藉以將該複數個腔室密封而形成複數個密閉氣腔。
- 如申請專利範圍第1項所述之氣腔式封裝結構,其中該承載體係由金屬材料或陶瓷材料所構成。
- 如申請專利範圍第1項所述之氣腔式封裝結構,其中該封裝膠材係為環氧樹脂、UV膠或錫金。
- 如申請專利範圍第1項所述之氣腔式封裝結構,其中該牆體係由高分子聚合物、陶瓷或金屬材料所構成。
- 如申請專利範圍第1項所述之氣腔式封裝結構,其中該上蓋係由高分子聚合物、陶瓷、玻璃或金屬材料所構成。
- 一種氣腔式封裝結構,包含:一承載體,具有複數個晶座及複數個引腳; 複數個晶片,其中每一晶片係接合於一晶座之上,且其中一晶片包含一個高頻半導體元件、微機電系統元件或表面聲波元件;複數條銲線,係用以電性連結該複數個晶片與該複數個引腳;以及一上蓋,其下方設有複數個腔室,任兩個相鄰腔室之間設有至少一與外界相連通之開放式氣槽,該上蓋係以封裝膠材覆蓋黏附於該承載體之上,使每一個腔室內覆蓋有至少一晶座及複數個引腳,並使該複數個腔室密封而形成複數個密閉氣腔。
- 如申請專利範圍第6項所述之氣腔式封裝結構,其中該承載體係由金屬材料銅或陶瓷材料所構成。
- 如申請專利範圍第6項所述之氣腔式封裝結構,其中該封裝膠材係為環氧樹脂、UV膠或錫金。
- 如申請專利範圍第6項所述之氣腔式封裝結構,其中該上蓋係由高分子聚合物、陶瓷、玻璃或金屬材料所構成。
- 一種氣腔式封裝方法,包含以下步驟:A1.提供一承載體,具有複數個晶座及複數個引腳;A2.形成複數個牆體於該承載體之上,以形成複數個腔室,其中每一個腔室容置有至少一晶座及複數個引腳,且每一個牆體上設有至少一與外界相連通之開放式氣槽;A3.提供複數個晶片,其中每一個晶片係接合於一晶座上;A4.提供複數條銲線,銲接於該複數個晶片與該複數個引腳之 間供電性連接;A5.提供一上蓋,塗佈封裝膠材於該上蓋之下或該複數個牆體之上,將該上蓋覆蓋於該複數個牆體之上,固化該封裝膠材使該上蓋黏附於該複數個牆體之上,以使該複數個腔室密封而形成具有密閉氣腔的複數相連氣腔式封裝體;A6.切割該具有密閉氣腔的複數相連氣腔式封裝體,以產生複數個氣腔式封裝體。
- 如申請專利範圍第10項所述之氣腔式封裝方法,其中於步驟A5中,該封裝膠材係以加熱方式固化。
- 如申請專利範圍第11項所述之氣腔式封裝方法,其中該封裝膠材係為環氧樹脂、UV膠或錫金。
- 一種氣腔式封裝方法,包含以下步驟:B1.提供一承載體,具有複數個晶座及複數個引腳,並提供複數個晶片,其中每一個晶片係接合於一晶座上;B2.提供複數條銲線,銲接於該複數個晶片與該複數個引腳之間供電性連接;B3.提供一上蓋,其下方設有複數個腔室,且於任兩個相鄰腔室之間設有至少一與外界相連通之開放式氣槽;B4.塗佈封裝膠材於該上蓋之下或該承載體之上,蓋覆該上蓋於該承載體之上,使每一容置空間內至少有一個晶座及複數個引腳,固化該封裝膠材使該上蓋黏附於該承載體之上,以使該複數個腔室密封而形成具有密閉氣腔的複數相連氣腔式封裝體; B5.切割該具有密閉氣腔的複數相連氣腔式封裝體,以產生複數個氣腔式封裝體。
- 如申請專利範圍第13項所述之氣腔式封裝方法,其中於步驟B4中,該封裝膠材係以加熱方式固化。
- 如申請專利範圍第14項所述之氣腔式封裝方法,其中該封裝膠材係為環氧樹脂、UV膠或錫金。
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JP6394055B2 (ja) * | 2014-05-13 | 2018-09-26 | 日本電気硝子株式会社 | セラミック−ガラス複合パッケージの製造方法及びセラミック−ガラス複合パッケージ |
US9630835B2 (en) * | 2014-08-25 | 2017-04-25 | Texas Instruments Incorporated | Wafer level packaging of MEMS |
TWI584583B (zh) * | 2016-06-08 | 2017-05-21 | 樹德科技大學 | 一種可引入導光調頻的封裝構造 |
EP3309826A1 (en) * | 2016-10-13 | 2018-04-18 | MEAS Switzerland S.a.r.l. | Device for supporting a mems component, array of the device for supporting a system comprising the device, method for manufacturing the device for supporting a mems component and use of walls for surrounding a mems component |
US10446454B2 (en) * | 2016-11-14 | 2019-10-15 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package structure |
SG11201907810XA (en) * | 2017-02-24 | 2019-09-27 | Rjr Technologies Inc | Air cavity package with supplemental heat generator |
CN107376802B (zh) * | 2017-09-15 | 2019-12-27 | 四川宏图普新微波科技有限公司 | 一种用于微波裂解废轮胎的保持腔内洁净运行的工艺 |
CN111613529B (zh) * | 2020-05-27 | 2023-05-23 | 华天慧创科技(西安)有限公司 | 一种晶圆的封装工艺 |
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