TWI475691B - 第三族氮化物裝置和電路 - Google Patents

第三族氮化物裝置和電路 Download PDF

Info

Publication number
TWI475691B
TWI475691B TW099103836A TW99103836A TWI475691B TW I475691 B TWI475691 B TW I475691B TW 099103836 A TW099103836 A TW 099103836A TW 99103836 A TW99103836 A TW 99103836A TW I475691 B TWI475691 B TW I475691B
Authority
TW
Taiwan
Prior art keywords
transistor
iii
gate
layers
substrate
Prior art date
Application number
TW099103836A
Other languages
English (en)
Other versions
TW201036155A (en
Inventor
Yifeng Wu
Rongming Chu
Original Assignee
Transphorm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Transphorm Inc filed Critical Transphorm Inc
Publication of TW201036155A publication Critical patent/TW201036155A/zh
Application granted granted Critical
Publication of TWI475691B publication Critical patent/TWI475691B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/4917—Crossed wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12036—PN diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Description

第三族氮化物裝置和電路
本發明係關於半導體電子裝置，特定言之係關於具有場板的第三族氮化物高電子遷移率電晶體(HEMT)裝置和含此之電路。
迄今，現代功率半導體裝置，例如包括功率金氧半導體場效電晶體(MOSFET)和絕緣閘極雙極性電晶體(IGBT)的裝置，通常是以矽(Si)半導體材料製造。近來，碳化矽(SiC)功率裝置因有優越性質而受到注目。第三族氮化物(III-N)半導體裝置現已嶄露頭角用於承載大電流、支援高電壓及提供極低的接通電阻、高電壓裝置操作和快速切換時間。如第1圖所示，典型的III-N高電子遷移率電晶體(HEMT)包含基板10、位於基板上的通道層11(例如，氮化鎵(GaN))和位於通道層上的阻障層12(例如，Alx Ga1-x N)。二維電子氣體(2DEG)通道19位於通道層11與阻障層12之間的界面附近的通道層11中。源極14和汲極15分別形成連接2DEG的歐姆觸點。閘極16調節閘極區的2DEG部分，亦即，閘極16的正下方。
場板通常用於III-N裝置來成形裝置之高場區的電場，藉以降低高峰電場且提高裝置崩潰電壓，進而容許更高電壓操作。第2圖及第3圖圖示場板之III-N HEMT的實例。第2圖之裝置包括場板18，其連接至閘極16，亦即，閘極連接場板，且絕緣層13(例如，氮化矽(SiN)層)位於場板與阻障層12之間。場板18可包括與閘極16相同的材料或由與閘極16相同的材料形成。製造具閘極連接場板之裝置的製程通常比製造具不同場板配置之裝置的製程相對簡單，因其不需形成單獨的場板和閘極層，故閘極和場板可以單一處理步驟執行沈積。然而，第2圖的閘極連接場板18會增加閘極16與汲極15間的電容，藉此減慢裝置的有效操作速度。增加裝置輸入與輸出間的電容及相應減慢高頻響應已知為米勒(Miller)電容效應或米勒效應。就採用第2圖所示之III-N HEMT的應用而言，源極14通常如圖式所指示般接地。
在第3圖所示之裝置中，場板18連接至源極14，亦即，場板18為源極連接場板。連接場板至源極可減少或消除米勒效應，因當將輸入訊號施加至閘極時，場板上的電壓仍固定不變。對此配置來說，輸入與輸出間的電容為源極至汲極電容，其通常很小，故對裝置效能的影響微乎其微。然而，此裝置的製造製程比具閘極連接場板之裝置(例如第2圖之裝置)的製造製程複雜。
在一些態樣中，描述第三族氮化物(III-N)基高電子遷移率電晶體(HEMT)。該電晶體具有一系列的III-N層，其形成二維電子氣體(2DEG)通道；閘極，其位於閘極區中之該系列III-N層的第一側邊；場板，其電氣連接至閘極且由電絕緣體與III-N層分離；以及接地線，其電氣連接至場板和閘極，進而形成閘極連接接地場板。
本文所述之電晶體可藉由偏壓電晶體之源極和電晶體之閘極而操作，其中在偏壓期間，電晶體之輸入與輸出間的電容降得比缺少閘極連接接地場板之類似電晶體低。
電路可包括本文所述電晶體中之一者(其為空乏模態電晶體)以及低壓加強模態電晶體，其中空乏模態電晶體的源極電氣連接至加強模態電晶體的汲極。
組件可包括本文所述之具有基板的電路中之一者。基板包括作為接地線的導電層。空乏模態電晶體和加強模態電晶體附接至基板，且加強模態電晶體的源極電氣連接至接地線。
其他電路可包括本文所述電晶體和二極體。電晶體的源極電氣連接至二極體的陰極。
本文所述之電晶體、電路和組件的各種實施例可包括一或多個下列特徵結構。一系列的III-N層可包括至少三個III-N層，三個III-N層中之每一者具有不同組合物。至少一個層可為氮化鋁(AlN)層。2DEG通道可為第一2DEG通道，一系列III-N層可於一系列III-N層之通道III-N層中形成第一2DEG通道，且第二2DEG通道可位於一系列III-N層中並平行於第一2DEG通道。絕緣層可設在閘極與一系列III-N層之間。閘極凹部位於閘極區的一系列III-N層中，且至少一部分的閘極位於閘極凹部內。場板具有多個部分，其各自遠離一系列III-N層不同距離。接地線可為導電層，其側向擴張大於電晶體的側向擴張。場板可為傾斜場板。電晶體可為空乏模態電晶體。加強模態電晶體的源極可為接地。加強模態電晶體可為垂直裝置，且空乏模態電晶體可為側向裝置。絕緣層可設在加強模態電晶體與基板之間，絕緣層電氣隔離加強模態電晶體與基板。加強模態電晶體可為垂直裝置，其具有閘極、電晶體中一系列層一側的汲極和一系列層對側的源極，且加強模態電晶體的源極可直接安裝在基板的接地線上。組件可包括基板上的源極引線、閘極引線和汲極引線。源極引線可電氣連接至基板的導電層。閘極引線可電氣連接至加強模態電晶體的閘極且與基板的導電層電氣絕緣。汲極引線可電氣連接至空乏模態電晶體的汲極且與基板的導電層電氣絕緣。電路可包括二極體，其中二極體的陽極電氣連接至空乏模態電晶體的汲極。二極體、加強模態電晶體和空乏模態電晶體可位於共用基板上，且二極體可包括III-N材料。二極體的陽極可電氣連接至接地線。二極體和電晶體位於共用基板上，且二極體可包含III-N材料。
描述容易製造且不遭受米勒電容效應的半導體裝置。在一些實施例中，描述包含此等裝置的電路。此等電路的製造製程因包括此等裝置而可得以簡化。
第4圖圖示第三族氮化物裝置，亦即，第三族氮化物HEMT的圖解說明，該裝置包括閘極連接場板28，其中場板電氣連接至接地。此裝置在此稱為具有「接地閘極連接場板」。如本文中所使用，術語「第三族氮化物」或「III-N材料」、「層」、「裝置」等代表包含依化學計量化學式Alx Iny Gaz N(其中x+y+z約等於1)的化合物半導體材料的材料或裝置。如本文中所使用，兩個或兩個以上觸點或其他項目若由足夠導電之材料連接，以確保各觸點或其他項目的電位在所有時候大致相同，則其據稱為「電氣連接」。如本文中所使用，「接地端子」或「接地」為具電位(電壓)的端子，其相應參考驅動電壓訊號。場板以許多方式連接至接地。例如，藉由將導線一端附接至場板，且將另一端附接至接地，可使場板直接連接至接地。或者，場板可直接安裝在電路封裝的接地部分，此如第8圖所圖示並描述於後。或者，場板可連接至電路封裝的端子，其在電路操作期間仍保持接地，此如第11a圖所圖示並描述於後。亦可採取其他接地方式。除了閘極16和接地閘極連接場板28外，第4圖所示之III-N HEMT亦包含兩個III-N層、通道層11(例如，GaN)和阻障層12(例如，Alx Ga1-x N)。2DEG通道19位於與通道層11與阻障層12之間的界面鄰接的源極14與汲極15間的通道層11中。
此外，裝置可包括III-N層的任何組合，其構成III-N HEMT結構。例如，裝置可包括額外III-N層20，如第5圖所示，其例如為通道層11與阻障層12間的AlN層。或者，裝置可包含一系列的III-N層，其在源極14與汲極15間構成兩個或兩個以上平行2DEG通道。第6圖圖示具兩個2DEG通道的裝置實例。除了第4圖的裝置所圖示的各層外，此裝置包括III-N層21、22，其可分別為GaN和Aly Ga1-y N。第6圖的裝置包括位於通道層11中的2DEG通道19和位於III-N層21中的另一2DEG通道。在一些實施例中，第6圖的裝置可設計成在層21中存在2DEG通道，但在通道層11中不存在2DEG通道，例如藉由使通道層11內包括補償摻質或其他雜質，例如鐵(Fe)或碳(C)。或者，第6圖的裝置可設計成通道層11中的2DEG實質上比III-N層21的2DEG不導電，在一些情況下更排除導電，例如藉由使通道層11內包括補償摻質或其他雜質，例如Fe或C。
場板包含導電材料，且除接地外，其可呈能降低裝置之高峰電場的任何配置，且藉此容許裝置在更高電壓下操作。例如，在一些實施例中，如第4圖所示，場板可包括單一閘極連接場板。在其他實施例中，如第7圖所示，場板可包括多個場板，其亦稱為具多個部分的場板。第7圖圖示亦即具兩個場板28、28’的此裝置。兩個場板28、28’彼此的差異在於其相距阻障層12的距離、其是否位於絕緣層中的凹部內或絕緣層上的凹部內、或其露出上表面相距絕緣層或裝置之III-N層的距離。使用一個以上場板時，所有場板彼此電氣相連，至少一個場板電氣連接至閘極，且至少一個場板電氣連接至接地。第7圖圖示僅有場板28’連接至接地的情況。
在具接地閘極連接場板的裝置中，例如第4-8圖所示之彼等場板，場板上的電壓仍保持不變。因此，輸入電容不受場板影響，且場板不會促進裝置的米勒效應。此外，由於場板可直接安裝在封裝的接地部分，故可簡化包含此等裝置的電路製造。第8圖示意地圖示此安裝方式的一實例，其中傾斜場板28”直接安裝於封裝的接地部分30。絕緣層13中的凹部具有一或多個斜壁。閘極16圖示為從絕緣層13中之凹部側邊延伸的部分，其中絕緣層13接觸其底下不同於絕緣層13之材料的材料層，例如第8圖所示之阻障層12。閘極16垂直延伸至接地部分30，且傾斜場板28”從閘極16之側壁延伸到凹部之側壁。在一些實施例中，傾斜場板28”包括最靠近汲極15的閘極側邊上的金屬部分。接地部分30可為導電層，其側向尺寸或平面圖表面積等於或大於電晶體的側向尺寸或平面圖表面積。
在一些實施例中，第4-8圖所圖示之III-N裝置為空乏模態(D-mode)裝置，以使得當源極的電壓與閘極的電壓相同時，裝置處於開啟(ON)狀態，且閘極的電壓必須小於源極的電壓，以將裝置切換成關閉(OFF)。在一些實施例中，第4-8圖所圖示之III-N裝置至少於離基板最遠之III-N層的閘極區中可包括凹部，其中閘極位於凹部內(未圖示)。在一些實施例中，第4-8圖所圖示之III-N裝置於閘極與III-N材料間可包括絕緣材料，亦即，閘極絕緣體(未圖示)。
包含至少一個電晶體且閘極電壓保持不變的電路和裝置可包括如第4-9圖所示配置的電晶體。第9圖為第4-8圖所示實施例之裝置的電路表示，其中如圖所示，場板28連接至閘極並且連接至接地。電路和裝置採用此等電晶體可簡化封裝和製造製程，同時防止米勒效應使電路和裝置的效能降級。第10-13圖圖示包括接地閘極連接場板的電路和裝置實施例。
如本文中所使用，「阻斷電壓」代表當將電壓施加於電晶體上時，電晶體阻止有效電流(例如，大於正規傳導期間的0.001倍操作電流的電流)流過電晶體的能力。換言之，當電晶體阻斷施加電壓時，通過電晶體的總電流將不大於正規傳導期間的0.001倍操作電流。
第10圖的電路圖代表的實施例包含組件，其包括具接地閘極連接場板的高電壓D模態III-N電晶體40和低電壓加強模態(亦即，正常關閉)電晶體42，其中III-N電晶體40的源極電氣連接至加強模態(E-mode)電晶體42的汲極，且E模態電晶體42的源極電氣連接至接地。第10圖的組件類似單一高電壓E模態電晶體操作。亦即，施加至節點46的輸入電壓訊號可於節點44處產生輸出訊號，當將輸入電壓訊號施加至E模態電晶體的閘極且將E模態電晶體的源極連接至接地時，其與高電壓E模態電晶體之汲極端子處產生的輸出訊號相同。
在第10圖的組件中，若節點44保持呈正電壓，則當足夠的正電壓(亦即，電壓大於E模態電晶體42的臨界電壓)施加至節點46時，電流從節點44流向節點47，且當小於E模態電晶體42之臨界電壓(例如，0伏特(V))的電壓施加至節點46時，實質無電流流動。此高電壓E模態裝置配置較佳為單一高電壓E模態裝置，因為高電壓E模態電晶體通常難以製造。
當高電壓(HV)施加至節點44且以0 V偏壓節點46時，E模態電晶體42阻斷的電壓約等於或略大於|Vth |，其中|Vth |為III-N電晶體40的臨界電壓強度。典型的Vth 值為約-5 V至-10 V。HV值取決於特定電路應用，但HV通常遠大於|Vth |。例如，HV可為約600 V、約1200 V或適合高電壓應用的任何其他電壓。因此，節點45處的電壓約等於或略大於|Vth |，故III-N電晶體40處於關閉狀態並阻斷約等於HV減去|Vth |的電壓。當高電壓(HV)施加至節點44且以大於E模態電晶體42之臨界電壓Vth,42 的電壓(例如，2×Vth,42 )偏壓節點46時，電流從節點44流向節點47，且在E模態電晶體42上的壓降VF 遠小於|Vth |，通常小於約0.2 V。在此等條件下，節點45處的電壓為VF ，且III-N電晶體40的閘極-源極電壓VGS40 為約-VF 。
III-N電晶體40能夠阻斷大電壓，例如至少600 V或至少1200 V或電路應用所需的其他適合阻斷電壓。另外，就用於電路應用而言，III-N電晶體40的臨界電壓Vth 必須足夠小於-VF ，以使得當組件處於開啟狀態時，III-N電晶體40的閘極-源極電壓VGS40 足夠大於Vth ，以使得III-N電晶體40可以足夠低的傳導損失傳導從節點44流向節點47的電流。例如，Vth 可小於-3 V、-5 V或-7 V，且若III-N電晶體40的閘極-源極電壓VGS40 為約-VF ，則III-N電晶體40能夠傳導10安培(A)或更多電流且傳導損失小於7瓦(W)。
E模態電晶體42至少能夠阻斷大於|Vth |的電壓，其中|Vth |為III-N電晶體40的臨界電壓強度。在一些實施例中，E模態電晶體42可阻斷約2×|Vth |。因高電壓D模態III-N電晶體的典型臨界電壓為約-5 V至-10 V，故E模態電晶體42能夠阻斷約10-20 V或以上。在一些實施例中，E模態電晶體42為矽(Si)基電晶體，例如，垂直Si場效電晶體(FET)。在其他實施例中，E模態電晶體42為III-N基電晶體，例如，西元2007年9月17日申請之美國專利申請案第11/856,687號、西元2008年4月14日申請之美國專利申請案第12/102,340號、西元2008年11月26日申請之美國專利申請案第12/324,574號和西元2008年4月23日申請之美國專利申請案第12/108,449號所述的彼等電晶體，該等所有申請案以引用的方式併入本文中。此外，若E模態電晶體42的源極和III-N電晶體40的場板彼此電氣相連而非電氣連接至接地(未圖示)，則第10圖所示之組件亦可類似單一高電壓E模態電晶體操作。
第11a圖及第11b圖分別圖示第10圖組件於封裝後的一個可能配置的平面圖和橫截面圖。在圖式中僅包括封裝的相關部件。在此配置中，E模態電晶體42為垂直低電壓Si MOS裝置(FET)，且III-N電晶體40為水平高電壓D模態裝置，其中III-N電晶體40包括接地閘極連接場板28，其直接連接至封裝的接地部分30(以下稱為封裝基底30)。在一些實施例中，E模態電晶體42為III-N裝置，例如，西元2007年9月17日申請之美國專利申請案第11/856,687號、西元2008年4月14日申請之美國專利申請案第12/102,340號、西元2008年11月26日申請之美國專利申請案第12/324,574號和西元2008年4月23日申請之美國專利申請案第12/108,449號所述的彼等裝置。E模態電晶體42分別包括源極64、閘極66和汲極60。E模態電晶體42安裝在托架61上，且托架61安裝在封裝基底30上。在一些實施例中，將一結構安裝於另一結構上包括使用環氧化物或焊料接合結構。托架61至少包含鄰接汲極60的導電層91(例如，金(Au))和鄰接封裝基底30的電絕緣層92(例如，AlN)。絕緣層92電氣隔離E模態電晶體42與封裝基底30。III-N電晶體40分別包括源極14與汲極15，以及連接至場板28的閘極(未圖示)。
在此實施例中，III-N電晶體40的場板28和E模態電晶體42的源極64(例如)藉由利用打線或通孔連接至封裝基底30。托架61的導電層(例如)藉由利用打線或銅帶連接至III-N電晶體40的源極14，藉此確保E模態電晶體42的汲極60電氣連接至III-N電晶體40的源極14。E模態電晶體42的閘極66(例如)藉由利用打線連接至封裝上的閘極引線76。III-N電晶體40的汲極15(例如)藉由利用打線連接至封裝上的汲極引線74。封裝基底30(例如)藉由利用打線或銅帶連接至封裝上的源極引線77。封裝的源極引線77上的端子47可連接至接地。或者，整個封裝基底30可接合至接地材料，而非將其連接至封裝的源極引線77。此外，若端子47不連接至接地(未圖示)，則第11a圖及第11b圖所示之組件亦可類似單一高電壓E模態電晶體操作。
第11圖的封裝組件亦可具有其他配置。例如，若E模態電晶體42以低電壓E模態電晶體替代，其包含位於同一側的閘極與汲極和位於從閘極/汲極形成2DEG的III-N層對側的源極，則低電壓E模態電晶體可直接安裝在封裝基底30上，而在低電壓E模態電晶體與封裝基底30間沒有絕緣體。此不需要托架61。此亦直接將源極連接至封裝基底30，亦即，直接將兩個導電部分連接在一起。
第12圖的組件類似於第10圖的組件，但進一步包括二極體70，其中二極體70的陽極電氣連接至III-N電晶體40的汲極。此組件可用於電路應用，例如，功率因子校正(PFC)。在一些實施例中，二極體70包含III-N材料。例如，二極體70可由與III-N電晶體40相同的III-N材料形成，且二極體70和III-N電晶體40可進一步製造在同一晶片上。以與III-N電晶體之III-N材料相同材料製造的III-N二極體的完整描述可參見西元2008年12月10日申請之美國專利申請案第12/332,284號所述，該案以引用的方式併入本文中。
第13圖所示之實施例包含組件，其包括具接地閘極連接場板的高電壓D模態III-N電晶體40和低電壓二極體71。III-N電晶體的源極電氣連接至二極體的陰極，且二極體的陽極則電氣連接至接地。第13圖的組件類似單一高電壓二極體操作。當節點84處的電壓V84 大於0時，二極體保持為關閉(亦即，逆向偏壓)，且無電流從節點84流向節點87。當V84 大於0但小於|Vth |時，其中|Vth |為III-N電晶體40的臨界電壓強度，III-N電晶體通道不夾止(pinch off)，故所有電壓被二極體71阻斷，且節點85處的電壓V85 約等於V84 。一旦V84 增加超過|Vth |，III-N電晶體40經偏壓關閉，故節點85處的電壓保持為約或略大於|Vth |，且所有額外電壓(亦即，V84 -|Vth |)被III-N電晶體40阻斷。當二極體71正向偏壓成開啟狀態時，電流從節點87流向節點84。為發生此狀況，節點84處的電壓必須小於約-|Von |，其中|Von |為二極體71的啟動電壓。此組件較佳為單一高電壓二極體，因低電壓二極體的啟動電壓通常小於高電壓二極體的啟動電壓，故第13圖的組件的正向傳導損失小於單一高電壓二極體。
在一些實施例中，低電壓二極體71為Si基二極體。在其他實施例中，低電壓二極體71包含III-N材料。在其他實施例中，二極體71包含與III-N電晶體40相同的III-N材料，且二極體71和III-N電晶體40可進一步製造在同一晶片上。
III-N電晶體40能夠阻斷大電壓，例如至少600 V或至少1200 V或電路應用所需的其他適合阻斷電壓。另外，當組件經正向偏壓以使得電流流過二極體71和III-N電晶體40時，節點85處的電壓為約-|Von |。在此等偏壓條件下，III-N電晶體40的閘極-源極電壓VGS40 約等於|Von |。就用於電路應用而言，III-N電晶體40的臨界電壓Vth 必須足夠小於|Von |，以使得當組件處於開啟狀態時，III-N電晶體40可以足夠低的傳導損失傳導從節點87流向節點84的電流。例如，|Von |可為約0.2 V或更少，Vth 可小於-3 V、-5 V或-7 V，且若III-N電晶體40的閘極-源極電壓VGS40 約等於|Von |，則III-N電晶體40能夠傳導10 A或更多電流且傳導損失小於7 W。此外，若低電壓二極體71的陽極和III-N電晶體40的場板彼此電氣相連而非電氣連接至接地(未圖示)，則第13圖所示之組件亦可類似單一高電壓二極體操作。
熟知有益於裝置效能的其他特徵結構亦可包括在第4-8圖的結構中。此等特徵結構包括(但不限於)位於閘極與III-N層間的閘絕緣體、表面鈍化層和位於III-N材料之閘極區中的凹部。此等特徵結構可個別或彼此結合使用。
10．．．基板
11．．．通道層
12．．．阻障層
13、92．．．絕緣層
14、64．．．源極
15、60．．．汲極
16、66．．．閘極
18、28、28’、28”．．．場板
19．．．通道
20-22．．．III-N層
30．．．接地部分/封裝基底
40、42．．．電晶體
44-47、84-85、87．．．節點
61．．．托架
70-71．．．二極體
74．．．汲極引線
76．．．閘極引線
77．．．源極引線
91．．．導電層
第1-3圖為先前技術之III-N HEMT裝置的示意橫截面圖。
第4-8圖為具接地閘極連接場板之半導體電晶體實施例的示意橫截面圖。
第9圖為具接地閘極連接場板之半導體電晶體的電路示意圖。
第10圖為包含兩個電晶體之組件的電路示意圖。
第11a圖及第11b圖分別圖示第10圖所示組件之一實施例的平面示意圖和橫截面圖。
第12圖為包含兩個電晶體和一個二極體之組件的電路示意圖。
第13圖為包含一個電晶體和一個二極體之組件的電路示意圖。
各圖中相同的元件符號指示相同的元件。
10．．．基板
11．．．通道層
12．．．阻障層
13．．．絕緣層
14．．．源極
15．．．汲極
16．．．閘極
19．．．通道
28．．．場板

Claims (23)

  1. 一種第三族氮化物(III-N)基高電子遷移率電晶體(HEMT)，該電晶體包含：一系列III-N層，其形成一個二維電子氣體(2DEG)通道；一閘極，其位於一閘極區中之該系列III-N層的一第一側邊；一場板，其電氣連接至該閘極且由一電絕緣體與該等III-N層分離；及一接地線，其電氣連接至該場板和該閘極，進而形成一閘極連接接地場板。
  2. 如申請專利範圍第1項之電晶體，其中該系列III-N層包括至少三個III-N層，該三個III-N層中之每一者具一不同組合物。
  3. 如申請專利範圍第2項之電晶體，其中該等III-N層中的至少一者為氮化鋁(AlN)。
  4. 如申請專利範圍第2或3項之電晶體，其中該2DEG通道為一第一2DEG通道，該系列III-N層於該系列III-N層之一通道III-N層中形成該第一2DEG通道，且一第二2DEG通道位於該系列III-N層中並平行於該第一2DEG通道。
  5. 如申請專利範圍第1項之電晶體，其進一步包含：一閘極絕緣層，其位於該系列III-N層的該第一側邊且位於該閘極與該系列III-N層之間。
  6. 如申請專利範圍第1項之電晶體，其中一閘極凹部包括在該閘極區中的該系列III-N層中，且至少一部分的該閘極位於該閘極凹部內。
  7. 如申請專利範圍第1項之電晶體，其中該場板具有多個部分，該等部分各自遠離該系列III-N層一不同距離。
  8. 如申請專利範圍第1項之電晶體，其中該接地線為一導電層，該導電層的一側向擴張大於該電晶體的一側向擴張。
  9. 如申請專利範圍第1項之電晶體，其中該場板為一傾斜場板。
  10. 如申請專利範圍第1項之電晶體，其中該電晶體為一空乏模態電晶體。
  11. 一種操作如前述申請專利範圍任一項之電晶體的方法，其包含以下步驟：偏壓該電晶體之一源極和該電晶體之一閘極，其中在偏壓期間，該電晶體之一輸入與一輸出間的電容降得比缺少該閘極連接接地場板之一類似電晶體低。
  12. 一種電路，其包含：如申請專利範圍第1-10項任一項之電晶體，其中該電晶體為一空乏模態電晶體；及一低壓加強模態電晶體，其中該空乏模態電晶體的一源極電氣連接至該加強模態電晶體的一汲極。
  13. 如申請專利範圍第12項之電路，其中該加強模態電晶體的一源極為接地。
  14. 如申請專利範圍第12或13項之電路，其進一步包含：一個二極體，其中該二極體的一陽極電氣連接至該空乏模態電晶體的該汲極。
  15. 一種組件，其包含如申請專利範圍第14項之電路，其中該二極體、該加強模態電晶體和該空乏模態電晶體位於一共用基板上，且該二極體包含III-N材料。
  16. 一種組件，其包含：如申請專利範圍第12或13項之電路；及一基板，其中該基板包括作為該接地線之一導電層，該空乏模態電晶體和該加強模態電晶體附接至該基板，且該加強模態電晶體的一源極電氣連接至該接地線。
  17. 如申請專利範圍第16項之組件，其中：該加強模態電晶體為一垂直裝置；及該空乏模態電晶體為一側向裝置。
  18. 如申請專利範圍第17項之組件，其中一絕緣層位於該加強模態電晶體與該基板之間，該絕緣層電氣隔離該加強模態電晶體與該基板。
  19. 如申請專利範圍第16-18項任一項之組件，其中：該加強模態電晶體為一垂直裝置，其具有一閘極、位於該電晶體中一系列層一側的該汲極和位於該系列層一對側的一源極，且該加強模態電晶體的該源極直接安裝在該基板的該接地線上。
  20. 如申請專利範圍第16項之組件，其進一步包含：該基板上的一源極引線、一閘極引線和一汲極引線，其中：該源極引線電氣連接至該基板的該導電層；該閘極引線電氣連接至該加強模態電晶體的該閘極且與該基板的該導電層電氣絕緣；及該汲極引線電氣連接至該空乏模態電晶體的該汲極且與該基板的該導電層電氣絕緣。
  21. 一種電路，其包含：如申請專利範圍第1項之電晶體；及一個二極體，其中該電晶體的一源極電氣連接至該二極體的一陰極。
  22. 如申請專利範圍第21項之電路，其中該二極體的一陽極電氣連接至該接地線。
  23. 一種組件，其包含如申請專利範圍第21或22項之電路，其中該二極體和該電晶體位於一共用基板上，且該二極體包含一III-N材料。
TW099103836A 2009-02-09 2010-02-08 第三族氮化物裝置和電路 TWI475691B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/368,248 US7884394B2 (en) 2009-02-09 2009-02-09 III-nitride devices and circuits

Publications (2)

Publication Number Publication Date
TW201036155A TW201036155A (en) 2010-10-01
TWI475691B true TWI475691B (zh) 2015-03-01

Family

ID=42539936

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099103836A TWI475691B (zh) 2009-02-09 2010-02-08 第三族氮化物裝置和電路

Country Status (6)

Country Link
US (1) US7884394B2 (zh)
EP (1) EP2394303A4 (zh)
JP (1) JP2012517699A (zh)
CN (1) CN102308387A (zh)
TW (1) TWI475691B (zh)
WO (1) WO2010090885A2 (zh)

Families Citing this family (83)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7501669B2 (en) 2003-09-09 2009-03-10 Cree, Inc. Wide bandgap transistor devices with field plates
US9773877B2 (en) 2004-05-13 2017-09-26 Cree, Inc. Wide bandgap field effect transistors with source connected field plates
US11791385B2 (en) 2005-03-11 2023-10-17 Wolfspeed, Inc. Wide bandgap transistors with gate-source field plates
US7915643B2 (en) 2007-09-17 2011-03-29 Transphorm Inc. Enhancement mode gallium nitride power devices
US20090072269A1 (en) * 2007-09-17 2009-03-19 Chang Soo Suh Gallium nitride diodes and integrated components
US7965126B2 (en) 2008-02-12 2011-06-21 Transphorm Inc. Bridge circuits and their components
US8519438B2 (en) 2008-04-23 2013-08-27 Transphorm Inc. Enhancement mode III-N HEMTs
US8289065B2 (en) 2008-09-23 2012-10-16 Transphorm Inc. Inductive load power switching circuits
US7898004B2 (en) 2008-12-10 2011-03-01 Transphorm Inc. Semiconductor heterostructure diodes
US8742459B2 (en) 2009-05-14 2014-06-03 Transphorm Inc. High voltage III-nitride semiconductor devices
US8390000B2 (en) 2009-08-28 2013-03-05 Transphorm Inc. Semiconductor devices with field plates
US8138529B2 (en) 2009-11-02 2012-03-20 Transphorm Inc. Package configurations for low EMI circuits
US8389977B2 (en) 2009-12-10 2013-03-05 Transphorm Inc. Reverse side engineered III-nitride devices
US8816497B2 (en) 2010-01-08 2014-08-26 Transphorm Inc. Electronic devices and components for high efficiency power circuits
US8624662B2 (en) 2010-02-05 2014-01-07 Transphorm Inc. Semiconductor electronic components and circuits
KR101774933B1 (ko) * 2010-03-02 2017-09-06 삼성전자 주식회사 듀얼 디플리션을 나타내는 고 전자 이동도 트랜지스터 및 그 제조방법
US8742460B2 (en) * 2010-12-15 2014-06-03 Transphorm Inc. Transistors with isolation regions
US8643062B2 (en) 2011-02-02 2014-02-04 Transphorm Inc. III-N device structures and methods
JP5776217B2 (ja) * 2011-02-24 2015-09-09 富士通株式会社 化合物半導体装置
US8786327B2 (en) 2011-02-28 2014-07-22 Transphorm Inc. Electronic components with reactive filters
US8716141B2 (en) * 2011-03-04 2014-05-06 Transphorm Inc. Electrode configurations for semiconductor devices
US8772842B2 (en) 2011-03-04 2014-07-08 Transphorm, Inc. Semiconductor diodes with low reverse bias currents
WO2013005372A1 (ja) * 2011-07-01 2013-01-10 パナソニック株式会社 半導体装置
US8710511B2 (en) 2011-07-29 2014-04-29 Northrop Grumman Systems Corporation AIN buffer N-polar GaN HEMT profile
US8674372B2 (en) * 2011-08-19 2014-03-18 Infineon Technologies Austria Ag HEMT with integrated low forward bias diode
US8901604B2 (en) 2011-09-06 2014-12-02 Transphorm Inc. Semiconductor devices with guard rings
US9257547B2 (en) 2011-09-13 2016-02-09 Transphorm Inc. III-N device structures having a non-insulating substrate
US8598937B2 (en) 2011-10-07 2013-12-03 Transphorm Inc. High power semiconductor electronic components with increased reliability
US9209176B2 (en) 2011-12-07 2015-12-08 Transphorm Inc. Semiconductor modules and methods of forming the same
US20130146943A1 (en) * 2011-12-12 2013-06-13 John P. EDWARDS In situ grown gate dielectric and field plate dielectric
US10002957B2 (en) * 2011-12-21 2018-06-19 Power Integrations, Inc. Shield wrap for a heterostructure field effect transistor
US9165766B2 (en) 2012-02-03 2015-10-20 Transphorm Inc. Buffer layer structures suited for III-nitride devices with foreign substrates
US8648643B2 (en) 2012-02-24 2014-02-11 Transphorm Inc. Semiconductor power modules and devices
US9093366B2 (en) 2012-04-09 2015-07-28 Transphorm Inc. N-polar III-nitride transistors
US9184275B2 (en) 2012-06-27 2015-11-10 Transphorm Inc. Semiconductor devices with integrated hole collectors
US8803246B2 (en) 2012-07-16 2014-08-12 Transphorm Inc. Semiconductor electronic components with integrated current limiters
US20140021934A1 (en) * 2012-07-17 2014-01-23 Transphorm, Inc. Devices and components for power conversion circuits
CN103824845B (zh) * 2012-11-19 2017-08-29 台达电子工业股份有限公司 半导体装置
US9799762B2 (en) 2012-12-03 2017-10-24 Infineon Technologies Ag Semiconductor device and method of manufacturing a semiconductor device
US9171837B2 (en) 2012-12-17 2015-10-27 Nxp B.V. Cascode circuit
US9171730B2 (en) 2013-02-15 2015-10-27 Transphorm Inc. Electrodes for semiconductor devices and methods of forming the same
US9087718B2 (en) 2013-03-13 2015-07-21 Transphorm Inc. Enhancement-mode III-nitride devices
US9245992B2 (en) 2013-03-15 2016-01-26 Transphorm Inc. Carbon doping semiconductor devices
US8907378B2 (en) * 2013-03-15 2014-12-09 Mitsubishi Electric Research Laboratories, Inc. High electron mobility transistor with multiple channels
JP2014187086A (ja) 2013-03-22 2014-10-02 Toshiba Corp 半導体装置
US9059076B2 (en) 2013-04-01 2015-06-16 Transphorm Inc. Gate drivers for circuits based on semiconductor devices
US9755059B2 (en) 2013-06-09 2017-09-05 Cree, Inc. Cascode structures with GaN cap layers
US9847411B2 (en) * 2013-06-09 2017-12-19 Cree, Inc. Recessed field plate transistor structures
US9679981B2 (en) 2013-06-09 2017-06-13 Cree, Inc. Cascode structures for GaN HEMTs
WO2015006111A1 (en) 2013-07-09 2015-01-15 Transphorm Inc. Multilevel inverters and their components
US9443938B2 (en) 2013-07-19 2016-09-13 Transphorm Inc. III-nitride transistor including a p-type depleting layer
US9443787B2 (en) * 2013-08-09 2016-09-13 Infineon Technologies Austria Ag Electronic component and method
US9306058B2 (en) * 2013-10-02 2016-04-05 Infineon Technologies Ag Integrated circuit and method of manufacturing an integrated circuit
US9287404B2 (en) 2013-10-02 2016-03-15 Infineon Technologies Austria Ag Semiconductor device and method of manufacturing a semiconductor device with lateral FET cells and field plates
US9401399B2 (en) 2013-10-15 2016-07-26 Infineon Technologies Ag Semiconductor device
US9048838B2 (en) * 2013-10-30 2015-06-02 Infineon Technologies Austria Ag Switching circuit
US9166006B1 (en) * 2013-12-08 2015-10-20 Iman Rezanezhad Gatabi Methods to improve the performance of compound semiconductor devices and field effect transistors
US20150340483A1 (en) * 2014-05-21 2015-11-26 International Rectifier Corporation Group III-V Device Including a Shield Plate
US9543940B2 (en) 2014-07-03 2017-01-10 Transphorm Inc. Switching circuits having ferrite beads
US9590494B1 (en) 2014-07-17 2017-03-07 Transphorm Inc. Bridgeless power factor correction circuits
US9318593B2 (en) 2014-07-21 2016-04-19 Transphorm Inc. Forming enhancement mode III-nitride devices
CN104332498B (zh) * 2014-09-01 2018-01-05 苏州捷芯威半导体有限公司 一种斜场板功率器件及斜场板功率器件的制备方法
CN104241400B (zh) * 2014-09-05 2017-03-08 苏州捷芯威半导体有限公司 场效应二极管及其制备方法
US10290566B2 (en) * 2014-09-23 2019-05-14 Infineon Technologies Austria Ag Electronic component
US9536967B2 (en) 2014-12-16 2017-01-03 Transphorm Inc. Recessed ohmic contacts in a III-N device
US9536966B2 (en) 2014-12-16 2017-01-03 Transphorm Inc. Gate structures for III-N devices
US10200030B2 (en) 2015-03-13 2019-02-05 Transphorm Inc. Paralleling of switching devices for high power circuits
DE102015117394B4 (de) * 2015-10-13 2020-06-18 Infineon Technologies Austria Ag Halbleiterbauelement
JP6888013B2 (ja) 2016-01-15 2021-06-16 トランスフォーム テクノロジー，インコーポレーテッド ＡＬ（１−ｘ）Ｓｉ（ｘ）Ｏゲート絶縁体を有するエンハンスメントモードＩＩＩ族窒化物デバイス
US9929261B2 (en) 2016-04-07 2018-03-27 Semiconductor Components Industries, Llc Electronic device including a HEMT with a segmented gate electrode
WO2017210323A1 (en) 2016-05-31 2017-12-07 Transphorm Inc. Iii-nitride devices including a graded depleting layer
US10319648B2 (en) 2017-04-17 2019-06-11 Transphorm Inc. Conditions for burn-in of high power semiconductors
CN107507858B (zh) * 2017-08-28 2021-04-20 电子科技大学 一种限流二极管
US10630285B1 (en) 2017-11-21 2020-04-21 Transphorm Technology, Inc. Switching circuits having drain connected ferrite beads
WO2019139621A1 (en) * 2018-01-12 2019-07-18 Intel Corporation Transistors including first and second semiconductor materials between source and drain regions and methods of manufacturing the same
CN116247078A (zh) * 2018-06-20 2023-06-09 顶诺微电子(无锡)有限公司 一种混合沟道化合物半导体器件
US10756207B2 (en) 2018-10-12 2020-08-25 Transphorm Technology, Inc. Lateral III-nitride devices including a vertical gate module
US11810971B2 (en) 2019-03-21 2023-11-07 Transphorm Technology, Inc. Integrated design for III-Nitride devices
US11239802B2 (en) 2019-10-02 2022-02-01 Wolfspeed, Inc. Radio frequency transistor amplifiers having engineered instrinsic capacitances for improved performance
CN110828565B (zh) * 2019-10-30 2022-03-15 杭州电子科技大学 一种具有p型埋层的双沟道高耐压氮化镓场效应晶体管
US11749656B2 (en) 2020-06-16 2023-09-05 Transphorm Technology, Inc. Module configurations for integrated III-Nitride devices
US20230299190A1 (en) 2020-08-05 2023-09-21 Transphorm Technology, Inc. Iii-nitride devices including a depleting layer
US11387095B2 (en) * 2020-08-21 2022-07-12 Infineon Technologies Austria Ag Passivation structuring and plating for semiconductor devices

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200516773A (en) * 2003-09-09 2005-05-16 Cree Inc Wide bandgap transistor devices with field plates
TW200618278A (en) * 2004-05-11 2006-06-01 Cree Inc Wide bandgap HEMts with source connected field plates
TW200627627A (en) * 2004-09-24 2006-08-01 Koninkl Philips Electronics Nv Enhancement-depletion field effect transistor structure and method of manufacture
TW200746414A (en) * 2006-06-05 2007-12-16 Win Semiconductors Corp A structure and a method for monolithic integration of HBT, depletion-mode HEMT and enhancement-mode HEMT on the same substrate
TW200830550A (en) * 2006-08-18 2008-07-16 Univ California High breakdown enhancement mode gallium nitride based high electron mobility transistors with integrated slant field plate

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6028348A (en) * 1993-11-30 2000-02-22 Texas Instruments Incorporated Low thermal impedance integrated circuit
JP4385205B2 (ja) 2002-12-16 2009-12-16 日本電気株式会社 電界効果トランジスタ
KR100573720B1 (ko) * 2003-01-29 2006-04-26 가부시끼가이샤 도시바 전력 반도체소자
US7501669B2 (en) * 2003-09-09 2009-03-10 Cree, Inc. Wide bandgap transistor devices with field plates
JP2005159117A (ja) * 2003-11-27 2005-06-16 Toshiba Corp 窒化物系半導体装置
US20070164326A1 (en) * 2004-02-20 2007-07-19 Yasuhiro Okamoto Field effect transistor
JP2006032552A (ja) 2004-07-14 2006-02-02 Toshiba Corp 窒化物含有半導体装置
US7548112B2 (en) 2005-07-21 2009-06-16 Cree, Inc. Switch mode power amplifier using MIS-HEMT with field plate extension
JP2007250792A (ja) * 2006-03-15 2007-09-27 Furukawa Electric Co Ltd:The 半導体素子
DE112007000667T5 (de) 2006-03-20 2009-01-29 International Rectifier Corp., El Segundo Vereinigter Gate-Kaskoden-Transistor
PL2080228T3 (pl) * 2006-10-04 2021-04-19 Leonardo S.P.A. Urządzenie mocy pseudomorficznego tranzystora o wysokiej ruchliwości elektronów (phemt) z zasilaniem jednonapięciowym i sposób jego wytwarzania
JP5358882B2 (ja) * 2007-02-09 2013-12-04 サンケン電気株式会社 整流素子を含む複合半導体装置
US7501670B2 (en) * 2007-03-20 2009-03-10 Velox Semiconductor Corporation Cascode circuit employing a depletion-mode, GaN-based FET
JP2008288289A (ja) 2007-05-16 2008-11-27 Oki Electric Ind Co Ltd 電界効果トランジスタとその製造方法
US8502323B2 (en) 2007-08-03 2013-08-06 The Hong Kong University Of Science And Technology Reliable normally-off III-nitride active device structures, and related methods and systems

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200516773A (en) * 2003-09-09 2005-05-16 Cree Inc Wide bandgap transistor devices with field plates
TW200618278A (en) * 2004-05-11 2006-06-01 Cree Inc Wide bandgap HEMts with source connected field plates
TW200627627A (en) * 2004-09-24 2006-08-01 Koninkl Philips Electronics Nv Enhancement-depletion field effect transistor structure and method of manufacture
TW200746414A (en) * 2006-06-05 2007-12-16 Win Semiconductors Corp A structure and a method for monolithic integration of HBT, depletion-mode HEMT and enhancement-mode HEMT on the same substrate
TW200830550A (en) * 2006-08-18 2008-07-16 Univ California High breakdown enhancement mode gallium nitride based high electron mobility transistors with integrated slant field plate

Also Published As

Publication number Publication date
WO2010090885A3 (en) 2010-10-21
TW201036155A (en) 2010-10-01
CN102308387A (zh) 2012-01-04
EP2394303A4 (en) 2013-04-17
US20100201439A1 (en) 2010-08-12
JP2012517699A (ja) 2012-08-02
US7884394B2 (en) 2011-02-08
EP2394303A2 (en) 2011-12-14
WO2010090885A2 (en) 2010-08-12

Similar Documents

Publication Publication Date Title
TWI475691B (zh) 第三族氮化物裝置和電路
US9991884B2 (en) Switching circuits having ferrite beads
KR101539531B1 (ko) 반도체 장치
US10290566B2 (en) Electronic component
KR101737149B1 (ko) 낮은 ｅｍｉ 회로를 위한 전자 부품, 전자 부품 형성 방법, 어셈블리, 하프 브리지 및 브리지 회로
US9184243B2 (en) Monolithic composite III-nitride transistor with high voltage group IV enable switch
US8987833B2 (en) Stacked composite device including a group III-V transistor and a group IV lateral transistor
US20160240470A1 (en) Semiconductor modules and methods of forming the same
US9324645B2 (en) Method and system for co-packaging vertical gallium nitride power devices
US11810971B2 (en) Integrated design for III-Nitride devices
JP2006351691A (ja) 半導体装置
US10135337B2 (en) Semiconductor device
US11631741B2 (en) Semiconductor device
US20120256190A1 (en) Stacked Composite Device Including a Group III-V Transistor and a Group IV Diode
TW202433708A (zh) 用於三族氮化物元件的整合設計
CN116075925A (zh) 具有贯通通路结构的iii-氮化物器件
WO2024167620A1 (en) Configurations for four quadrant iii-nitride switches