TWI470746B - 具有圍阻特徵之三維半導體晶粒結構及方法 - Google Patents
具有圍阻特徵之三維半導體晶粒結構及方法 Download PDFInfo
- Publication number
- TWI470746B TWI470746B TW97147705A TW97147705A TWI470746B TW I470746 B TWI470746 B TW I470746B TW 97147705 A TW97147705 A TW 97147705A TW 97147705 A TW97147705 A TW 97147705A TW I470746 B TWI470746 B TW I470746B
- Authority
- TW
- Taiwan
- Prior art keywords
- die
- opening
- forming
- plating
- contact
- Prior art date
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
- H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
- H10W72/01233—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
- H10W72/01235—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
- H10W72/01251—Changing the shapes of bumps
- H10W72/01255—Changing the shapes of bumps by using masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
- H10W72/01251—Changing the shapes of bumps
- H10W72/01257—Changing the shapes of bumps by reflowing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
- H10W72/01931—Manufacture or treatment of bond pads using blanket deposition
- H10W72/01938—Manufacture or treatment of bond pads using blanket deposition in gaseous form, e.g. by CVD or PVD
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
- H10W72/01951—Changing the shapes of bond pads
- H10W72/01953—Changing the shapes of bond pads by etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07221—Aligning
- H10W72/07227—Aligning involving guiding structures, e.g. spacers or supporting members
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
- H10W72/07255—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/221—Structures or relative sizes
- H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/221—Structures or relative sizes
- H10W72/227—Multiple bumps having different sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
- H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
- H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
- H10W72/2528—Intermetallic compounds
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/261—Functions other than electrical connecting
- H10W72/263—Providing mechanical bonding or support, e.g. dummy bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/261—Functions other than electrical connecting
- H10W72/267—Multiple bump connectors having different functions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/281—Auxiliary members
- H10W72/285—Alignment aids, e.g. alignment marks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/944—Dispositions of multiple bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/966,077 US7811932B2 (en) | 2007-12-28 | 2007-12-28 | 3-D semiconductor die structure with containing feature and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200939413A TW200939413A (en) | 2009-09-16 |
| TWI470746B true TWI470746B (zh) | 2015-01-21 |
Family
ID=40797182
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW97147705A TWI470746B (zh) | 2007-12-28 | 2008-12-08 | 具有圍阻特徵之三維半導體晶粒結構及方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US7811932B2 (https=) |
| EP (1) | EP2232549B1 (https=) |
| JP (1) | JP5234696B2 (https=) |
| KR (1) | KR101558194B1 (https=) |
| CN (1) | CN101911289B (https=) |
| TW (1) | TWI470746B (https=) |
| WO (1) | WO2009085609A2 (https=) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7612443B1 (en) * | 2003-09-04 | 2009-11-03 | University Of Notre Dame Du Lac | Inter-chip communication |
| US8293587B2 (en) | 2007-10-11 | 2012-10-23 | International Business Machines Corporation | Multilayer pillar for reduced stress interconnect and method of making same |
| US8441123B1 (en) * | 2009-08-13 | 2013-05-14 | Amkor Technology, Inc. | Semiconductor device with metal dam and fabricating method |
| EP2398046A1 (en) * | 2010-06-18 | 2011-12-21 | Nxp B.V. | Integrated circuit package with a copper-tin joining layer and manufacturing method thereof |
| DE102010040065B4 (de) * | 2010-08-31 | 2015-07-23 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Verspannungsreduktion in einem Chipgehäuse unter Anwendung eines Chip-Gehäuse-Verbindungsschemas bei geringer Temperatur |
| US8907485B2 (en) | 2012-08-24 | 2014-12-09 | Freescale Semiconductor, Inc. | Copper ball bond features and structure |
| US8907488B2 (en) | 2012-12-28 | 2014-12-09 | Broadcom Corporation | Microbump and sacrificial pad pattern |
| JP6466594B2 (ja) | 2014-12-17 | 2019-02-06 | アルファ・アセンブリー・ソリューションズ・インコーポレイテッドAlpha Assembly Solutions Inc. | ダイとクリップの接着方法 |
| US9713264B2 (en) | 2014-12-18 | 2017-07-18 | Intel Corporation | Zero-misalignment via-pad structures |
| US10076034B2 (en) * | 2016-10-26 | 2018-09-11 | Nanya Technology Corporation | Electronic structure |
| US10475736B2 (en) | 2017-09-28 | 2019-11-12 | Intel Corporation | Via architecture for increased density interface |
| US10217718B1 (en) * | 2017-10-13 | 2019-02-26 | Denselight Semiconductors Pte. Ltd. | Method for wafer-level semiconductor die attachment |
| JP7251951B2 (ja) * | 2018-11-13 | 2023-04-04 | 新光電気工業株式会社 | 半導体装置及び半導体装置の製造方法 |
| US11862593B2 (en) * | 2021-05-07 | 2024-01-02 | Microsoft Technology Licensing, Llc | Electroplated indium bump stacks for cryogenic electronics |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070013063A1 (en) * | 2005-06-23 | 2007-01-18 | Intel Corporation | Self alignment features for an electronic assembly |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3138343B2 (ja) | 1992-09-30 | 2001-02-26 | 日本電信電話株式会社 | 光モジュールの製造方法 |
| JPH06310565A (ja) * | 1993-04-20 | 1994-11-04 | Fujitsu Ltd | フリップチップボンディング方法 |
| US5767580A (en) * | 1993-04-30 | 1998-06-16 | Lsi Logic Corporation | Systems having shaped, self-aligning micro-bump structures |
| US5903059A (en) * | 1995-11-21 | 1999-05-11 | International Business Machines Corporation | Microconnectors |
| KR19980025889A (ko) | 1996-10-05 | 1998-07-15 | 김광호 | 중합체층이 개재된 반도체 칩과 기판 간의 범프 접속 구조 |
| JP2845847B2 (ja) * | 1996-11-12 | 1999-01-13 | 九州日本電気株式会社 | 半導体集積回路 |
| US6965166B2 (en) * | 1999-02-24 | 2005-11-15 | Rohm Co., Ltd. | Semiconductor device of chip-on-chip structure |
| US6586266B1 (en) * | 1999-03-01 | 2003-07-01 | Megic Corporation | High performance sub-system design and assembly |
| US6365967B1 (en) * | 1999-05-25 | 2002-04-02 | Micron Technology, Inc. | Interconnect structure |
| US7087458B2 (en) * | 2002-10-30 | 2006-08-08 | Advanpack Solutions Pte. Ltd. | Method for fabricating a flip chip package with pillar bump and no flow underfill |
| EP1734570A4 (en) * | 2004-03-02 | 2008-03-05 | Fuji Electric Holdings | Method for encapsulating an electronic component |
| JP4331053B2 (ja) * | 2004-05-27 | 2009-09-16 | 株式会社東芝 | 半導体記憶装置 |
| US7348210B2 (en) * | 2005-04-27 | 2008-03-25 | International Business Machines Corporation | Post bump passivation for soft error protection |
| US7781886B2 (en) * | 2005-06-14 | 2010-08-24 | John Trezza | Electronic chip contact structure |
| US7332423B2 (en) * | 2005-06-29 | 2008-02-19 | Intel Corporation | Soldering a die to a substrate |
| KR100722739B1 (ko) * | 2005-11-29 | 2007-05-30 | 삼성전기주식회사 | 페이스트 범프를 이용한 코어기판, 다층 인쇄회로기판 및코어기판 제조방법 |
-
2007
- 2007-12-28 US US11/966,077 patent/US7811932B2/en active Active
-
2008
- 2008-12-08 TW TW97147705A patent/TWI470746B/zh not_active IP Right Cessation
- 2008-12-10 EP EP08867823.0A patent/EP2232549B1/en not_active Not-in-force
- 2008-12-10 JP JP2010540740A patent/JP5234696B2/ja active Active
- 2008-12-10 CN CN2008801227000A patent/CN101911289B/zh not_active Expired - Fee Related
- 2008-12-10 KR KR1020107013959A patent/KR101558194B1/ko not_active Expired - Fee Related
- 2008-12-10 WO PCT/US2008/086174 patent/WO2009085609A2/en not_active Ceased
-
2010
- 2010-09-08 US US12/877,193 patent/US8581383B2/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070013063A1 (en) * | 2005-06-23 | 2007-01-18 | Intel Corporation | Self alignment features for an electronic assembly |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101911289B (zh) | 2012-10-03 |
| EP2232549A2 (en) | 2010-09-29 |
| EP2232549A4 (en) | 2011-04-06 |
| KR101558194B1 (ko) | 2015-10-07 |
| US7811932B2 (en) | 2010-10-12 |
| CN101911289A (zh) | 2010-12-08 |
| US8581383B2 (en) | 2013-11-12 |
| TW200939413A (en) | 2009-09-16 |
| EP2232549B1 (en) | 2018-09-19 |
| WO2009085609A3 (en) | 2009-09-03 |
| WO2009085609A2 (en) | 2009-07-09 |
| US20100327440A1 (en) | 2010-12-30 |
| KR20100102132A (ko) | 2010-09-20 |
| JP5234696B2 (ja) | 2013-07-10 |
| US20090166888A1 (en) | 2009-07-02 |
| JP2011508451A (ja) | 2011-03-10 |
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| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |