TWI467363B - 協同處理器及系統之效能與電力管理 - Google Patents

協同處理器及系統之效能與電力管理 Download PDF

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TWI467363B
TWI467363B TW101142626A TW101142626A TWI467363B TW I467363 B TWI467363 B TW I467363B TW 101142626 A TW101142626 A TW 101142626A TW 101142626 A TW101142626 A TW 101142626A TW I467363 B TWI467363 B TW I467363B
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performance
platform
values
processor
power management
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TW201337537A (zh
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Guy M Therien
Paul S Diefenbaugh
Anil Aggarwal
Andrew D Henroid
Jeremy J Shrall
Efraim Rotem
Krishnakanth Sistla
Eliezer Weissmann
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Intel Corp
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Description

協同處理器及系統之效能與電力管理
此申請案請求2011年11月22日所提出的美國臨時專利申請案第61563030號的益處且在此處以引用方式併入。
本發明一般關於運算系統且尤其關於平台電力及效能管理方法與系統。
第1圖為顯示了具有基於OSPM(OS導向的組態及電力管理)的作業系統(之後簡稱OS)之運算平台的圖。OSPM設計可包括促進一介面致能運算平台中的處理器之作業系統(OS)導向電力管理的任何合適電力管理系統、介面、及/或規格。此種OSPM設計包括但不限於ACPI(先進組態與電源介面)規格實施方式。
在第1圖中,有執行作業系統(OS)110的硬體平台130(例如,平板、膝上型PC、伺服器),其除了別的以外還經由基於OSPM的電力管理介面120來實施OSPM。平台130包含平台硬體132及BIOS 134。該OS包含核心112、OSPM系統114、裝置驅動程式116、及電力管理介面驅動程式118,如所示加以耦接。OSPM介面120表示包括共用暫存器介面空間的共用介面空間。其一般可包括電力管理暫存器122、BIOS介面資料結構124及/或一或更多個電力管理表126。這些電力管理介面組件可由 OSPM存取(例如經由電力管理驅動程式118),而用以寫入及讀取用於該平台硬體的電力管理資料(例如,寫入控制資料及讀取性能與回饋資料)。
第2圖顯示了依據ACPI實施方式的實施例之處理器效能狀態圖。(注意到,此揭示為了便利主要藉由使用ACPI作為範例實施方式來呈現電力管理概念,但本發明非局限於此)。對該等處理器的主OSPM控制為處理器功率狀態(C0、C1、C2、C3、...Cn)、處理器時脈節流、及處理器效能狀態。處理器效能狀態(Px)如此處所使用包含習知Pn狀態(像是P0、P1等)及CPPC(協同處理器效能控制)效能控制(針對本發明加以討論於下)。這些控制可由OSPM加以組合使用,以達成有時互相矛盾的目標間之想要平衡,包括效能、功率消耗與電池壽命、熱要求、及噪音位準要求。因為該等目標互相影響,該作業軟體需要實施關於何時何處作出該等目標間的權衡之策略。
ACPI定義系統處理器的功率狀態,而在G0工作狀態2中為活動(執行中)或者睡眠(非執行中)。處理器功率狀態倍標記為C0、C1、C2、C3、...Cn。C0功率狀態為CPU執行指令的活動功率狀態。C1至Cn功率狀態為比起留在C0狀態中時處理器消耗較少電力且耗散較少熱的處理器睡眠狀態。儘管處於睡眠狀態,該處理器一般將不執行指令。
在過去,處理器效能控制(Pn狀態控制)主要影響 在處理器頻率方面的處理器效能,其一般對應於處理器效能能力。該OSPM將作出效能狀態請求(例如,P0具特定頻率選擇),且可預期該處理器提供某一操作頻率或頻率範圍。然而已經理解的是,頻率不必然正比於處理器可實施的工作量,尤其針對所有情境。即,儘管處理器頻率為該處理器完成工作的速率之粗略近似,工作負載效能不保證隨著頻率縮放。因此,並非規定處理器效能的特定度量,CPPC(協同處理器效能控制)將確切效能度量的定義留給該平台。
該平台例如可選擇使用諸如處理器頻率的單一度量,或其可選擇混合多個硬體度量(例如,頻率、時間、指令率等)來產生合成的效能測量值。以此方式,該平台較隨意輸送OSPM請求的效能位準而不必輸送特定處理器頻率,至少連續一段時間。此例如容許符合OSPM預期且在同時達成較有效的省電。
協同處理器效能控制(CPPC)定義簡要及彈性的機制以供OSPM協同該平台中的實體來管理該處理器的效能。在此設計中,該平台實體負責產生及維持支持連續(或至少準連續)效能標度(例如,無單位效能標度)的效能定義。在執行期間,該OSPM請求對此標度的效能(例如,其請求從介於0與2000、介於1與100、或諸如此類的值),且該平台實體負責轉譯該OSPM效能請求而成為實際硬體效能狀態。
在一些實施例中,該OSPM不應假設該平台所呈現之 效能值的確切意義、或它們如何關連於特定硬體度量(像是處理器頻率)。反之,該OSPM可例如在起動或處理器熱插拔時執行特性常式來對特定平台標度的可用效能值評估被提供的效能(例如,頻率或基準、處理率等)。
參照第3圖,用以實施該電力管理介面以供該OSPM控制該平台電力管理系統的控制結構(例如,暫存器)可用任何合適方式加以完成。例如,該等控制方法可由記憶體映射IO加以實施或由特定實體暫存器加以實施,諸如由MSR(模式特定暫存器)、其他匯流排或傳輸器上(例如,在SMBus、PECI介面、平台通訊頻道等上)的暫存器、虛擬暫存器、或相似者。(注意到MSR典型上非記憶體空間的一部份,但反而例如可能存在於諸如處理器暫存器的硬體中而對其讀取/寫入一或更多個指令)。此提供充足的彈性,使得該OS可與該處理器本身、該平台晶片組、或個別實體(例如,基板管理控制器)通訊。
第3圖為顯示具有OSPM的平台之圖,示出該OS可與該平台通訊以管理效能的這些不同方式。在此實施例中,處理器305具有MSR 307、功率控制單元(PCU)309、核心頻率與VID控制311、及MSR/PECI介面313以控制效能及功率消耗。OS 330經由其基於ACPI的電力管理系統(其基於ACPI的OSPM)管理該平台的電力及效能。硬體平台(HWP)介面320促進該OS與平台處理器305間的通訊,藉此使該OS能夠監看處理器功率管理。(注意到MSR/PECI介面313可被視為HWP介面320 的一部份(但為了便利而被個別顯示),耦接至任選的BMC連接)。
參照第4及5圖,藉由使用電力管理介面暫存器(該平台及OS兩者可存取)來實施彈性電力管理設計的一般方法將被描述。第4圖顯示了依據一些實施例之平台促進彈性電力管理設計的一般常式402,如此處所討論。第5圖顯示電力管理暫存器,其可在PM暫存器空間122(從第1圖)中或以任何其他合適方式加以實施。該等介面暫存器包含一或更多個性能暫存器502、一或更多個控制暫存器504、及一或更多個回饋暫存器506。
性能暫存器502一般被用來指出待由該OS所讀取的效能標度參數、性能、臨現值等,使得其可決定如何管理電力及效能。控制暫存器504一般由該OSPM所寫入,以指出從該平台處理器之所請求/所想要的效能以及管理限制。最終,回饋暫存器506指出例如待由該OS所讀取之被輸送的效能(估計的或量測的/監測的效能)參數,使得其可決定是否該被輸送的效能足夠接近所請求/所想要的效能。
參照常式402,最初在404,效能能力被載入至性能暫存器中。此可包含資料被傳輸(例如,從BIOS記憶體)至該等性能暫存器、或從任何其他合適地方,或該等暫存器可能在製造步驟期間已經被載入(例如,使用熔絲或相似者)。這些性能可指出該簡要效能標度範圍、臨限值(諸如保證對非保證臨限值)、及其他參數。在406, (例如,在控制暫存器已經由該OSPM所寫入以後),該平台從該等控制暫存器讀取控制值。在408,該平台接著(例如,經由PCU或類似單元)控制該處理器而嘗試在已知該等限制下提供該所請求效能。如同將於下(尤其對於ACPI實施方式)提出更多,其可能(如果在非保證範圍中)或其在合理可能時將會(如果在保證範圍中且沒有任何覆寫限制(例如熱))提供該所請求效能。此可能意指在指定的一段時間期間提供平均效能位準(在指定的容限內)。
依據ACPI規格,以及依據一些實施例,CPC(連續效能控制)物件(ACPI中的_CPC物件或任何其他合適物件)可被使用。此物件可宣告一介面,其容許OSPM根據連續範圍的可容許值來轉變該處理器至效能狀態中。該OS可寫入所想要的效能值至效能位準(例如,ACPI中的「想要的效能暫存器」),且該平台將接著映射所請求效能位準至內部效能狀態。
表1(以及第8圖,CPC物件)顯示用於此CPC介面的範例封裝。
該_CPC物件所傳達的暫存器將提供特定平台效能能力/臨限值給OSPM以及OSPM使用的控制暫存器控制該平台處理器效能設定值提供給。這些在後續的段落中加以進一步描述。表2便利地列出該CPC物件所提供之由該OS用來管理平台電力與效能的暫存器。
有不同暫存器類型,包括性能/臨限值暫存器、控制暫存器、及回饋暫存器。該等性能/臨限值暫存器指出討論中的處理器之可用效能參數。它們可由處理器OEM、或由與該處理器的功率/效能能力關聯的一些其他適當實體加以直接或間接填充。該等控制暫存器可由該OS加以填充而使它藉由從該平台請求效能參數來控制效能,且該等回饋暫存器從該平台提供效能資料至該OS,使得它可決定是否想要的及/或預期的效能被輸送(注意到此為一種效能的處理器本地定義-類似於詢問-你是否將我所要求的效能給我?)。可能有其他暫存器,其也可被提出。表2列出ACPI實施方式中所使用的一些暫存器。
第6圖顯示了依據一些實施例的相對效能位準標度。基於效能的控制是在處理器效能位準的連續範圍上操作而非離散處理器狀態。結果,平台性能及OS請求可能在效能臨限值方面加以指定。第6圖圖形示出該平台的這些效能臨限值。它們也被討論於下。(注意到非所有效能位準需要為唯一。平台的標稱效能位準也可為例如其最高效能位準。此外,儘管該平台可指定暫存器大小於可容許範圍內,該等性能/臨限值暫存器的大小應相容於該等控制暫存氣的大小,進一步討論於下。此外,在一些實施例中,如果該平台支援CPPC、該CPC物件應存在於所有該等處 理器物件下方。即,可能未預期該OSPM會支援混合模式,例如,在同時的CPPC及傳統PSS以供平台中的所有處理器)。
最高效能臨限值(效能值=N)可能為個別處理器可到達(假設理想條件時)的最大效能。此效能位準可能不能長期持續,且可能僅在其他平台組件處於特定狀態時可達成;例如,其可需要其他處理器處於閒置狀態。標稱效能為在理想操作條件時該處理器的最大持續效能位準。在缺少外部限制(電力、熱等)時,此為該平台預期能夠連續維持的效能位準。所有處理器預期能夠同時持續它們的標稱效能狀態。
「最低標稱」效能位準為非線性省電被達成的最低效能位準,即,有意義的省電可從電壓及頻率縮放加以達成。高於此臨限值,較低效能位準應一般比較高效能位準更有能量效率。在傳統術語中,此表示效能位準的P狀態範圍。「最低」效能位準為該平台的絕對最低效能位準。選擇低於最低非線性效能位準的效能位準將典型上降低該處理器的瞬時功率消耗。在傳統術語中,此表示效能位準的T狀態範圍。
該保證效能暫存器將保證效能位準傳達給該OSPM,該保證效能位準為考量到已知外部限制(電力預算、熱限制、AC對DC電源等)時的處理器目前最大持續效能位準。處理器預期能夠同時持續它們的保證效能位準。該保證效能位準被要求落在最低效能與標稱效能位準(有包 括)間的範圍(第9圖)中。
在一些實施例中,如果此暫存器未被實施,保證效能被假設等於標稱效能。如果此暫存器被使用,該OSPM可重新評估該保證效能暫存器。所以,該平台可有效改變該標稱位準,且因此改變該保證效能臨限值。(在一些設計中,例如,ACPI 5規格,保證效能的改變不應比每秒一次更為頻繁。)如果該平台未能夠保證給定效能位準一段持續時間(大於一秒),應保證較低效能位準且伺機進入OSPM所請求且目前操作條件所容許的較高效能位準。
參照第7圖,具OSPM的OS可具有數個效能設定來配合使用以控制該平台的效能。該OS可選擇該平台所支援的值之連續範圍內的任何效能值。在內部,該平台可實施小量的離散效能狀態且可能未能夠在該OS所想要的確切效能位準下操作。如果平台內部狀態未存在匹配該OS想要的效能位準,該平台可例如將想要的效能如下四捨五入:如果該OS已經選擇大於或等於保證效能之想要的效能位準,該平台可捨進(round up)或捨出(round down)。四捨五入的結果不應小於保證效能。如果該OS已經選擇小於保證效能之想要的效能位準以及不小於保證效能的最大效能位準,該平台應該捨進。如果該OS已經選擇皆小於保證效能之想要的效能位準以及最大效能位準,該平台在捨進不違反該最大效能位準時應該捨進。否則,就捨出。該OS應在其選擇設定小於保證效能的最大效能位準時容許平台捨出。(此方法偏好效能,除了效能 因為平台或OS限制而受到限制的情況以外)。
一些該等控制暫存器現在將被描述。該OS可寫入適當值至它們中以供想要的效能。該最大效能暫存器傳達該平台可執行的絕對最大瞬時效能位準。最大效能可被設定至從最低效能至最高效能(有包括)間的範圍中的任何效能值。
此暫存器為任選的,但該平台應實施最小效能與最大效能暫存器兩者或者兩個暫存器皆不實施。如果沒有暫存器被實施,該平台應輸送想要的效能。
該最小效能暫存器傳達該平台可執行的絕對最小瞬時效能位準。最小效能可被設定至從最低效能至保證效能臨限值(有包括)間的範圍中的任何效能值。該最小效能值不應被設定至高於該最大效能值的值。
該最小效能暫存器也為任選的,但該平台應實施最小效能與最大效能暫存器兩者或者兩個暫存器皆不實施。如果沒有暫存器被實施,該平台應輸送想要的效能。
想要的效能暫存器傳達該OS從該平台請求的效能位準。想要的效能可被設定至最低與最高效能位準(有包括)間的範圍中的任何效能值。想要的效能可採用二個意義中的一者,取決於是否該想要的效能高於或低於保證的效能位準。
低於保證效能位準,想要的效能表示該平台應提供的平均效能位準,受到效能降低容限。高於該保證效能位準,該平台應提供該保證效能位準。該平台應嘗試提供想 要的效能位準,如果目前操作條件容許,但非必須這樣做。
該時窗暫存器容許該OSPM指出在該平台應提供想要的效能位準(受到該效能降低容限)期間的時窗。該OSPM在選擇新的想要效能時設定該時窗。該時窗表示該平台被輸送效能之OSPM評估的最小持續時間。如果該OSPM評估在小於特定時窗的間隔期間的被輸送效能,不應對該平台所輸送的效能有所預期。另一方面,針對等於或大於該時窗的評估間隔,該平台應輸送在特定容限界限內的OS想要效能。
如果該OS指定時窗為零或如果該平台不支援該時窗暫存器,該平台應輸送在效能降低容限的界限內的效能,不論該評估間隔的持續期間。
該效能降低容限暫存器被該OS用來傳達低於想要效能之可容限偏差。其被該OS表示為對該效能標度的絕對值。該效能容限應小於或等於想要的效能。如果該平台支援該時窗暫存器,該效能降低容限傳達平均上在該時窗期間可被輸送的最小效能值。另一方面,如果該時窗暫存器未被實施,該平台應假設該效能降低容限對應於瞬時想要效能的容限。
該平台經由效能計數器組提供效能回饋,以及效能受限指示符(其可被實施於回饋暫存器中,例如表2中所示)。
為了決定時間內所輸送的實際效能位準,該OS可從 該標稱計數器暫存器與該被輸送計數器暫存器讀取一組效能計數器。藉由取得該標稱與被輸送效能計數器兩者的開始與結束的快照,該OS計算在一段給定時間期間的被輸送效能,且計算:被輸送的效能=標稱效能×△被輸送的效能計數器/△標稱效能計數器
該被輸送的效能應落在最低與最高效能(有包括)間的範圍中。該OS可使用該被輸送效能計數器作為回饋機制來使其選擇的想要效能狀態更精細。
管理該平台所輸送之效能可能如何及何時偏離該OS想要效能係有限制。對應於OSPM設定想要的效能:在此以後的任何時間,下列對輸送效能的限制可能適用。被輸送的效能可能高於該OSPM請求的想要效能,如果該平台能夠在相同或低於其輸送想要效能時的能量下輸送該較高效能的話。該被輸送的效能可能高於或低於該OSPM想要效能,如果該平台具有離散效能狀態且需要依據該OS控制段落中所規定的演算法來捨出效能至最近支援的效能位準的話。該被輸送的效能可能低於該OS想要效能,如果該平台的效率最佳化造成該被輸送的效能低於想要效能的話。然而,該被輸送效能一般應該未低於該OSPM指定效能。
該效能降低容限在最佳化效能輸送時將其可多積極的界限提供給該平台。該平台應未實施將造成被輸送的效能低於該OS指定效能降低容限的任何最佳化。
該標稱計數器暫存器以固定率在該處理器活動的任何時間計數。其未受到想要的效能、處理器節流等的改變所影響。
該被輸送的效能計數器在任何時間該處理器活動時遞增,以正比於該目前效能位準的比率、考量到想要效能的改變。當該處理器在其標稱效能位準操作時,該被輸送的效能計數器以與該標稱效能計數器相同的比率遞增。
該計數器繞回時間提供一種手段給該平台來指定該標稱/被輸送效能計數器的翻轉時間。如果OSPM詢問該等回饋計數器之間經過大於此段時間,則該等計數器可能繞回而OSPM未能夠偵測它們已經這樣做。如果未實施(或零),該等效能計數器被假設在該平台的壽命期間未繞回。
藉由該保證效能暫存器,該平台指出對其可輸送之效能的可預測限制。如果由於不可預測的事件而該平台必須限制該被輸送的效能小於想要的效能(或,小於保證效能,如果想要的效能大於保證效能的話),該平台設定該效能受限指示符至非零值。此對該OS指出不可預測的是件已經限制處理器效能,且該被輸送的效能可能小於想要的效能。該效能受限的指示符很棘手,且將保持非零直到OS藉由寫入0至該暫存器來清除它。
該效能受限暫存器應僅被用來回報短期、不可預測的事件(例如,PROCHOT被判定)。如果該平台能夠識別出限制處理器效能的長期、可預測的事件,其應使用該保 證效能限制來通知該OS此限制。保證效能的改變不應比每秒一次更為頻繁。如果該平台未能夠保證給定效能位準一段持續時間(大於一秒),應保證較低效能位準且伺機進入該OS所請求且目前操作條件所容許的較高效能位準。
該啟用暫存器為任選的讀取/寫入暫存器,長度一或更多個位元,其可在PCC或系統I/O空間中-此在MSR中。如果由該平台所支援,該OS寫入1至此暫存器來啟用該給定處理器上的CPPC。如果未實施,該OS假設該平台已經CPPC啟用。
OS特性分析
OS為了使用無單位、效能標度的介面(已知該標度的簡要、相對性),該OS應在大部份實施例中最初特性分析該介面所輸送的工作負載效能。此可以各種方式加以完成。例如,其可藉由選擇效能範圍值加以完成,而自主平台電力管理特徵(例如,單方面改變最小與最大內的效能參數來省電的能量效率最佳化特徵)被停用。例如,在ACPI實施方式中關閉它們係可藉由設定最小、最大、及想要輸入至相同值來加以完成、或者藉由設定該時窗至零來加以完成。當然,藉由非ACPI實施方式,限制該平台的其他方法可被用來識別該等效能值各者(或剖面)對該OS有什麼意義。
在一些實施例中,該OS選擇從最低至標稱(有包 括)的效能值範圍中的值,同時執行特性分析工作負載,且觀察該工作結果。在其他實施例中,該OS選擇相同範圍(最低至標稱)中的值且讀取統計計數器(例如,ACPI ACNT及MCNT MSRs),其傳達該邏輯處理器的生成頻率。
該特性分析工作負載可為一個需要最小服務品質來達成想要結果的特性分析工作負載。藉由特性分析什麼效能值達成最小QoS,該OS可接著稍後每當該種類的工作負載為活動以確保該QoS被滿足時設定該值作為最小。否則該特性分析結果(例如頻率)可被該OS用於效能狀態控制(此處效能狀態根據該邏輯處理器的工作負載(多忙碌)加以選擇)之基於需求的切換策略之實施方式中。注意到可能有數種類的特性分析工作負載且這些可被用來決定多個QOS最小值(對應於該工作負載類型)。
在之前的說明及下列的申請專利範圍中,下列術語應如下加以詮釋:術語「耦接」及「連接」以及它們的派生詞可被使用。應理解的是,這些術語非意圖作為彼此的同義詞。反之,在特定實施例中,「連接」被用來指出二或更多個元件處於互相直接實體或電接觸。「耦接」被用來指出二或更多個元件互相配合或互動,但它們可能或可能未處於直接實體或電接觸。
本發明非限於所述實施例,但可藉由所附申請專利範圍的精神與範圍內的修改與改變來加以實行。例如,應理解的是,本發明可應用而與所有類型的半導體積體晶片 (「IC」)使用。這些IC晶片的實例包括但不限於處理器、控制器、晶片組組件、可程式化邏輯陣列(PLA)、記憶體晶片、網路晶片、及相似者。
也應理解的是,在一些圖式中,信號導線以線加以表示。一些導線可能較粗,以指出較多構成的信號路徑;具有數字標籤,以指出數個構成的信號路徑;及/或在一或更多個端具有箭號,以指出主要資訊流方向。然而此不應以限制方式加以詮釋。反之,此種添加的細節可針對一或更多個範例實施例加以使用來促進較簡單理解電路。任何所表示的信號線,無論是否具有額外的資訊,可實際上包含一或更多信號,該一或更多信號可在多個方向中行進且可用任何合適類型的信號設計加以實施,例如,以差分對、光纖線、及/或單端線所實施的數位或類比線。
應理解的是,範例大小/模式/值/範圍可能已經被提供,儘管本發明不限於此。因為製造技術(例如,光微影)隨著時間成熟,預期較小大小的裝置可被製造。此外,熟知的對IC晶片與其他組件的電力/地連接可能或可能未被顯示於圖內,為了例示與討論的簡單,且以便不模糊本發明。進一步而言,配置可用方塊圖形式加以顯示以便避免模糊本發明,且亦有鑑於事實上對於實施此種方塊圖配置的細節係高度取決於將實施本發明的平台,即,此種細節應充分在孰習本技藝之人士的範圍內。特定細節(例如,電路)被陳述以便描述本發明的範例實施例,應對熟習本技藝之人士而言顯而易見的是,本發明可在沒有 這些特定細節下實行、或藉由彼等之變化加以實行。該說明因此被視為例示性而非限制性。
110‧‧‧作業系統
112‧‧‧核心
114‧‧‧OSPM系統
116‧‧‧裝置驅動程式
118‧‧‧電力管理介面驅動程式
120‧‧‧基於OSPM的電力管理介面
122‧‧‧電力管理暫存器
124‧‧‧BIOS介面資料結構
126‧‧‧電力管理表
130‧‧‧硬體平台
132‧‧‧平台硬體
134‧‧‧BIOS
305‧‧‧處理器
307‧‧‧模式特定暫存器
309‧‧‧功率控制單元
311‧‧‧核心頻率與VID控制
313‧‧‧MSR/PECI介面
320‧‧‧硬體平台介面
330‧‧‧作業系統
402‧‧‧一般常式
502‧‧‧性能暫存器
504‧‧‧控制暫存器
506‧‧‧回饋暫存器
本發明的實施例以舉例方式(且非以限制方式)於隨附圖式的圖中加以示出,其中相似元件符號意指類似元件。
第1圖為顯示了依據一些實施例之具有OSPM(OS導向的組態及電力管理)之運算平台的圖。
第2圖顯示了依據ACPI實施方式的一些實施例之處理器效能狀態圖。
第3圖為顯示了具有OSPM的平台之圖,示出了依據一些實施例之OSPM可與該平台通訊以管理效能的不同方式。
第4圖顯示了依據一些實施例之平台促進彈性電力管理設計的一般常式。
第5圖顯示了依據一些實施例之可在電力管理暫存器介面中實施的電力管理暫存器。
第6圖顯示了依據一些實施例的相對效能位準標度。
第7圖為顯示了依據一些實施例之可被用來控制處理器效能的數個效能控制設定值。
第8圖顯示了依據一些實施例之彈性電力管理介面(ACPI中所定義的CPPC介面)的範例封裝之定義碼。
110‧‧‧作業系統
112‧‧‧核心
114‧‧‧OSPM系統
116‧‧‧裝置驅動程式
118‧‧‧電力管理介面驅動程式
120‧‧‧基於OSPM的電力管理介面
122‧‧‧電力管理暫存器
124‧‧‧BIOS介面資料結構
126‧‧‧電力管理表
130‧‧‧硬體平台
132‧‧‧平台硬體
134‧‧‧BIOS

Claims (10)

  1. 一種具有在執行時實施作業系統電力管理方法的指令之記憶體儲存裝置,該方法包含:讀取一或更多個平台電力管理介面暫存器,以決定可用效能值的範圍;選擇複數個測試效能值,其中當選擇後該平台被禁止改變該被輸送的效能高於或低於所選擇效能位準;及對該複數個所選擇效能值評估平台效能。
  2. 如申請專利範圍第1項之記憶體儲存裝置,其中禁止包括:選擇將最小、最大、與想要的效能值設定至相同值的效能值參數。
  3. 如申請專利範圍第1項之記憶體儲存裝置,其中該OS在執行負載特性分析(characterization workload)的同時選擇從最低至標稱值的效能值範圍中的值,且對該等所選擇值評估生成的效能。
  4. 如申請專利範圍第3項之記憶體儲存裝置,其中不同負載特性分析被用來評估不同處理工作類型之效能位準。
  5. 如申請專利範圍第4項之記憶體儲存裝置,其中該等工作類型的至少一者包括服務品質(QoS)工作類型,以決定一或更多個不同QoS情境所想要的最小效能位準。
  6. 一種具有在執行時實施方法的OS之運算平台,該方法包含:讀取一或更多個平台電力管理介面暫存器以決定可用 效能值的範圍;選擇複數個效能值,其中當選擇後該平台被禁止改變該輸送的效能高於或低於所選擇效能位準;及對該複數個所選擇效能值評估平台效能。
  7. 如申請專利範圍第6項之運算平台,其中禁止包括:選擇將最小、最大、與想要的效能值設定至相同值的效能值參數。
  8. 如申請專利範圍第6項之運算平台,其中該OS在執行負載特性分析的同時選擇從最低至標稱值的效能值範圍中的值,且對該等所選擇值評估生成的效能。
  9. 如申請專利範圍第8項之運算平台,其中不同負載特性分析被用來評估不同處理工作類型之效能位準。
  10. 如申請專利範圍第9項之運算平台,其中該等工作類型的至少一者包括服務品質(QoS)工作類型,以決定一或更多個不同QoS情境所想要的最小效能位準。
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Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013077891A1 (en) 2011-11-22 2013-05-30 Intel Corporation Collaborative processor and system performance and power management
US10095295B2 (en) * 2011-12-14 2018-10-09 Advanced Micro Devices, Inc. Method and apparatus for power management of a graphics processing core in a virtual environment
US9026817B2 (en) 2012-06-29 2015-05-05 Intel Corporation Joint optimization of processor frequencies and system sleep states
JP5877533B2 (ja) * 2013-01-31 2016-03-08 三菱電機株式会社 計算機装置及び計算機装置の制御方法
US9696785B2 (en) 2013-12-28 2017-07-04 Intel Corporation Electronic device having a controller to enter a low power mode
US10514942B2 (en) 2014-02-24 2019-12-24 Red Hat Israel, Ltd. Using linker scripts for loading system configuration tables
US9571465B1 (en) 2014-09-18 2017-02-14 Amazon Technologies, Inc. Security verification by message interception and modification
KR102261815B1 (ko) * 2014-10-30 2021-06-07 삼성전자주식회사 펌웨어 업데이트 시간을 줄일 수 있는 데이터 저장 장치, 및 이를 포함하는 데이터 처리 시스템
US9720827B2 (en) * 2014-11-14 2017-08-01 Intel Corporation Providing multiple memory modes for a processor including internal memory
US10126950B2 (en) * 2014-12-22 2018-11-13 Intel Corporation Allocating and configuring persistent memory
US11003565B2 (en) 2015-04-21 2021-05-11 Hewlett-Packard Development Company, L.P. Performance change predictions
CN106874176B (zh) * 2015-12-14 2021-04-27 创新先进技术有限公司 智能测试方法和装置
US10180793B2 (en) 2017-01-31 2019-01-15 Hewlett Packard Enterprise Development Lp Performance attributes for memory
US11182315B2 (en) 2017-02-10 2021-11-23 Intel Corporation Apparatuses, methods, and systems for hardware control of processor performance levels
US10958729B2 (en) * 2017-05-18 2021-03-23 Intel Corporation Non-volatile memory express over fabric (NVMeOF) using volume management device
US10627880B2 (en) * 2017-05-19 2020-04-21 Dell Products L.P. Systems and methods for forward compatibility of custom thermal settings
KR102388803B1 (ko) 2017-11-02 2022-04-20 삼성전자주식회사 반도체 메모리 장치, 이를 포함하는 메모리 시스템 및 반도체 메모리 장치의 동작 방법
US10620969B2 (en) 2018-03-27 2020-04-14 Intel Corporation System, apparatus and method for providing hardware feedback information in a processor
TWI685751B (zh) 2018-04-10 2020-02-21 神雲科技股份有限公司 伺服器裝置的錯誤報告功能的控制方法
CN108959049B (zh) * 2018-06-27 2021-12-17 郑州云海信息技术有限公司 Smm的健壮性和稳定性的测试方法、装置及存储介质
US10795746B2 (en) 2018-12-13 2020-10-06 Micron Technology, Inc. Automated power down based on state of firmware
EP3999938A4 (en) * 2019-07-15 2023-08-02 INTEL Corporation DYNAMIC ENERGY PERFORMANCE PREFERENCE BASED ON WORKLOADS USING AN ADAPTIVE ALGORITHM
US11157329B2 (en) 2019-07-26 2021-10-26 Intel Corporation Technology for managing per-core performance states
US11625084B2 (en) * 2019-08-15 2023-04-11 Intel Corporation Method of optimizing device power and efficiency based on host-controlled hints prior to low-power entry for blocks and components on a PCI express device
TWI726405B (zh) * 2019-09-04 2021-05-01 神雲科技股份有限公司 開機程序除錯系統及其主機與方法
US11507157B2 (en) * 2020-04-30 2022-11-22 Dell Products L.P. Hot-inserted devices
KR20210149445A (ko) 2020-06-02 2021-12-09 삼성전자주식회사 메모리 모듈 및 메모리 모듈의 동작 방법
US11106529B1 (en) * 2020-07-22 2021-08-31 Dell Products L.P. Post package repair failure memory location reporting system
US11829612B2 (en) 2020-08-20 2023-11-28 Micron Technology, Inc. Security techniques for low power mode of memory device
CN112256327A (zh) * 2020-11-01 2021-01-22 屈军军 一种微型电子机械装置
US11934251B2 (en) * 2021-03-31 2024-03-19 Advanced Micro Devices, Inc. Data fabric clock switching
CN117546122A (zh) 2021-06-22 2024-02-09 微软技术许可有限责任公司 使用服务质量(qos)的功率预算管理
WO2022271606A1 (en) * 2021-06-22 2022-12-29 Microsoft Technology Licensing, Llc Power budget management using quality of service (qos)
US20230132345A1 (en) * 2021-10-27 2023-04-27 Dell Products L.P. Numa node virtual machine provisioning system
JP2023136634A (ja) * 2022-03-17 2023-09-29 キヤノン株式会社 印刷管理システム、及び方法
US11726855B1 (en) * 2022-04-26 2023-08-15 Dell Products L.P. Controlling access to an error record serialization table of an information handlng system
CN115543055B (zh) * 2022-11-28 2023-03-14 苏州浪潮智能科技有限公司 电源管理的控制权移交方法、装置、设备和存储介质
US20240220320A1 (en) * 2022-12-30 2024-07-04 Advanced Micro Devices, Inc. Systems and methods for sharing memory across clusters of directly connected nodes

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050125702A1 (en) * 2003-12-03 2005-06-09 International Business Machines Corporation Method and system for power management including device controller-based device use evaluation and power-state control
US7017060B2 (en) * 2001-03-19 2006-03-21 Intel Corporation Power management system that changes processor level if processor utilization crosses threshold over a period that is different for switching up or down
TW200917006A (en) * 2007-10-01 2009-04-16 Inventec Corp Apparatus and method for power management
US20090327609A1 (en) * 2008-06-30 2009-12-31 Bruce Fleming Performance based cache management
US20100162023A1 (en) * 2008-12-23 2010-06-24 Efraim Rotem Method and apparatus of power management of processor

Family Cites Families (104)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4646232A (en) * 1984-01-03 1987-02-24 Texas Instruments Incorporated Microprocessor with integrated CPU, RAM, timer, bus arbiter data for communication system
US4641308A (en) * 1984-01-03 1987-02-03 Texas Instruments Incorporated Method of internal self-test of microprocessor using microcode
TW282525B (zh) * 1994-06-17 1996-08-01 Intel Corp
US6052793A (en) * 1998-06-10 2000-04-18 Dell Usa, L.P. Wakeup event restoration after power loss
US6167511A (en) * 1998-06-15 2000-12-26 Phoenix Technologies Ltd. Method to reflect BIOS set up changes into ACPI machine language
EP1172732A4 (en) * 1999-02-24 2009-08-19 Hitachi Ltd COMPUTER SYSTEM AND METHOD FOR MANAGING DISTURBANCES AFFECTING A COMPUTER SYSTEM
US7197548B1 (en) * 1999-07-20 2007-03-27 Broadcom Corporation Method and apparatus for verifying connectivity among nodes in a communications network
US6732280B1 (en) * 1999-07-26 2004-05-04 Hewlett-Packard Development Company, L.P. Computer system performing machine specific tasks before going to a low power state
EP1085396A1 (en) * 1999-09-17 2001-03-21 Hewlett-Packard Company Operation of trusted state in computing platform
US6530031B1 (en) * 1999-11-08 2003-03-04 International Business Machines Corporation Method and apparatus for timing duration of initialization tasks during system initialization
US7016060B1 (en) 1999-12-08 2006-03-21 International Business Machines Corporation Method, system, and program for reconfiguring logical printers in a network printing system
US6499102B1 (en) * 1999-12-29 2002-12-24 Intel Corporation Method of dynamically changing the lowest sleeping state in ACPI
US6826701B1 (en) * 2000-04-20 2004-11-30 Microsoft Corporation Re-running general purpose event control methods in a computer system
US6931553B1 (en) * 2000-04-20 2005-08-16 Microsoft Corporation Preventing general purpose event interrupt storms in a computer system
US7085944B1 (en) 2000-09-30 2006-08-01 Intel Corporation Power management by transmitting single multiplexed signal to multiple system components to change settings of internal performance registers in response to change in power source
US6704877B2 (en) 2000-12-29 2004-03-09 Intel Corporation Dynamically changing the performance of devices in a computer platform
US7089430B2 (en) * 2001-12-21 2006-08-08 Intel Corporation Managing multiple processor performance states
US20030188146A1 (en) * 2002-03-28 2003-10-02 Hale Robert P. Method of ordered execution of firmware modules in a pre-memory execution environment
US6848057B2 (en) * 2002-05-28 2005-01-25 Nvidia Corporation Method and apparatus for providing a decoupled power management state
US20040024867A1 (en) * 2002-06-28 2004-02-05 Openwave Systems Inc. Method and apparatus for determination of device capabilities on a network
US6990576B2 (en) * 2002-08-07 2006-01-24 Hewlett-Packard Development Company, L.P. System and method for using a firmware interface table to dynamically load an ACPI SSDT
US7698583B2 (en) * 2002-10-03 2010-04-13 Via Technologies, Inc. Microprocessor capable of dynamically reducing its power consumption in response to varying operating temperature
US7131015B2 (en) 2002-11-12 2006-10-31 Arm Limited Performance level selection in a data processing system using a plurality of performance request calculating algorithms
US7219241B2 (en) * 2002-11-30 2007-05-15 Intel Corporation Method for managing virtual and actual performance states of logical processors in a multithreaded processor using system management mode
US7007160B1 (en) * 2002-12-03 2006-02-28 Hewlett-Packard Development Company, L.P. System and method for loading an advanced configuration and power interface (ACPI) original equipment manufacturer (OEM) description table
CN1534863A (zh) * 2003-01-15 2004-10-06 松下电器产业株式会社 振荡电路
US7827283B2 (en) 2003-02-19 2010-11-02 International Business Machines Corporation System for managing and controlling storage access requirements
US7502803B2 (en) * 2003-05-28 2009-03-10 Hewlett-Packard Development Company, L.P. System and method for generating ACPI machine language tables
US7051215B2 (en) * 2003-06-13 2006-05-23 Intel Corporation Power management for clustered computing platforms
US20050192788A1 (en) * 2004-02-27 2005-09-01 Hobson Louis B. Simulating processor performance states
JP4144880B2 (ja) * 2004-04-09 2008-09-03 インターナショナル・ビジネス・マシーンズ・コーポレーション プラットフォーム構成測定装置、プログラム及び方法、プラットフォーム構成認証装置、プログラム及び方法、プラットフォーム構成証明装置、プログラム及び方法、並びに、プラットフォーム構成開示装置、プログラム及び方法
US7360103B2 (en) * 2004-05-21 2008-04-15 Intel Corporation P-state feedback to operating system with hardware coordination
US20050283599A1 (en) * 2004-06-22 2005-12-22 Zimmerman Toby S Exposing BIOS information to an ACPI aware operating system
US7243222B2 (en) * 2004-06-24 2007-07-10 Intel Corporation Storing data related to system initialization in memory while determining and storing data if an exception has taken place during initialization
EP1770920A4 (en) * 2004-07-16 2011-10-12 Brother Ind Ltd CONNECTING MODE CONTROL DEVICE, CONNECTION MODE CONTROL METHOD AND CONNECTION MODE CONTROL PROGRAM
US7386688B2 (en) 2004-07-29 2008-06-10 Hewlett-Packard Development Company, L.P. Communication among partitioned devices
US7594128B2 (en) * 2004-08-04 2009-09-22 Hewlett-Packard Development Company, L.P. Systems and methods to determine processor utilization
US7565562B2 (en) 2004-09-03 2009-07-21 Intel Corporation Context based power management
US7242227B2 (en) * 2004-11-01 2007-07-10 Texas Instruments Incorporated Common mode stabilization circuit for differential bus networks
US7610497B2 (en) * 2005-02-01 2009-10-27 Via Technologies, Inc. Power management system with a bridge logic having analyzers for monitoring data quantity to modify operating clock and voltage of the processor and main memory
US7487222B2 (en) * 2005-03-29 2009-02-03 International Business Machines Corporation System management architecture for multi-node computer system
CN100527089C (zh) * 2005-04-27 2009-08-12 松下电器产业株式会社 信息处理装置中的功率控制装置
US7454639B2 (en) * 2005-06-30 2008-11-18 Intel Corporation Various apparatuses and methods for reduced power states in system memory
US20070043965A1 (en) 2005-08-22 2007-02-22 Intel Corporation Dynamic memory sizing for power reduction
US7562234B2 (en) * 2005-08-25 2009-07-14 Apple Inc. Methods and apparatuses for dynamic power control
US7516336B2 (en) * 2005-09-29 2009-04-07 Intel Corporation System and method for power reduction by sequestering at least one device or partition in a platform from operating system access
US7509471B2 (en) * 2005-10-27 2009-03-24 Sandisk Corporation Methods for adaptively handling data writes in non-volatile memories
US20070136523A1 (en) * 2005-12-08 2007-06-14 Bonella Randy M Advanced dynamic disk memory module special operations
US7516317B2 (en) * 2005-12-29 2009-04-07 Microsoft Corporation Measuring an operating system's boot duration
US7421601B2 (en) 2006-02-17 2008-09-02 International Business Machines Corporation Method and system for controlling power in a chip through a power-performance monitor and control unit
US20070260761A1 (en) * 2006-03-28 2007-11-08 Inventec Corporation Inter-module data communication control method and system for ACPI and BIOS
JP2007272573A (ja) * 2006-03-31 2007-10-18 Hitachi Ltd 低消費電力化メモリ管理方法及びメモリ管理プログラム
US7752468B2 (en) 2006-06-06 2010-07-06 Intel Corporation Predict computing platform memory power utilization
US20080010516A1 (en) * 2006-06-14 2008-01-10 Inventec Corporation Method and apparatus for indicating the actual progress of a booting procedure
US20080010527A1 (en) * 2006-06-26 2008-01-10 Inventec Corporation Method of solving BIST failure of CPU by means of BIOS and maximizing system performance
US7610482B1 (en) * 2006-06-28 2009-10-27 Qlogic, Corporation Method and system for managing boot trace information in host bus adapters
US7747881B2 (en) 2006-08-14 2010-06-29 Globalfoundries Inc. System and method for limiting processor performance
US20080046546A1 (en) 2006-08-18 2008-02-21 Parmar Pankaj N EFI based mechanism to export platform management capabilities to the OS
KR100770703B1 (ko) * 2006-08-30 2007-10-29 삼성전자주식회사 메모리 시스템의 전력 쓰로틀링 방법 및 메모리 시스템
JP2008109243A (ja) * 2006-10-24 2008-05-08 Renesas Technology Corp Rf通信用半導体集積回路
US20080147357A1 (en) 2006-12-15 2008-06-19 Iintrinisyc Software International System and method of assessing performance of a processor
US7953996B2 (en) * 2006-12-18 2011-05-31 Hewlett-Packard Development Company, L.P. ACPI to firmware interface
KR100890152B1 (ko) * 2006-12-22 2009-03-20 매그나칩 반도체 유한회사 Cmos 이미지 센서를 위한, 작은 크기, 높은 이득 및낮은 노이즈의 픽셀
US8302087B2 (en) * 2007-01-05 2012-10-30 International Business Machines Corporation Quality assurance in software systems through autonomic reliability, availability and serviceability code generation
JP4912174B2 (ja) * 2007-02-07 2012-04-11 株式会社日立製作所 ストレージシステム及び記憶管理方法
US8448024B2 (en) * 2007-05-16 2013-05-21 Intel Corporation Firmware assisted error handling scheme
US8250354B2 (en) * 2007-11-29 2012-08-21 GlobalFoundries, Inc. Method and apparatus for making a processor sideband interface adhere to secure mode restrictions
US20090150696A1 (en) * 2007-12-10 2009-06-11 Justin Song Transitioning a processor package to a low power state
US8151081B2 (en) * 2007-12-20 2012-04-03 Intel Corporation Method, system and apparatus for memory address mapping for sub-socket partitioning
US7831816B2 (en) * 2008-05-30 2010-11-09 Globalfoundries Inc. Non-destructive sideband reading of processor state information
US7912082B2 (en) * 2008-06-09 2011-03-22 Oracle America, Inc. Shared virtual network interface
US7984286B2 (en) * 2008-06-25 2011-07-19 Intel Corporation Apparatus and method for secure boot environment
US20100153523A1 (en) * 2008-12-16 2010-06-17 Microsoft Corporation Scalable interconnection of data center servers using two ports
US8601296B2 (en) 2008-12-31 2013-12-03 Intel Corporation Downstream device service latency reporting for power management
US8799691B2 (en) * 2009-01-07 2014-08-05 Hewlett-Packard Development Company, L.P. Hierarchical power management
JP5218568B2 (ja) * 2009-01-26 2013-06-26 富士通株式会社 構成変更機能を有する情報処理装置、システム構成変更方法及びシステム構成変更プログラム
JP5118074B2 (ja) 2009-01-27 2013-01-16 日本電信電話株式会社 光ファイバ
US8131991B2 (en) * 2009-02-10 2012-03-06 Sony Corporation System and method for configuring plural software profiles
US8135970B2 (en) 2009-03-06 2012-03-13 Via Technologies, Inc. Microprocessor that performs adaptive power throttling
US20100235834A1 (en) * 2009-03-16 2010-09-16 Faasse Scott P Providing a management communication channel between a software layer and platform layer for hardware management control
US8171319B2 (en) * 2009-04-16 2012-05-01 International Business Machines Corporation Managing processor power-performance states
US9244797B2 (en) * 2009-05-29 2016-01-26 Dell Products L.P. Methods for managing performance states in an information handling system
US8464038B2 (en) * 2009-10-13 2013-06-11 Google Inc. Computing device with developer mode
US8490179B2 (en) * 2009-10-27 2013-07-16 Hewlett-Packard Development Company, L.P. Computing platform
US20110131427A1 (en) 2009-12-02 2011-06-02 Jorgenson Joel A Power management states
US20110145555A1 (en) * 2009-12-15 2011-06-16 International Business Machines Corporation Controlling Power Management Policies on a Per Partition Basis in a Virtualized Environment
US8555091B2 (en) * 2009-12-23 2013-10-08 Intel Corporation Dynamic power state determination of a graphics processing unit
JP5544878B2 (ja) * 2009-12-25 2014-07-09 富士通株式会社 故障制御装置、プロセッサコア、演算処理装置、情報処理装置および擬似故障制御方法
US9310838B2 (en) * 2010-03-19 2016-04-12 I/O Interconnect, Ltd. Power management method for switching power mode of a computer system based on detection of a human interface device
KR20110114910A (ko) * 2010-04-14 2011-10-20 삼성전자주식회사 집적회로 및 그것의 소비전력 측정 방법
US8522066B2 (en) * 2010-06-25 2013-08-27 Intel Corporation Providing silicon integrated code for a system
US8648690B2 (en) * 2010-07-22 2014-02-11 Oracle International Corporation System and method for monitoring computer servers and network appliances
JP5598144B2 (ja) 2010-08-04 2014-10-01 ソニー株式会社 情報処理装置、電源制御方法、およびプログラム
US8495395B2 (en) * 2010-09-14 2013-07-23 Advanced Micro Devices Mechanism for controlling power consumption in a processing node
US8812825B2 (en) * 2011-01-10 2014-08-19 Dell Products L.P. Methods and systems for managing performance and power utilization of a processor employing a fully multithreaded load threshold
US9454197B2 (en) * 2011-01-28 2016-09-27 Renesas Electronics Corporation Controller and semiconductor system
US8659341B2 (en) * 2011-05-02 2014-02-25 Analog Devices, Inc. System and method for level-shifting voltage signals using a dynamic level-shifting architecture
US8788777B2 (en) * 2011-05-06 2014-07-22 Marvell World Trade Ltd. Memory on-demand, managing power in memory
US8966305B2 (en) * 2011-06-30 2015-02-24 Advanced Micro Devices, Inc. Managing processor-state transitions
US9026815B2 (en) * 2011-10-27 2015-05-05 Intel Corporation Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor
US9031847B2 (en) * 2011-11-15 2015-05-12 Microsoft Technology Licensing, Llc Voice-controlled camera operations
WO2013077891A1 (en) * 2011-11-22 2013-05-30 Intel Corporation Collaborative processor and system performance and power management
US8645797B2 (en) * 2011-12-12 2014-02-04 Intel Corporation Injecting a data error into a writeback path to memory
WO2013172843A1 (en) * 2012-05-17 2013-11-21 Intel Corporation Managing power consumption and performance of computing systems

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7017060B2 (en) * 2001-03-19 2006-03-21 Intel Corporation Power management system that changes processor level if processor utilization crosses threshold over a period that is different for switching up or down
US20050125702A1 (en) * 2003-12-03 2005-06-09 International Business Machines Corporation Method and system for power management including device controller-based device use evaluation and power-state control
TW200917006A (en) * 2007-10-01 2009-04-16 Inventec Corp Apparatus and method for power management
US20090327609A1 (en) * 2008-06-30 2009-12-31 Bruce Fleming Performance based cache management
US20100162023A1 (en) * 2008-12-23 2010-06-24 Efraim Rotem Method and apparatus of power management of processor

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