TWI462176B - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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TWI462176B
TWI462176B TW101119043A TW101119043A TWI462176B TW I462176 B TWI462176 B TW I462176B TW 101119043 A TW101119043 A TW 101119043A TW 101119043 A TW101119043 A TW 101119043A TW I462176 B TWI462176 B TW I462176B
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film
dielectric film
semiconductor device
gas cluster
manufacturing
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TW201312654A (zh
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Koji Akiyama
Hirokazu Higashijima
Yoshitsugu Tanaka
Yasushi Akasaka
Koji Yamashita
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Tokyo Electron Ltd
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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • H—ELECTRICITY
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26566—Bombardment with radiation with high-energy radiation producing ion implantation of a cluster, e.g. using a gas cluster ion beam
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
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Description

半導體裝置之製造方法
本發明係關於一種半導體裝置之製造方法。
自以往，係使用氧化矽膜等來作為半導體裝置中電晶體的閘極絕緣膜等。氧化矽膜由於耐壓性高及溢漏電流低，故係作為絕緣膜之極佳材料，但由於比介電率低，因此便成為半導體裝置小型化及高集積化時的屏障。
近年來，隨著半導體裝置之高集積化的進一步要求，便檢討使用於電晶體之閘極絕緣膜等處構成較氧化矽膜要有高比介電率之介電體所構成之所謂High-k膜。
此般的High-k膜係藉由CVD(Chemical Vapor Deposition)法或ALD(Atomic Layer Deposition)法所形成，但為了降低成膜後High-k膜之雜質元素，要進行成膜後之熱處理。
然而，由於熱處理後的High-k膜會多晶化，而有所謂溢漏電流增加之問題點。
先前技術文獻
專利文獻
專利文獻1：日本特公平3-67346號公報
因此，作為抑制熱處理步驟中的多晶化，並抑制High-k膜的溢漏電流之方法，有添加氧化矽或氧化鋁之材料的方法等。
但是，相對於氧化矽或氧化鋁等之High-k膜而使其延緩結晶化之材料通常比介電率較低，將該等材料添加至構成 High-k膜的材料會降低介電率，使得於電晶體中閘極絕緣膜等處使用為介電體膜之High-k膜的意義便會變小。
因此，便期望有一種在將High-k膜用作閘極絕緣膜時，不會降低介電率，又可將溢漏電流降低之介電體膜之形成方法及使用該介電體膜之半導體裝置之製造方法。
本發明特徵係具有下述步驟：成膜步驟，係於半導體基板上形成介電體膜；熱處理步驟，係將該介電體膜進行熱處理；以及，照射步驟，係將離子化後的氣體群集照射於該熱處理後之介電體膜。
又，本發明之前述介電體膜之膜厚為2nm以下。
又，本發明之構成該介電體膜之材料係包含有1或2種以上選自HfO2 、ZrO2 、Al2 O3 、Ta2 O5 、TiO2 、Y2 O3 之材料。
又，本發明之該氣體群集係包含有氧或氮之氣體群集。
構成該氣體群集之原子數平均為1000以上。
又，本發明之該介電體膜係藉由CVD法或ALD法之成膜所形成。
依本發明，便可不降低介電率，並形成溢漏電流低的介電體膜，而可提供一種良率高的高集積化半導體裝置之製造方法。
現就用以實施本發明之形態，如下進行說明。
(介電體膜的形成方法)
基於圖1，就本實施形態中為介電體膜之High-k膜之形成方法進行說明。
首先，如步驟102(S102)所示，於矽等半導體基板上進行介電體膜之成膜。作為構成介電體膜之材料舉例有HfO2 (氧化蛤)、ZrO2 (氧化鋯)、Al2 O3 (氧化鋁)、Ta2 O5 (五氧化鈦)、TiO2 (氧化鈦)、Y2 O3 (氧化釔)等稀土類氧化物等以及該等之混合物，以及於該等添加矽者，甚至將該等進行氮化處理者。介電體膜之成膜方法舉例有CVD法或ALD法等。
接著，如步驟104(S104)所示，進行熱處理。此時的熱處理溫度為約850℃，一般的介電體膜會多晶化。溢漏電流被認為會因介電體膜的多晶化而增加。亦即，由於溢漏電流會經由結晶粒界流動，故被認為熱處理會增加溢漏電流。
接著，如步驟106(S106)所示，照射離子化後的氣體群集。此離子化後的氣體群集係例如數100至數1000的原子所構成群集者。構成氣體群集之原子舉例有氧或氮等。
接著，就用於離子化後氣體群集之照射的氣體群集照射裝置進行說明。
圖2係顯示本實施形態所使用之群集離子照射裝置。該群集離子照射裝置係具有生成氣體群集之噴嘴部11、離子化電極12、加速電極13及群集選擇部14。
噴嘴部11係藉由壓縮後氣體生成氣體群集。具體而言，以高壓狀態供應至噴嘴部11之氣體會藉由從噴嘴部11噴出而生成氣體群集。此時所使用之氣體為氧等氣體，較佳係在常溫下為氣體狀態者。
離子化電極12係將所生成之氣體群集離子化。藉此，所生成之氣體群集便會被離子化。
接著，藉由加速電極13來加速離子化後之氣體群集。此時，氣體群集會以構成氣體群集之原子數的平方根，即質量的平方根成反比例增加速度。又，會以離子化價數的平方根成比例增加速度。
接著，群集選擇部14中會對應於離子化價數或質量來選擇氣體群集。具體而言，群集選擇部14係藉由施加電場或磁場來將無法成為群集之單離子等加以去除。
之後，將離子化後之氣體群集15照射至介電體膜。
(介電體膜之特性)
接著，就本實施形態中所形成之介電體膜的特性進行說明。此處所使用之介電體膜材料為鋁，成膜方法係藉由CVD法來進行。另外，樣品A係於步驟102中進行成膜後之狀態，而樣品B係於步驟104中進行熱處理後之狀態，樣品C係於步驟106中照射群集離子後之狀態，為本實施形態中的介電體膜。
圖3係顯示藉由樣品A所規格化後之EOT(等價氧化膜厚)。相對於為進行熱處理前狀態之樣品A，進行熱處理後之樣品B及樣品C會增加介電率且EOT會降低。如此般，便可以藉由進行熱處理來提高介電率。又，由於樣品B及樣品C中之EOT幾乎未有改變，因此可被認為於介電體膜照射氣體群集不會有EOT的改變。
圖4係顯示由樣品A規格化後之溢漏電流。如樣品B所示，藉由進行熱處理，溢漏電流會增加。此乃被認為如前述， 藉由進行熱處理會讓介電體膜多晶化，而使得流於結晶粒界之溢漏電流增加之故。另一方面，如樣品C所示，藉由於已進行熱處理後介電體膜照射離子化後之氣體群集會降低溢漏電流。這被認為藉由氣體群集之照射僅會對介電體膜的表面有很大的影響，故對介電體膜照射離子化後之氣體群集時，僅有介電體膜的表面會改質，而成為例如非晶狀態等。
圖5係顯示由樣品A規格化後之膜密度。如樣品B所示，藉由進行熱處理會增加膜密度。此被認為係藉由進行熱處理會使介電體膜多晶化，而使得膜密度提高。又，樣品B及樣品C中之膜密度幾乎未有改變。因此，在照射離子化後之氣體群集時，膜密度幾乎不會改變。
圖6係顯示藉由DHF(稀氟酸)來進行蝕刻後之結果。樣品A由於介電體膜未多晶化，因此因DHF的蝕刻率較高。另一方面，樣品B由於介電體膜藉由熱處理而多晶化，因此幾乎未因DHF而被蝕刻。又，樣品C雖會因DHF而有介電體膜的表面1~2nm被蝕刻，但之後幾乎未被蝕刻。
由以上說明，依本實施形態所形成之介電體膜，即樣品C的介電體膜會在表面起1~2nm之厚度區域被改質成接近熱處理前之狀態，而成為與內部多晶化後狀態之不同狀態。藉此，便可獲得低溢漏電流但高介電率之介電體膜。
另外，關於本實施形態中表面改質的深度，可藉由調整離子化後氣體群集之條件來加以調整。
又，關於上述介電體膜之特性，雖係以Al2 O3 來加以顯示，但關於包含有HfO2 、ZrO2 、Ta2 O5 、TiO2 、Y2 O3 等之稀土類氧化物等之材料亦有相同的傾向。
又，本實施形態中，雖係使用氧之離子化後的氣體群集來作為離子化後之氣體群集，但可認為使用氮之離子化後之氣體群集的情況亦是相同的。另外，在使用氬之離子化後的氣體群集的情況確認了會增加溢漏電流，故作為離子化後之氣體群集來使用的氣體較佳為氧或氮。
又，在將原子離子化後之單離子照射於介電體膜之情況，單離子會通過介電體膜整體及介電體膜而對基板造成影響，而無法僅對介電體膜表面進行改質。但是，在將離子化後之氣體群集照射至介電體膜之情況，便可以在介電體膜表面1~2nm左右進行改質。此係照射離子化後之氣體群集時之超低能量照射效果之故，藉由變成氣體群集狀態，便可以僅使得介電體表面進行改質。為了得到此般效果，構成氣體群集之原子數平均較佳為1000個以上。
另外，作為將元素導入至膜中的類似方法，離子注入法為代表性的。但是，要將原子或分子加以離子化後之離子注入膜之方法來僅改質薄的high-k膜是非常困難的，一般會通過high-k膜而對基板造成影響。
因此，要改質膜，便必須以1×1021 ~1×1022 cm-3 左右密度注入原子，但另一方面，與膜連接之Si基板所注入的原子在超過1×1018 cm-3 左右，則Si基板本身便會出現氧化等弊害。離子注入要獲得滿足所謂膜的改質以及不使Si基板氧化的雙方條件之設定係非常困難的。又，如本發明般，在將結晶化後的膜成為注入對象時，由於係相對結晶的特定方位來將一定數的離子不會散亂地穿透來引發所謂溝流(channelling)現象，故離子到達膜深處位置的機率會提高。
另一方面，氣體群集注入係和離子注入與雜質導入之原理不同，故可以獲得此般條件之設定。當具有數1000個左右原子數之氣體群集與注入對象物衝撞時，瞬間地會在發生衝撞之附近形成高溫高壓區域。這會使得對象物瞬間地溶融，使得欲注入之原子滲透至溶融後之部分。雜質深度係由此溶融深度所決定，雜質的設定會變得非常的嚴格。又，在氣體群集的衝撞過程中，會在照射表面附近發生其他衝撞而未發生上述溝流。又，藉由上述溶融，也會有對象膜結晶構造之崩壞效果，而未發生溝流。又，群集的平均值可如上述般為數1000個以上，1個原子的能量與離子注入的情況相比可相當的低。關於該等效果，在「群集離子束基礎與應用」，山田公編著，日刊工業新聞社，ISBN4-526-05765-7,p.146-147等有所記載。
(半導體裝置之製造方法)
接著，基於圖7，就本實施形態中半導體裝置之製造方法進行說明。
首先，如圖7(a)所示，於矽基板21上藉由CVD法來形成為介電體膜之HfO2 膜22，之後，進行熱處理，進行離子化後之氣體群集25的照射。
接著，如圖7(b)所示，於HfO2 膜22上形成多晶矽等所構成之電極膜23。
接著，如圖7(c)所示，除了形成有閘極電極及閘極絕緣膜之區域外，藉由蝕刻去除HfO2 膜22及電極膜23。藉由該蝕刻，殘留下來的HfO2 膜22便會成為閘極絕緣膜22a，殘留下來的電極膜23便會成為閘極電極23a。
接著，如圖7(d)所示，於形成有閘極電極及閘極絕緣膜區域以外的矽基板21之表面進行雜質離子的離子注入，形成含有高濃度雜質離子之高濃度區域24。之後，藉由形成連接於高濃度區域24之未圖示的汲極電極及源極電極，便形成了場效型電晶體。
藉此，便可以形成藉由介電率高、溢漏電流低之介電體膜所構成之場效型電晶體。本實施形態能將具有複數此般場效型電晶體之半導體裝置加以集積化，又，能以高良率來加以製造。
另外，上述說明雖已就作為半導體裝置之場效型電晶體之製造方法來加以說明，但就其他電子元件，例如形成電容器等之情況中，亦可以使用本實施形態之介電體膜的形成方法。
以上，雖已就本發明實施形態進行說明，但上述內容並非用以限定發明內容。
11‧‧‧噴嘴部
12‧‧‧離子化電極
13‧‧‧加速電極
14‧‧‧群集選擇部
15‧‧‧氣體群集
21‧‧‧矽基板
22‧‧‧介電體膜
22a‧‧‧閘極絕緣膜
23‧‧‧電極膜
23a‧‧‧閘極電極
24‧‧‧高濃度區域
25‧‧‧氣體群集
圖1係本實施形態中介電體膜之形成方法之流程圖。
圖2係本實施形態中所使用之氣體群集照射裝置之結構圖。
圖3係介電體膜中之EOT特性圖。
圖4係介電體膜中之溢漏電流特性圖。
圖5係顯示介電體膜中膜密度之圖。
圖6係介電體膜中因DHF之蝕刻特性圖。
圖7係本實施型態中之半導體裝置之製造方法的說明圖。
S102‧‧‧介電體膜的成膜
S104‧‧‧熱處理
S106‧‧‧氣體群集照射

Claims (7)

  1. 一種半導體裝置之製造方法，係具有下述步驟：成膜步驟，係於半導體基板上形成介電體膜；熱處理步驟，係將該介電體膜進行熱處理；產生氣體群集；將該氣體群集離子化；以及，照射步驟，係將該離子化後的氣體群集照射於該熱處理後之介電體膜的僅上表面。
  2. 如申請專利範圍第1項之半導體裝置之製造方法，其中該介電體膜的膜厚為2nm以下。
  3. 如申請專利範圍第1或2項之半導體裝置之製造方法，其中構成該介電體膜之材料係包含有1或2種以上選自HfO2 、ZrO2 、Al2 O3 、Ta2 O5 、TiO2 、Y2 O3 之材料。
  4. 如申請專利範圍第1或2項之半導體裝置之製造方法，其中該氣體群集係包含有氧或氮之氣體群集。
  5. 如申請專利範圍第1或2項之半導體裝置之製造方法，其中構成該氣體群集之原子數平均為1000以上。
  6. 如申請專利範圍第3項之半導體裝置之製造方法，其中該介電體膜係藉由CVD法或ALD法之成膜所形成。
  7. 如申請專利範圍第1項之半導體裝置之製造方法，其中該照射步驟會降低流經該介電體膜之漏電流。
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