TWI456706B - 矽穿孔自我繞線電路及其繞線方法 - Google Patents
矽穿孔自我繞線電路及其繞線方法 Download PDFInfo
- Publication number
- TWI456706B TWI456706B TW101139290A TW101139290A TWI456706B TW I456706 B TWI456706 B TW I456706B TW 101139290 A TW101139290 A TW 101139290A TW 101139290 A TW101139290 A TW 101139290A TW I456706 B TWI456706 B TW I456706B
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- Prior art keywords
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3187—Built-in tests
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/31813—Test pattern generators
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/22—Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
Claims (7)
- 一種矽穿孔自我繞線電路,包含:複數矽穿孔;以及複數平面晶片層,藉由該些矽穿孔連接,各該平面晶片層包含:一內建自我測試電路,具有複數有效位元引線及複數矽穿孔引線連接該些矽穿孔;一內建自我繞線交換網路,連接該內建自我測試電路,藉以選擇導通之該些矽穿孔;及一核心電路,具有複數輸出入引線連接該內建自我繞線交換網路。
- 如請求項1之矽穿孔自我繞線電路,該內建自我測試電路包含:一第一多工器,其連接其中一該矽穿孔及其中一該矽穿孔引線;一第二多工器,其連接該第一多工器;一第一正反器,其連接該第二多工器;一反互斥或閘,其連接該第一正反器;以及一第二正反器,其連接該反互斥或閘及其中一該有效位元引線。
- 如請求項1之矽穿孔自我繞線電路,其中該內建自我繞線交換網路更包含:一交換網路元件,包含:一及閘,其連接其中一該有效位元引線; 一開關,其連接該及閘、其中一該矽穿孔引線及其中一該輸出入引線;以及一或閘,其連接該開關及該及閘。
- 如請求項3之矽穿孔自我繞線電路,該交換網路元件係呈一迭代式邏輯陣列。
- 一種繞線方法,該繞線方法應用於請求項1之矽穿孔自我繞線電路,依序包含:決定該核心電路之一優先權;令該內建自我測試電路判斷該些矽穿孔;令該內建自我測試電路產生相對於導通該些矽穿孔之複數有效位元;以及令該內建自我繞線網路選擇無錯誤之該些矽穿孔,並予以連結導通該核心電路。
- 如請求項5之繞線方法,其中令該內建自我測試電路判斷該些矽穿孔之步驟更包含:選擇對應該矽穿孔之該矽穿孔引線;儲存通過一待測矽穿孔訊號;及比較該待測矽穿孔訊號。
- 如請求項5之繞線方法,其中令該內建自我繞線網路選擇無錯誤之該些矽穿孔,並予以連結導通之步驟包含:比較該有效位元; 決定該矽穿孔是否導通;及輸出已連結訊號。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW101139290A TWI456706B (zh) | 2012-10-24 | 2012-10-24 | 矽穿孔自我繞線電路及其繞線方法 |
US13/845,059 US8754704B2 (en) | 2012-10-24 | 2013-03-17 | Through-silicon via self-routing circuit and routing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW101139290A TWI456706B (zh) | 2012-10-24 | 2012-10-24 | 矽穿孔自我繞線電路及其繞線方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201417219A TW201417219A (zh) | 2014-05-01 |
TWI456706B true TWI456706B (zh) | 2014-10-11 |
Family
ID=50484816
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW101139290A TWI456706B (zh) | 2012-10-24 | 2012-10-24 | 矽穿孔自我繞線電路及其繞線方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US8754704B2 (zh) |
TW (1) | TWI456706B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10209298B2 (en) | 2016-05-24 | 2019-02-19 | National Central University | Delay measurement circuit and measuring method thereof |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102709272B (zh) * | 2011-03-28 | 2015-01-21 | 财团法人工业技术研究院 | 硅通孔的容错单元与方法 |
WO2014146264A1 (zh) * | 2013-03-20 | 2014-09-25 | 华为终端有限公司 | 电容式开关、信号收发装置及制造方法 |
KR102125340B1 (ko) * | 2014-06-19 | 2020-06-23 | 삼성전자주식회사 | 신호 전달을 위한 주 경로 및 우회 경로를 갖는 집적 회로 및 그것을 포함하는 집적 회로 패키지 |
US9496154B2 (en) | 2014-09-16 | 2016-11-15 | Invensas Corporation | Use of underfill tape in microelectronic components, and microelectronic components with cavities coupled to through-substrate vias |
US9869713B2 (en) | 2015-03-05 | 2018-01-16 | Qualcomm Incorporated | Through-silicon via (TSV) crack sensors for detecting TSV cracks in three-dimensional (3D) integrated circuits (ICs) (3DICs), and related methods and systems |
US9401312B1 (en) * | 2015-06-11 | 2016-07-26 | Globalfoundries Inc. | TSV redundancy scheme and architecture using decoder/encoder |
US9588174B1 (en) * | 2016-03-08 | 2017-03-07 | International Business Machines Corporation | Method for testing through silicon vias in 3D integrated circuits |
US9871020B1 (en) | 2016-07-14 | 2018-01-16 | Globalfoundries Inc. | Through silicon via sharing in a 3D integrated circuit |
US11862736B2 (en) | 2018-09-17 | 2024-01-02 | GBT Tokenize Corp. | Multi-dimensional photonic integrated circuits and memory structure having optical components mounted on multiple planes of a multi-dimensional package |
US10854763B2 (en) * | 2018-09-17 | 2020-12-01 | Gbt Technologies Inc. | Multi-dimensional integrated circuit having multiple planes and memory architecture having a honeycomb or bee hive structure |
WO2020083284A1 (en) * | 2018-10-22 | 2020-04-30 | Changxin Memory Technologies, Inc. | Through-silicon via crack detecting apparatus, detecting method, and semiconductor device fabrication method having the same |
US11809797B1 (en) | 2022-07-31 | 2023-11-07 | Gbt Technologies Inc. | Systems and methods of predictive manufacturing of three-dimensional, multi-planar semiconductors |
Citations (5)
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JP2003309183A (ja) * | 2002-04-17 | 2003-10-31 | Toshiba Corp | 半導体システム、半導体システムの接続テスト方法及び半導体システムの製造方法 |
JP2007158237A (ja) * | 2005-12-08 | 2007-06-21 | Elpida Memory Inc | 積層型半導体装置 |
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KR101902938B1 (ko) * | 2012-02-14 | 2018-11-13 | 에스케이하이닉스 주식회사 | 반도체 집적회로 |
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2012
- 2012-10-24 TW TW101139290A patent/TWI456706B/zh not_active IP Right Cessation
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2013
- 2013-03-17 US US13/845,059 patent/US8754704B2/en not_active Expired - Fee Related
Patent Citations (6)
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JP2003309183A (ja) * | 2002-04-17 | 2003-10-31 | Toshiba Corp | 半導体システム、半導体システムの接続テスト方法及び半導体システムの製造方法 |
JP2007158237A (ja) * | 2005-12-08 | 2007-06-21 | Elpida Memory Inc | 積層型半導体装置 |
US20100060310A1 (en) * | 2008-09-10 | 2010-03-11 | Qualcomm Incorporated | Systems and Methods Utilizing Redundancy in Semiconductor Chip Interconnects |
TW201025543A (en) * | 2008-09-10 | 2010-07-01 | Qualcomm Inc | Systems and methods utilizing redundancy in semiconductor chip interconnects |
US8242589B2 (en) * | 2009-02-27 | 2012-08-14 | Hitachi, Ltd. | Semiconductor device |
CN102655101A (zh) * | 2012-03-30 | 2012-09-05 | 北京大学 | 3d芯片tsv互连的内建自测试及内建自修复技术 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10209298B2 (en) | 2016-05-24 | 2019-02-19 | National Central University | Delay measurement circuit and measuring method thereof |
Also Published As
Publication number | Publication date |
---|---|
US8754704B2 (en) | 2014-06-17 |
TW201417219A (zh) | 2014-05-01 |
US20140111269A1 (en) | 2014-04-24 |
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