TWI415240B - 使用介電層封裝裝置之方法 - Google Patents

使用介電層封裝裝置之方法 Download PDF

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TWI415240B
TWI415240B TW096139517A TW96139517A TWI415240B TW I415240 B TWI415240 B TW I415240B TW 096139517 A TW096139517 A TW 096139517A TW 96139517 A TW96139517 A TW 96139517A TW I415240 B TWI415240 B TW I415240B
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forming
dielectric layer
sealing material
major surface
contact interface
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TW096139517A
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TW200832665A (en
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Marc A Mangrum
Kenneth R Burch
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Freescale Semiconductor Inc
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Description

使用介電層封裝裝置之方法
此發明一般係關於封裝裝置，且更明確地說係關於使用一介電層封裝裝置。
通常，在操作期間裝置係封裝用於保護。此等封裝的裝置係與其他裝置一起放置於一印刷電路板(PCB)上。具有該等裝置之PCB係用於產品中，例如電腦或蜂巢式電話。因為存在減小產品(例如電腦與蜂巢式電話)大小的需要，需要減小該PCB與該封裝裝置的大小而不犧牲功能性。在許多情況中，需要額外的功能性。例如，可能需要在一封裝中具有多於一個裝置。此外，成本較為重要。因此，需要可增加功能性之一成本有效封裝方法。
一側接觸介面係形成於一封裝中。該側接觸介面可包括曝露於該側或一次要表面上之一導電元件。該導電元件可以能夠與其他連接器對準，例如插座或類似介面組件。該側接觸介面可包括一電阻器或電容器以(例如)增強該封裝的性能。例如，可將該電容器或電阻器用於改良靜電放電(ESD)性能或修改阻抗。在某些具體實施例中，該導電元件係一電阻器、電容器之一導電部分與一互連之一端、一導電塊、類似者或以上之組合。
圖1解說依據本發明之一具體實施例的包括一黏著劑12 之一部分、一晶粒14及一電阻器16的一聚集部位10之斷面圖。該晶粒14包括接點(例如觸點)13，其係曝露於該晶粒14之一側(即前側)。該電阻器16包括接點15，其從該電阻器16之一側延伸至另一側。在一具體實施例中，該黏著劑12係一膠帶。該聚集部位10係一嵌板之一部分，其在一具體實施例中包括複數個相同的聚集部位10而在另一具體實施例中包括並不彼此相同的複數個聚集部位10。藉由在一黏著劑12上放置已通過測試要求(例如電、機械或兩者)的晶粒(即已知較佳晶粒)、離散裝置、類似者或以上之組合來形成嵌板。例如，可將晶粒以一陣列形式放置來形成一嵌板。可使用該晶粒之任一配置。例如，可將該晶粒以一格柵形式配置來形成一圓形，非常像晶粒在一晶圓上的配置。該嵌板本質上係使用已知較佳晶粒重建。如進一步說明將明白，該聚集部位10將變成一(單一)封裝。因而，在圖1所解說之具體實施例中，該封裝將包括晶粒14與電阻器16。
圖2解說依據一具體實施例在該晶粒14與該電阻器16之上形成一密封材料18之後的聚集部位10。可使用任何可購得密封材料。例如，該密封材料可以係環氧基與可熱固化的。在一具體實施例中，該密封材料係大致300至大致500微米厚。因為該黏著劑12與該晶粒14之一側及該電阻器16之一側相接觸，故該密封材料18係形成於不與該黏著劑12接觸的晶粒14與電阻器16之(五個)側上。在所示具體實施例中，與該密封材料18接觸的晶粒14之五個側包括除使該 等觸點13曝露之側以外的晶粒14之所有側。因此，該密封材料18係形成於該晶粒14與該電阻器16之側之上與相鄰處。因而，該密封材料18係形成於該晶粒14與該電阻器16之間。
圖3解說依據一具體實施例在移除該黏著劑12之後的聚集部位10。一旦形成該密封材料18，晶粒14與電阻器16便係透過該密封材料18實體地耦合在一起並因而不再需要該黏著劑12。該黏著劑12可使用任何程序移除，例如熱(例如UV(紫外)光與IR(紅外)光)、一溶劑、類似者或以上的組合。在移除該黏著劑12之後，翻轉該聚集部位10以使該晶粒14之觸點13處於頂部並係曝露。在翻轉該聚集部位10之後，圖式中的電阻器16現在顯示先前解說的電阻器16與晶粒14之相同側的該晶粒14之相對側。
圖4解說依據一具體實施例在晶粒14與電阻器16之上形成一第一介電層20之後的聚集部位10。該第一介電層20可以係一傳統旋塗聚合物或藉由任何適合程序形成的任何其他適合材料。在一具體實施例中，該第一介電層10可以係一大致20微米厚的旋塗聚合物。
圖5解說依據一具體實施例在形成一電阻器通孔22與晶粒通孔24之後的聚集部位10。該等電阻器與晶粒通孔22與24係藉由圖案化與蝕刻該第一介電層20以曝露該等接點15之一者之至少一部分與該等觸點13之各觸點之至少一部分來形成。在所解說具體實施例中，該電阻器通孔22係形成於最接近該晶粒14的接點15(即內部接點15)之上。如進一 步說明之後將更佳地理解，在所解說具體實施例中不對另一接點15(即外部接點15)形成一電阻器通孔，因為在稍後的處理中此接點15將係曝露以形成一連接器來將該電阻器耦合至一外部裝置。
圖6解說依據一具體實施例在形成對該電阻器16之接點15的通道28與對該晶粒14的晶粒通道30、32及34與互連36、38及40之後的聚集部位10。(該等通道係形成於該等通孔內的導體。)用於填充該等電阻器與晶粒通道28、30、32及34並形成該等互連36、38及40的材料可以係任何導電材料，例如銅。可使用任何適合程序(例如化學汽相沈積(CVD)、原子層沈積(ALD)、電鍍、類似者及以上之組合)沈積該材料來填充該等通孔22與24並在該第一介電層20之上形成一足夠厚的材料。可圖案化位於該等電阻器與晶粒通道28、30、32及34外部並在該第一介電層20之上的材料以形成該等互連36、38及40。該互連36透過該電阻器通道28與該晶粒通道30將該電阻器16耦合至該晶粒14。該互連38在進出頁面的方向上行進並可將該晶粒14耦合至未解說的其他裝置。該互連40在進出頁面的方向上行進至晶粒14右邊並可將該晶粒14耦合至未解說的其他裝置。該等互連28與40的長度不必相同。熟習此項技術者應認識到圖6中解說的互連36、38及40僅係可形成之互連的範例。
圖7解說在形成第二介電層42之後的聚集部位10。該第二介電層42可以係一旋塗聚合物或另一適合的材料。該第二介電層42可以係與該第一介電層20相同的材料或不同的 材料並可以或可以不藉由與該第一介電層20相同的程序來形成。該第二介電層42係形成於該等互連36、38及40之上。在一具體實施例中，該第二介電層42係大致20微米厚。
圖8解說依據一具體實施例在該第二介電層42中形成一通孔44之後的聚集部位10。可藉由圖案化與蝕刻該第二介電層42來形成該通孔44。在所解說具體實施例中，該通孔44曝露該互連38的至少一部分。熟習此項技術者明白可在另一互連(例如互連40)之上形成該通孔44。
圖9解說依據一具體實施例在該第二介電層42之上形成一電阻器46之後的聚集部位10。該電阻器46包括接點45，其類似於該電阻器16之接點15。可使用一取置工具來將該電阻器46放置於該電阻器16上方並大致與其對齊。在此具體實施例中，該接點45之端與該等接點15之端彼此大致對齊。傳統取置工具可將該電阻器46放置於一預定位置的大致10微米或更少範圍內並因此該等電阻器46與16可實質上彼此對齊。然而，該等電阻器46與16可彼此不對齊。因而，該等電阻器46與16可在任一方向上相對於彼此而交錯。較佳的係在該第二介電層42未充分乾燥時放置該電阻器46。因而，該第二介電層42將係黏性的或黏的而該電阻器46將黏著於該第二介電層42而無需任何額外的黏著層。
圖10解說依據一具體實施例在形成一互連50之後的聚集部位10。該互連50可以係任何導電材料，例如銅。在一具體實施例中，為形成該互連50，沈積一材料(例如藉由 CVD、ALD、電鍍、類似者或以上之組合)並接著將其圖案化。該互連50透過通道48與32、接點14與45及該互連38將該電阻器46(即其內部接點45)耦合至該晶粒14。在一具體實施例中，該通道48係藉由圖案化該第二介電層42、在該聚集部位10之上形成一導電材料及圖案化該導電材料以形成該通道48來形成。在一具體實施例中該通道48係在放置該電阻器46之前形成而在另一具體實施例中其係在放置該電阻器46之後形成。在一具體實施例中，可在該聚集部位10之上形成一光阻層(例如一厚膜類型)，從而覆蓋該電阻器46但曝露將係耦合至隨後形成之互連50的接點45。該光阻可針對該聚集部位10定義迹線選路。接下來，形成一導電材料，例如銅。即使該電阻器46未藉由該光阻層覆蓋，若該電阻器46(例如)具有一陶瓷主體則該導電材料仍可不黏著於其。接下來，可移除該光阻以形成該互連50。
圖11解說依據一具體實施例在形成一層52之後的聚集部位10。該層52可藉由相同程序形成並係與該第二介電層42或該第一介電層20相同的材料製成。在一具體實施例中，第三介電層20係一囊封材料。
圖12解說依據一具體實施例的具有切斷線54與56之聚集部位10。在所解說具體實施例中，該切斷線54在該等電阻器16與46附近切斷該聚集部位10，但不曝露該等電阻器16與46。在一具體實施例中，當該切斷線54在該等電阻器16與46附近切斷該聚集部位10時，該切斷線54在該等電阻器16與46之最接近邊緣的0.025英吋之內切斷該聚集部位。 在一具體實施例中，當該切斷線54在該等電阻器16與46附近切斷該聚集部位10時，該切斷在切斷與放置程序的精確限制內。該切斷可藉由任何程序發生，例如使用鋸、雷射或其他構件。在所解說具體實施例中，該切斷線56在該晶粒14附近切割該聚集部位10，但不曝露該晶粒14。因而，該密封材料18(及該第三介電層20，若其係一密封材料)係被切割以形成複數個密封材料18(及該第三介電層20，若其係一密封材料)之側。
圖13解說依據一具體實施例在沿該等切斷線54與56切割以形成次要表面64與62之後的聚集部位10。該聚集部位10具有主要表面58與60及次要表面62與64。該等主要表面58與60彼此相對而該等次要表面62與64彼此相對。在一具體實施例中，該主要表面58係該聚集部位10的頂部而該主要表面60係該聚集部分10的底部。該等次要表面62與64係該聚集部位10的邊緣。
圖14解說依據一具體實施例在沿當切割以曝露一側接觸介面之一部分時形成的複數個側之一者移除該密封材料18與該層52之一部分之後的聚集部位10。該移除可藉由各種程序發生，例如使用一雷射或藉由蝕刻掉該密封材料18與該介電層52之部分。在所解說具體實施例中，存在兩個側接觸介面。第一側接觸介面包括該互連36、該電阻器通道28及該電阻器16。該第一側接觸介面係沿該聚集部位10(其現在係一封裝)之一次要表面64曝露並係透過該晶粒通道30耦合至該晶粒14，其係藉由密封材料在五個側上包 圍。第二側接觸介面包括該互連38、該通道48、該互連50及該電阻器46。該第二側接觸介面係透過該晶粒通道32耦合至該晶粒14。在所解說具體實施例中，該等側接觸介面係沿一次要表面64曝露並係透過一通道耦合至一裝置(例如該晶粒14)；用於該耦合的任何額外的通道或互連係該側接觸介面之部分。
圖15解說曝露側接觸介面之後的聚集部位10之次要表面64。在所解說具體實施例中，在該聚集部位10(或封裝)中存在多個電阻器46與16。因而，存在多個接點15與45。多個接點15與45一起形成可用於將該封裝10耦合至另一裝置之一連接器(或多個連接器)。例如，可經由該連接器將該封裝10耦合至一行動電話、一電腦或另一裝置。
圖16解說依據另一具體實施例的具有一外部互連72之聚集部位10，其於此階段係一封裝。該聚集部位10不包括該電阻器16。因此，該互連36不耦合至該電阻器16而可以係耦合至該聚集部位10中的另一裝置(未顯示)。或者，該互連36可不存在。該聚集部位10包括耦合至該電阻器46之一外部互連72。在所解說具體實施例中，該外部互連72係透過一電阻器通道70耦合至最接近該聚集部位10之邊緣的接點45(即外部接點45)。可藉由圖案化該層52以形成一電阻器通孔並接著使用一導電材料(例如銅)填充該通孔來形成該電阻器通道70與該外部互連72。該導電材料係形成於該層52之上。接著，可圖案化處於該層52之上的導電材料以形成該外部互連72。在形成該外部互連72之後，形成一層 74，其可以係任何介電層或一密封材料。在所解說具體實施例中，該側接觸介面包括該互連50、該電阻器46(具有其接點45)、該通道70及該外部互連72。在形成該層74之後，如圖12來切割該聚集部位10。如圖16所示，可切割該聚集部位10以曝露該外部互連72。在一具體實施例中，在該切割程序期間移除該外部互連72之一部分。較佳的係該切割不移除該電阻器46之一部分。因此，可使該電阻器46與該外部互連72交錯，如圖16所示。在切割該聚集部位10以形成該封裝之後，可不移除一介電質或密封材料之部分。換言之，可不曝露該電阻器46。該主要部分58現處於該層74而非該層52之上。
圖17解說依據一具體實施例在曝露該外部互連72之後的聚集部位10之次要表面64。在此具體實施例中，不曝露該電阻器46。(但是，在另一具體實施例中，與該外部互連72一起曝露該(等)電阻器46。)該複數個外部互連72係用作連接器介面。該(等)電阻器46並非該連接器介面之部分，因為不將其曝露。然而，在所解說具體實施例中該(等)電阻器46係該連接器介面之部分，因為該(等)電阻器46係耦合至該外部互連。在一具體實施例中，該(等)電阻器46不存在，因此該外部互連係耦合至該互連50而無一電阻器。
可對以上具體實施例進行各種修改。例如，該等電阻器16與46可以係其他元件，例如電容器、電感器、導電塊、類似者或以上之組合。此外，用作一連接器或一連接器之部分的側接觸介面之曝露部分可以係一互連之一部分(例 如一端部)。儘管圖9至15解說兩個電阻器(電阻器16與46)，可使用任何數目的電阻器。例如，可僅存在一電阻器。儘管在圖9至15中該電阻器16與該晶粒14處於相同水平平面或層，但該電阻器16可處於與該晶粒14不同的層。例如，該電阻器16可處於該晶粒14上面之一層或該晶粒14可處於該電阻器16上面之一層。同樣，儘管在圖9至15中該等電阻器16與46處於不同層，但其可處於與彼此相同的層。在圖12中，該切斷線54係選擇以使得在該切割程序之後不曝露該等電阻器16與46。然而，可以選擇該切斷線54以使得在該切割程序之後該等電阻器16與46曝露。在一具體實施例中，可在該切割程序期間移除該等接點15與45之部分。在圖14中，移除該密封材料18與該層52之部分。在另一具體實施例中，移除該等介電層20與42之部分及密封材料18與層52之額外部分。此可使用一磨光或研磨程序以曝露該等電阻器16與46之接點15與45來發生。儘管未解說，但可在該封裝的主要表面58與60或次要表面62與64上形成焊球或其他外部連接。在一具體實施例中，在該主要表面60上形成焊球並將該側接觸介面耦合至天線，因為該等側接觸介面係比該等焊球更短的該封裝外的電路徑。此外，可在該封裝中形成任何數目之晶粒、離散裝置(例如電阻器等)、導電插塞、類似者或以上之組合。圖式中解說的若干電阻器與晶粒僅出於解說目的。因此，僅一晶粒可形成於該封裝中並具有一側接觸介面，其可以或可以不包括離散裝置，例如電阻器。此外，應明白該側接觸介面 可相對於該等次要表面64或62齊平或凹陷。此外，若存在多於一個側接觸介面，則每一側接觸介面皆可以係齊平或凹陷任一距離的且其皆不必齊平或凹陷相同距離。此外，儘管僅顯示側接觸介面係曝露於該次要表面62上，替代性地或除曝露於該次要表面62上的側接觸介面之外可在該次要表面64上曝露一或多個側接觸介面。
熟習此項技術者應知道所解說側接觸介面僅係各種側接觸介面的範例。一般而言，一側接觸介面係曝露於該封裝之一次要表面上。該側接觸介面可使用一互連、電阻器、電容器、電感器、金屬塊或類似者來終止。該側接觸介面允許該封裝之邊緣處的電連接。該側接觸介面係耦合至該封裝內之一裝置並能夠耦合至一外部裝置。例如，使用者可將一外部裝置插入該側接觸介面中。
至此，應明白已提供用於使用一積累技術在一封裝內製造與嵌入連接器或電介面之一低成本方法用於產生一封裝。所得封裝可以係一再分配晶片封裝(RCP)，因為該等互連係在一或多個層之間選路或再分配以最小化該封裝的面積。不需要導線焊接或傳統基板(引線框或封裝基板)來形成一RCP。此增加產量並減少成本。
在以上說明書中，已參考特定具體實施例說明本發明。然而，熟習此項技術者應明白可進行各種修改與改變而不脫離如以下申請專利範圍中所提出的本發明之範疇。因此，說明書及圖式應視為解說意義而非限制意義，且所有此類修改旨在包含於本發明之範疇內。
益處、優點、問題解決方式及可能使任何益處、優點或解決方式出現或變得更明顯的任何元件均不應視為任何或所有請求項之關鍵、要求或基本特徵或元件。將本文所用的術語"一"或"一個"定義為一或多於一個，即使在申請專利範圍或說明書中其他元件係清楚陳述為係一或多個。將本文所用的術語"複數個"定義為兩個或兩個以上。將本文所用的術語另一個定義為至少一第二個或更多。將本文所用的術語"耦合"定義為連接，雖然不一定係直接連接，也不一定係機械連接。此外，在本說明及申請專利範圍中，術語"前面"、"後面"、"頂部"、"底部"、"之上"、"之下"及類似者(若存在)係用於說明之目的，而不一定係用於說明永久相對位置。應明白，在適當情況下，如此使用的術語可互換以使得本文所說明的本發明之具體實施例能夠(例如)以除了本文所解說或另外說明的方位之外的其他方位進行運作。
10‧‧‧聚集部位/封裝
12‧‧‧黏著劑
13‧‧‧觸點
14‧‧‧晶粒/第一裝置
15‧‧‧接點
16‧‧‧電阻器/第一裝置/側接觸介面
18‧‧‧密封材料
20‧‧‧介電層
22‧‧‧電阻器通孔
24‧‧‧晶粒通孔
28‧‧‧通道
30‧‧‧晶粒通道
32‧‧‧晶粒通道
34‧‧‧晶粒通道
36‧‧‧互連/側接觸介面
38‧‧‧互連
40‧‧‧互連
42‧‧‧第二介電層
44‧‧‧通孔
45‧‧‧接點
46‧‧‧電阻器/側接觸介面/第一裝置
48‧‧‧側接觸介面/通道
50‧‧‧互連/側接觸介面
52‧‧‧層
58‧‧‧主要表面
60‧‧‧主要表面
62‧‧‧次要表面/側
64‧‧‧次要表面/側
70‧‧‧電阻器通道/側接觸介面
72‧‧‧外部互連/側接觸介面
74‧‧‧層
本發明係藉由範例方式解說且不受附圖的限制，其中相似參考指示類似元件。熟習此項技術者應明白，圖式中的元件係基於簡單及清楚目的而解說且不必按比例繪製。
圖1解說依據本發明之一具體實施例的包括一黏著劑之一部分、一第一裝置及一第二裝置的一部分之一聚集部位之斷面圖。
圖2解說依據一具體實施例在該晶粒與該第二裝置之上形成一密封材料之後的圖1之聚集部位。
圖3解說依據一具體實施例在移除該黏著劑之後的圖2之聚集部位。
圖4解說依據一具體實施例在形成一第一介電層之後的圖3之聚集部位。
圖5解說依據一具體實施例在形成一通孔之後的圖4之聚集部位。
圖6解說依據一具體實施例在形成一通道與互連之後的圖5之聚集部位。
圖7解說依據一具體實施例在形成該第二介電層之後的圖6之聚集部位。
圖8解說依據一具體實施例在該第二介電層中形成一通孔之後的圖7之聚集部位。
圖9解說依據一具體實施例在該第二介電層之上形成一第三裝置之後的圖8之聚集部位。
圖10解說依據一具體實施例在形成一互連之後的圖9之聚集部位。
圖11解說依據一具體實施例在形成一層之後的圖10之聚集部位。
圖12解說依據一具體實施例的具有切斷線的圖11之聚集部位。
圖13解說依據一具體實施例在沿該等切斷線切割以形成次要表面之後的圖12之聚集部位。
圖14解說依據一具體實施例在沿當切割以曝露一側接觸介面之一部分時形成的複數個側之一者移除該密封材料與 該層之一部分之後的圖13之聚集部位。
圖15解說依據一具體實施例在曝露側接觸介面之後的圖14之聚集部位之次要表面。
圖16解說依據一具體實施例的具有另一側接觸介面之一聚集部位。
圖17解說依據一具體實施例的圖16之聚集部位之次要表面。
10‧‧‧聚集部位/封裝
13‧‧‧觸點
14‧‧‧晶粒/第一裝置
15‧‧‧接點
16‧‧‧電阻器/第一裝置/側接觸介面
18‧‧‧密封材料
20‧‧‧介電層
28‧‧‧通道
30‧‧‧晶粒通道
32‧‧‧晶粒通道
34‧‧‧晶粒通道
36‧‧‧互連/側接觸介面
38‧‧‧互連
40‧‧‧互連
42‧‧‧第二介電層
45‧‧‧接點
46‧‧‧電阻器/側接觸介面/第一裝置
48‧‧‧側接觸介面/通道
50‧‧‧互連/側接觸介面
52‧‧‧層
58‧‧‧主要表面
60‧‧‧主要表面
62‧‧‧次要表面/側
64‧‧‧次要表面/側

Claims (20)

  1. 一種封裝具有一第一主要表面與一第二主要表面之一第一裝置的方法，其包含：在該第一裝置之一第二主要表面之上與該第一裝置之側周圍形成一密封材料並使該第一裝置之該第一主要表面曝露；在該第一裝置之該第一主要表面之上形成一第一介電層；形成一側接觸介面，其具有至少一部分在該第一介電層之上；切割該密封材料以形成複數個該密封材料之側；以及沿該複數個側之一第一側移除該密封材料之一部分以沿該複數個側之該第一側曝露該側接觸介面之一部分。
  2. 如請求項1之方法，其進一步包含：在形成該密封材料之該步驟之前將膠帶施加至該第一主要表面；以及在形成該第一介電層之該步驟之前移除該膠帶。
  3. 如請求項1之方法，其進一步包含：在該第一介電層中形成至該第一裝置之一第一接點的一第一通道；其中形成該側接觸介面之該步驟的進一步特徵為該側接觸介面在該第一通道與該複數個側之該第一側之間包含一第一互連。
  4. 如請求項3之方法，其中形成該側接觸介面之該步驟的 進一步特徵為該側接觸介面進一步在該互連與該複數個側之該第一側之間包含一第二裝置。
  5. 如請求項4之方法，其中形成該側接觸介面之該步驟的進一步特徵為：透過該第一介電層在該第二裝置之一第一接點與該第一互連之間形成一第二通道。
  6. 如請求項4之方法，其中形成該側接觸介面之該步驟的進一步特徵為該第二裝置係形成於該第一介電層之上。
  7. 如請求項4之方法，其中形成該第一介電層之該步驟的進一步特徵為形成於該第二裝置之上。
  8. 如請求項1之方法，其中形成該側接觸介面之該步驟的進一步特徵為：透過該第一介電層在一第二裝置之一第一接點與該通道與該複數個側之該第一側之間之一第一互連之間形成一第一通道。
  9. 如請求項1之方法，其中形成該密封材料之該步驟的進一步特徵為該密封材料係環氧基與可熱固化的。
  10. 如請求項1之方法，其中形成該第一介電層之該步驟的進一步特徵為該第一介電層係一聚合物介電質。
  11. 一種封裝一裝置之方法，該方法包含：將膠帶施加至一第一裝置之一第一主要表面；形成一密封材料，其在該第一裝置之一第二主要表面之上與該第一裝置之側周圍用於為處理該第一裝置提供實體支撐； 在形成該密封材料之後從該第一主要表面移除該膠帶；在該第一裝置之該第一主要表面之上沈積屬於一聚合物介電質之一第一介電層；形成一側接觸介面，其具有至少一部分在該第一介電層之上；切割該密封材料以形成複數個該密封材料之側；以及沿該複數個側之一第一側移除該密封材料之一部分以沿該複數個側之該第一側曝露該側接觸介面之一部分。
  12. 如請求項11之方法，其中施加膠帶之該步驟的進一步特徵為該第一裝置具有一接點，其進一步包含：透過該第一介電層蝕刻一通孔；以及在該通孔中形成一導體，其中該通道接觸該側接觸介面與該第一裝置之該第一接點。
  13. 如請求項11之方法，其中形成一側接觸介面之該步驟的進一步特徵為該側接觸介面包含一第二裝置，其係連接於該通道與該複數個側之該第一側之間。
  14. 如請求項13之方法，其中移除該密封材料之一部分之該步驟的進一步特徵為曝露該第二裝置之一接點。
  15. 如請求項11之方法，其中：形成一側接觸介面之該步驟的進一步特徵為該側接觸介面包含延伸至該第一側之一互連層；以及移除該密封材料之一部分之該步驟的進一步特徵為曝露該互連層之一端部。
  16. 如請求項11之方法，其進一步包含在該側接觸介面之上形成一第二介電層。
  17. 如請求項11之方法，其中將膠帶施加至一第一裝置之該第一主要表面之該步驟的進一步特徵為該第一裝置係一半導體晶粒。
  18. 一種封裝一裝置之方法，該方法包含：將具有黏著性質之一膠帶施加至一第一裝置之一第一主要表面與一第二裝置之一第一主要表面，其中該第一裝置沿該第一主要表面具有一第一接點而該第二裝置具有一第一接點與一第二接點；在該第一裝置之一第二主要表面與該第二裝置之第二主要表面之上並沿該等第一與第二裝置之側形成一密封材料，其中該密封材料具有處於該等第一與第二裝置之該等第二主要表面之上的一第一主要表面及與該第一主要表面相對的一第二主要表面；移除該膠帶；在該第一裝置之該第一主要表面與該第二裝置之該第一主要表面之上形成一第一介電層；在該第一介電層中形成一第一通孔與一第二通孔；透過該等第一與第二通孔形成從該第一裝置之該第一接點至該第二裝置之該第一接點的一第一導體；切割該密封材料以在該密封材料之該等第一與第二主要表面之間形成複數個密封材料之側；以及沿該複數個側之一第一側移除該密封材料之一部分以 沿該複數個側之該第一側曝露該第二裝置之該第二接點。
  19. 如請求項18之方法，其中該第一裝置係一半導體晶粒而該第二裝置包含一電阻器。
  20. 如請求項18之方法，其中該第一裝置具有一第二接點，其進一步包含：在該第一介電層之上形成一第三裝置，其中該第三裝置具有一第一接點與一第二接點；在該第一介電層與該第三裝置之上形成一第二介電層；透過該第一介電層形成一第三通道；透過該第二介電層形成一第四通道；以及透過該等第三與第四通道形成從該第一裝置之該第二接點至該第三裝置之該第一接點的一第二導體；其中移除該密封材料之一部分之該步驟的進一步特徵如沿該密封材料之該第一側曝露該第三裝置之第二接點。
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