TWI415228B - 半導體封裝結構、覆晶封裝、及半導體覆晶封裝的形成方法 - Google Patents

半導體封裝結構、覆晶封裝、及半導體覆晶封裝的形成方法 Download PDF

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TWI415228B
TWI415228B TW099115076A TW99115076A TWI415228B TW I415228 B TWI415228 B TW I415228B TW 099115076 A TW099115076 A TW 099115076A TW 99115076 A TW99115076 A TW 99115076A TW I415228 B TWI415228 B TW I415228B
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substrate
flip chip
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semiconductor
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TW201123370A (en
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Tsorng Dih Yuan
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2224/732—Location after the connecting process
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    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
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Description

半導體封裝結構、覆晶封裝、及半導體覆晶封裝的形成方法
本發明係關於覆晶封裝，更特別關於具有較佳之熱及機械性質的覆晶封裝。
在半導體晶片封裝工業中，帶有積體電路之晶片一般係安裝於封裝載體如基板、電路板、或導線架上，使晶片電型連接至封裝外部。此種封裝法稱為覆晶安裝法，其中晶片的主動面係以反裝的方式安裝於基板上，且晶片與基板一般為熱膨脹係數不匹配的不同材料。如此一來當元件生熱造成熱應力時，晶片將會明顯地產生尺寸變化，且晶片與基板之間的電性連接也會明顯翹曲。若不抵消熱膨脹係數不匹配的問題，將會劣化晶片效能、損傷晶片與基板之間的焊料連接、或造成封裝失效。
目前覆晶封裝在市場上正面臨越來越多的挑戰。當晶片尺寸增加時，晶片與基板之間的熱膨脹係數不匹配所造成的效應也越明顯。在堆疊晶粒封裝中，層狀晶粒與封裝之間的熱膨脹係數不匹配會比單晶粒封裝更大。此外，高效晶粒與環保需求的潮流，將使改善封裝可信度的方法越來越困難且具挑戰性。
微電子工業界已提供多個方法增加覆晶封裝的可信度。一般常將封裝材料或底部填充材料填入晶片與基板之間的縫隙，可在熱循環時降低施加於封裝的應力。此外，一般常用固定物圍繞封裝組合中的晶片。由於固定物為高剛性材料，封裝組合較不會產生翹曲。為了進一步增加覆晶封裝的剛性，一般將散熱器或散熱片安裝於封裝頂。上述作法可平衡晶片與基板之間因熱膨脹係數不匹配所造成的力，並幫助散熱。其他改善方法則採用新穎基板材料如無機陶瓷，以改善覆晶封裝的可信度。
雖然習知技藝可改善覆晶封裝的熱及機械性質，但在元件與系統等級的應用上仍有限制。如此一來，習知技藝將無法最佳化設計等級。此外，部份習知技藝僅限於應用在翹曲小於200微米的封裝中。
由於上述或其他理由，目前亟需改善覆晶封裝的熱及機械性質。
本發明提供一種半導體封裝結構，包括第一基板，具有第一表面，以及位於第一表面相反側之第二表面；半導體晶片，以焊料凸塊安裝於第一基板之第一表面上；導熱固定物，安裝於第一基板之第一表面上並圍繞晶片，以定義空洞區於導熱固定物與晶片之間；一或多個模塑複合材料位於空洞區中；以及第二基板，以焊球安裝於第一基板之第二表面上。
本發明亦提供一種覆晶封裝，包括第一基板，具有第一表面，以及位於第一表面相反側之第二表面；半導體晶片，以焊料凸塊安裝於第一基板之第一表面上；導熱固定物，安裝於第一基板之第一表面上並圍繞晶片，以定義空洞區於導熱固定物與晶片之間；一或多個模塑複合材料位於空洞區中；以及第二基板，以焊球安裝於第一基板之第二表面上。
本發明更提供一種半導體覆晶封裝的形成方法，包括提供第一基板，第一基板具有第一表面，以及位於第一表面相反側之第二表面；以焊料凸塊安裝半導體晶片於第一基板之第一表面上；安裝導熱固定物於第一基板之第一表面上並圍繞晶片，以定義空洞區於導熱固定物與晶片之間；射出低黏度狀態之模塑複合材料於空洞區中；固化模塑複合材料以硬化模塑複合材料；以焊球安裝第二基板於第一基板之第二表面上。
可以理解的是，下述內容提供多種實施例以說明本發明的多種特徵。為了簡化說明，將採用特定的實施例、單元、及組合方式說明。然而這些特例並非用以限制本發明。為了簡化說明，本發明在不同圖示中採用相同符號標示不同實施例的類似元件，但上述重複的符號並不代表不同實施例中的元件具有相同的對應關係。此外，形成某一元件於另一元件上包含了兩元件為直接接觸，或者兩者間隔有其他元件這兩種情況。
第1圖顯示本發明一實施例中半成品的覆晶封裝10之剖視圖。覆晶封裝10包含半導體元件如積體電路晶片(以下簡稱晶片30)。晶片30具有後表面32，與位於後表面32相反側之前表面34。焊料凸塊40係連接至晶片30之前表面34上的接觸墊(未圖示)。焊料凸塊40將晶片30固定至晶片30下的第一基板20。第一基板20可為無機基板如氧化鋁，或有機基板如FR-4或增層基板。焊料凸塊40接觸第一基板20之後表面42的接觸墊(未圖示)。雖然此例採用焊料凸塊40將晶片30耦合至第一基板20，但本技藝人士應理解其他可將晶片30耦合至第一基板20的方法亦適用於本發明。
為了改善覆晶封裝組合中電性連接的可信度，可將封裝材料或底部填充材料50填入晶片30與第一基板20之間的縫隙中。底部填充材料50具有高拉伸係數，可固定覆晶封裝10以保護晶片不受彎曲外力損害，以增加覆晶封裝10的疲勞壽命。底部填充材料50可包含市售環氧樹脂高分子。
焊球60可固定於第一基板20之前表面44上的接觸墊(未圖示)，使其連接至第二基板70。第二基板70可為印刷線路板(有時稱作印刷電路板)或本技藝人士所知的多層組件。
為了進一步增加覆晶封裝10的剛性，本發明一實施例將一或多個導熱固定物(stiffener) 2安裝在第一基板20之後表面42上，且導熱固定物22圍繞晶片30以定義空洞區110於兩者之間。導熱固定物22可由底膠5固定至第一基板。底膠5包含黏膠或黏液材料如熱脂、銀膠、或焊料。底膠5可為機械層狀散佈法形成之薄層。此外，底膠5的形成方法可採用毛細作用。在一實施例中，導熱固定物22包含銅、碳化銅、銅鎢合金、鋁矽碳化物、鋁、不銹鋼、鎳、或鍍鎳銅。為了符合特殊應用之特定設計，導熱固定物22亦可為本技藝人士所知之其他具有高熱膨脹係數的材料。
如第1圖所示，本發明一實施例可將一或多個塑模複合材料(molding compound material) 25部份或實質上填充於空洞區110中。塑模複合材料25可固定覆晶封裝10。塑模複合材料25與第一基板20之接觸表面越大越好，可增強覆晶封裝10的結構以避免其扭曲或翹曲。在本發明另一實施例中，塑模複合材料25具有好的熱性質，使晶片30的熱能有效分散至環境、散熱器、或散熱片。在本發明又一實施例中，塑模複合材料25與第一基板20之熱膨脹係數(CTE)實質上相同。在本發明更一實施例中，塑模複合材料25、晶片30、與第一基板20之CTE實質上相同。由於塑模複合材料25、晶片30、及/或第一基板20之CTE實質上相同，覆晶封裝10在熱產生時，覆晶封裝的形變與封裝內電性連接之熱應力均明顯降低。
在一實施例中，可將較低黏度的塑模複合材料25施加至空洞區110中，接著再以後續的固化步驟硬化塑模複合材料25。將塑模複合材料25施加或射至空洞區110中的方法可為注射器或泵浦。可採用任何形態的注射器將塑模複合材料25施加至空洞區110中。在本發明一實施例中，未固化的黏態塑模複合材料25可為介電材料如具有高強度、好的熱性質、及抗晶片製程高溫的環氧樹脂材料。未固化的液態環氧樹脂可具有較低黏度，以利射出成型製程。在一實施例中，塑模複合材料25為市售環氧樹脂如購自Masterbond Corporation的Masterbond SuperemeTM 10AOHT。
在本發明某些實施例中，塑模複合材料25亦可包含聚酯材料、熱塑性材料、介電材料、金屬、陶瓷、或含矽材料。塑模複合材料25可包含其他具有高強度、好的熱性質、抗高溫、及可由射出成型法或其他方法施加至空洞區等性質的其他材料。
在某些實施例中，塑模複合材料25之厚度介於約0.5mm至約5mm之間。塑模複合材料25之形狀可為方形、矩形、菱形、橢圓形、或多邊形。本技藝人士可以理解的是，塑模複合材料25之形狀取決於第一基板20之尺寸及形狀。塑模複合材料25之尺寸亦可取決於晶片30的尺寸及形狀。當晶片越大時，需採用越大尺寸的塑模複合材料以適當地增加覆晶封裝10的剛性及/或散熱性。為了符合特殊應用的設計標準，亦可採用其他形狀或組態的塑模複合材料25。
在本發明另一實施例中，覆晶封裝10亦包含散熱器80，如第2圖所示。散熱器80可避免覆晶封裝10過度翹曲，並可幫助散熱。散熱器80係安裝於導熱固定物22上以封裝其中的晶片30，並平衡晶片30與第一基板20之間因熱膨脹係數不匹配所造成的力。散熱器80與導熱固定物22可為一體成型或分開的單元，且實質上包含具有較高熱膨脹係數的材料。在一實施例中，散熱器80包含銅鎢合金、鋁矽碳化物、鋁、不銹鋼、銅、鎳、或鍍鎳銅。為了符合特殊應用之特定設計，散熱器80亦可為本技藝人士所知之其他具有高熱膨脹係數的材料。
此外，散熱器80與導熱固定物22可包含本技藝人士所知的其他具有高熱膨脹係數的材料。然而在一實施例中，散熱器80與導熱固定物22採用實質上相同的材料，因此具有實質上相同的熱膨脹係數。散熱器80係以頂膠7耦合至導熱固定物22。
如第2圖所示，覆晶封裝10可包含熱界面材料(TIM)52於晶片30與散熱器80之間。熱界面材料52可將晶片30生成的熱傳送至散熱器80，散熱器80再將熱散佈至其他單元如散熱片或環境中。熱界面材料52可為熱脂型材料或剛性材料(如環氧樹脂或焊料)。
在本發明上述實施例中，已提供具有較佳熱與機械性質之覆晶封裝10，且此覆晶封裝10可應用於元件與系統等級並最佳化設計等級。雖然第1及2圖之塑模複合材料25係應用於覆晶封裝結構，但本技藝人士應理解可根據本發明將塑模複合材料25應用於任何型態的半導體封裝中。
雖然本發明已以數個較佳實施例揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作任意之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
5‧‧‧底膠
7‧‧‧頂膠
10‧‧‧覆晶封裝
20‧‧‧第一基板
22‧‧‧導熱固定物
25‧‧‧塑模複合材料
30‧‧‧晶片
32‧‧‧晶片30之後表面
34‧‧‧晶片30之前表面
40‧‧‧焊料凸塊
42‧‧‧第一基板20之後表面
44‧‧‧第一基板20之前表面
50‧‧‧底部填充材料
52‧‧‧熱界面材料
60‧‧‧焊球
70‧‧‧第二基板
80‧‧‧散熱器
110‧‧‧空洞區
第1圖係本發明一實施例中，半成品之覆晶封裝的剖視圖；以及第2圖係本發明另一實施例中，半成品之覆晶封裝的剖視圖。
5．．．底膠
10．．．覆晶封裝
20．．．第一基板
22．．．導熱固定物
25．．．塑模複合材料
30．．．晶片
32．．．晶片30之後表面
34．．．晶片30之前表面
40．．．焊料凸塊
42．．．第一基板20之後表面
44．．．第一基板20之前表面
50．．．底部填充材料
52．．．熱界面材料
60．．．焊球
70．．．第二基板
110．．．空洞區

Claims (9)

  1. 一種半導體覆晶封裝，包括：一第一基板，具有一第一表面，以及位於該第一表面相反側之一第二表面；一半導體晶片，以焊料凸塊安裝於該第一基板之第一表面上；一導熱固定物，安裝於該第一基板之第一表面上並圍繞該晶片，以定義一空洞區於該導熱固定物與該晶片之間；一或多個模塑複合材料位於該空洞區中；一底部填充層填充並硬化於該半導體晶片與該第一基板之間的縫隙，其中該模塑複合材料位於該底部填充層與該導熱固定物之間；以及一第二基板，以焊球安裝於該第一基板之第二表面上。
  2. 如申請專利範圍第1項所述之半導體覆晶封裝，更包括一散熱器安裝於該導熱固定物上，以密封該導熱固定物之中的半導體晶片。
  3. 如申請專利範圍第2項所述之半導體覆晶封裝，更包括一熱介面材料位於該半導體晶片與該散熱器之間。
  4. 如申請專利範圍第1項所述之半導體覆晶封裝，其中該模塑複合材料包括環氧樹脂材料、聚酯材料、熱塑性材料、介電材料、金屬、陶瓷、或含矽材料，其中該模塑複合材料之厚度介於約0.5mm至約5mm之間。
  5. 如申請專利範圍第1項所述之半導體覆晶封裝，其中該模塑複合材料之熱膨脹係數與該第一基板之熱膨脹係數實質上相同。
  6. 如申請專利範圍第1項所述之半導體覆晶封裝，其中該模塑複合材料之熱膨脹係數、該半導體晶片之熱膨脹係數、與該第一基板之熱膨脹係數實質上相同。
  7. 如申請專利範圍第1項所述之半導體覆晶封裝，其中該模塑複合材料係於低黏度的狀態下，以射出成型的方式形成於該空洞區中。
  8. 一種半導體覆晶封裝的形成方法，包括：提供一第一基板，該第一基板具有一第一表面，以及位於該第一表面相反側之一第二表面；以焊料凸塊安裝一半導體晶片於該第一基板之第一表面上；安裝一導熱固定物於該第一基板之第一表面上並圍繞該晶片，以定義一空洞區於該導熱固定物與該晶片之間；射出低黏度狀態之一模塑複合材料於該空洞區中；固化該模塑複合材料以硬化該模塑複合材料；填充並硬化一底部填充層於該半導體晶片與該第一基板之間的縫隙，其中該模塑複合材料位於該底部填充層與該導熱固定物之間；以及以焊球安裝一第二基板於該第一基板之第二表面上。
  9. 如申請專利範圍第8項所述之半導體覆晶封裝的 形成方法，更包括安裝一散熱器於該導熱固定物上以密封該導熱固定物之中的半導體晶片。
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