TWI397134B - 具有偏移堆疊之積體電路封裝件系統 - Google Patents

具有偏移堆疊之積體電路封裝件系統 Download PDF

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Publication number
TWI397134B
TWI397134B TW097142598A TW97142598A TWI397134B TW I397134 B TWI397134 B TW I397134B TW 097142598 A TW097142598 A TW 097142598A TW 97142598 A TW97142598 A TW 97142598A TW I397134 B TWI397134 B TW I397134B
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Taiwan
Prior art keywords
integrated circuit
carrier
insert
package system
circuit package
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TW097142598A
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English (en)
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TW200933763A (en
Inventor
Seng Guan Chow
Linda Pei Ee Chua
Heap Hoe Kuan
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Stats Chippac Ltd
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Publication of TW200933763A publication Critical patent/TW200933763A/zh
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Publication of TWI397134B publication Critical patent/TWI397134B/zh

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    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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Description

具有偏移堆疊之積體電路封裝件系統 [相關申請案之交互參考]
本申請案係包含同步申請之美國專利申請案第11/954601號的內容。該相關申請案係讓渡予史特斯晶片封裝公司(STATS CbipPAC Ltd.)。
本申請案亦包含同步申請之美國專利申請案第11/954607號的內容。該相關申請案係讓渡予史特斯晶片封裝公司。
本申請案進一步包含美國專利申請案第11/954631號，目前為美國專利第7781261號的內容。該相關申請案係讓渡予史特斯晶片封裝公司。
本發明大體上係關於積體電路封裝件系統，且詳言之，係關於具有囊封體(encapsulation)的積體電路封裝件系統。
為了使積體電路具有用以與其他電路系統溝通之介面，通常將該積體電路安裝於引線框架(lead frame)或基板(substrate)上。每一個積體電路均具有利用非常細微的金或鋁導線或導電球(conductive ball)(例如錫球)分別連接至該基板接點(contact)或終端墊(terminal pad)的連結墊(bonding pad)。接著，該等組件藉由個別囊封(encapsulate)於模製塑膠(molded plastic)或陶瓷體而封裝以產生積體電路封裝件。
已往看見積體電路封裝技術單一電路板或基底上所安裝的積體電路數目的增加。新的封裝設計在外形要素上(如：封裝之積點電路的實體尺寸與形狀)更為小巧，並在整體積體電路密度上有顯著的增加。
然而，積體電路密度持續受到可用以分別於基板上安裝積體電路的"地產(real estate)"所限制。即使是較大外形要素的系統(例如個人電腦(PC)、計算伺服器、與儲存伺服器)也需要更多積體電路在相同或更小的"地產中"。尤其激烈的是，對於可攜式個人電子產品(如：行動電話、數位相機、音樂撥放器、個人數位助理(PDA)以及定位裝置(location-based device))的需求進一步促進對於增加的積體電路密度的需求。
增加的積體電路密度已導致可封裝超過一個積體電路之多晶片(multi-chip)封裝件的發展。每一個封裝件均提供個別積體電路之機械支持以及使該等積體電路能夠與周圍電路系統電氣連接之一個或多個層之互連線(interconnect line)。
目前的多晶片封裝件(通常也被稱為多晶片模組)傳統上由直接附接一組獨立的積體電路元件的印刷電路板(PCB)基板所構成。此類多晶片封裝件已被發現並用於增加積體電路密度與微型化、改善信號傳遞速度、降低整體積體電路尺寸與重量、改善效能、並且降低成本，這些都是電腦產業之主要目標。
不論是垂直或水平排列之多晶片封裝件都可能造成問 題，因為其通常必須在該積體電路與積體電路連接能夠被測試之前被預先組合(pre-assemble)。因此，當積體電路被安裝和連接至多晶片模組時，個別的積體電路與連接無法被個別測試，且在結合至較大電路之前無法識別為已知良品(know-good-die,KGD)。因此，傳統的多晶片封裝件導致組合製程的良率問題。該製造製程(未識別KGD)係可靠度較低且較易產生組合缺陷(defect)。
此外，傳統多晶片封裝件中垂直堆疊的積體電路所造成的問題超過水平排列的積體電路封裝件所造成者，進一步使製造製程更加複雜。更加難以測試與決定該等個別積體電路的實際故障模式(actual failure mode)。此外，該基板與積體電路經常於組合或測試期間受損而使製造製程更加複雜且成本更高。
對於垂直與水平多晶片封裝件兩者而言，該等多晶片封裝件的組合必須具有在該等多個積體電路、該堆疊封裝之積體電路或兩者的結合之間的可靠電氣與機械附接。舉例而言，用以形成該已封裝之積體電路的該囊封製程可能造成污染(如：模製溢料(flash)或滲漏(bleed))而妨礙形成可靠之附接。另一個例子，對於在囊封體中具有凹槽的積體電路封裝件而言，輪廓模製槽(contoured mold chase)係用以形成凹槽，這樣會增加模製溢料的風險、增加該封裝件結構從與該模製槽之輪廓部分的接觸處之損害以及增加用於在囊封體中需要的凹槽所設計特定之模製槽的製造成本。
因此，對於能夠提供低製造成本、改善的良率、改善的可靠度、以及較大彈性以提供較多功能性與較少印刷電路板的佔用面積(footprint)的積體電路封裝件系統的需求仍然維持不變。有鑑於對於節省成本與改善效率的需求不斷增加，找出這些問題的解答是愈來愈關鍵。
上述該些問題的解決方案已為人們所長期尋找，但先前的發展並未教示或建議任何解決方案，所以，這些問題的解決方案已長期困惑熟悉本領域之技藝人士。
本發明提供一種積體電路封裝方法，包含：設置具有連結墊與接觸墊的插入件(interposer)；於載體(carrier)之上的偏移位置安裝該插入件，該載體具有與該載體之邊緣共平面的該插入件曝露側(exposed side)；在連結墊與該載體之間建立電性互連(electrical interconnect)；以及，在該載體與該電性互連之上形成封裝件封囊封體，並維持該接觸墊與該插入件的曝露側不被覆蓋。
本發明之一些實施例具有除了以上所述之外或替代以上所述的其他態樣。藉由閱讀下列之詳細描述並參考附圖，熟悉本領域之技藝人士將明瞭該等態樣。
以下實施例係充分詳細描述以使熟悉本領域之技藝人士可製造及使用本發明。要了解基於此揭露內容可明瞭其他實施例，而且，其系統、製程或機構上的改變可在不悖離本發明之範疇下進行。
以下說明將提供許多明確的細節，使能充分了解本發明。然而，很顯然地，本發明可於無該些明確細節下施行。為了避免模糊本發明，一些習知的電路、系統組構與製程步驟未詳細揭露。同樣地，用來顯示本系統實施例的附圖係為局部示意圖而非按比例繪製，特別是某些圖式中的尺寸是為清晰呈現而特別放大。一般而言，本發明可操作於任何定向(orientation)。
此外，揭露及描述在多個實施例中的某些共同特徵，為清楚及容易說明、描述及理解，彼此相似及相同的特徵通常將以相同的元件符號來描述。為便於描述，實施例是以第一實施例、第二實施例等予以編號，並非用以呈現其他意義或用以限定本發明。
為說明的目的，在此使用的用語"水平(horizontal)"係定義為與積體電路平行之表面或平面的平面，而無關於其定向。用語"垂直(vertical)"意指與剛剛定義之水平垂直的方向。其他用語，諸如"以上"、"以下"、"底部"、"頂部"、"側(如"側壁")"、"較高"、"較低"、"上面的(upper)"、"之上(over)"、以及"之下(under)"是相對於該水平平面而定義。用語"在...之上(on)"係指在元件間有直接接觸。在此使用的用語"處理(processing)"，包含：材料的沉積、圖案化、曝光、顯影、蝕刻、清理、模製以及/或是材料的移除或形成所描述結構所需者。而在此使用的用語"系統(system)"是依照使用該用語之上下文而意指本發明的方法與設備。
現在參閱第1圖，顯示本發明第一實施例的積體電路封裝件系統100的上視圖。該上視圖描述不具有蓋子(cover)的積體電路封裝件系統100。該上視圖描述插入件(interposer)102(如：基板)於載體108(如：基板)之上具有接觸墊104與連結墊106。該等連結墊106可鄰近該插入件102的未曝露側110，其中，該未曝露側110係位於該載體108的內部之上。該插入件102的曝露側112係與該載體108的邊緣114共平面。該插入件102顯示於該載體108之上的偏移位置，而不是位於該載體108之上的中央位置。該插入件102係位於該載體108的右上角。
如圖所示，該接觸墊104並未被鄰近該未曝露側110的周邊區域之上的防溢料結構116(諸如：非導電環氧樹脂、密封劑、聚合材料、導線鎖樹脂(wire lock resin)材料、或可穿透薄膜黏著劑)所覆蓋。該等連結墊106與該載體108之間可建立電性互連118(如：接合線或帶狀接合線(ribbon bond wire))。該防溢料結構116覆蓋該等電性互連118連接至該等連結墊106處的該些端點(end)。該防溢料結構116係可選擇性使用的。該防溢料結構116暴露於邊側115。
第一積體電路裝置120(如：積體電路晶片、已封裝的積體電路或插入件)安裝於該載體108之上。被動裝置122(如：離散電阻器或電容器)安裝於該載體108之上。雖然要了解該等被動裝置122可互為不同，但為了說明的目的，該等被動裝置122係以相同的元件類形顯示。舉例而言， 該等被動裝置122可包含不同的電阻器、電容器、電感器或三者的結合。
現在參閱第2圖，顯示該積體電路封裝件系統100沿著第1圖之線2-2的剖面圖。該剖面圖描述該等被動裝置122被安裝於該載體108之上。第二積體電路裝置224(如：已封裝的積體電路裝)藉由黏著劑(adhesive)226安裝於該載體108之上。
該第二積體電路裝置224包含該插入件102為其基板。如圖所示，該第二積體電路裝置224係位於該載體108之上的偏移位置。該插入件102的該等曝露側112也是該第二積體電路裝置224的該等曝露側。該第二積體電路裝置224的該等曝露側112與該載體108的該等邊緣114共平面。該等電性互連118可連接該插入件102的該等連結墊106以及該載體108。舉例而言，如圖所示，該第二積體電路裝置224為上下顛倒之組構並於遠離該載體108的一側具有插入件102。
該防溢料結構116係位於該插入件102的周邊區域之上，而一部份該電性互連118係位於該插入件102之上。該防溢料結構116與該第二積體電路裝置224可決定位於該載體108之上的封裝件囊封體230的囊封體高度228。該防溢料結構116係可選擇性使用的，且如果存在該防溢料結構116，可曝露出該插入件102的該等接觸墊104。如果該防溢料結構116不存在，則該封裝件囊封體230係位於該連接於該等連結墊106之電性互連118之上且可曝露 出該等接觸墊104。該防溢料結構116可以多個不同組構暴露於該封裝件囊封體230之邊側115上。舉例來說，該防溢料結構116可暴露於兩個相鄰邊側115上、相對側上、三側上，或四側上。
位於該載體108之上的該封裝件囊封體230係覆蓋第1圖之該第一積體電路裝置120、該等被動裝置122、該第二積體電路裝置224、以及該等電性互連118。然而，該封裝件囊封體230未覆蓋該插入件102之頂側上的該等接觸墊104。該封裝件囊封體230復未覆蓋該插入件102與該載體108之邊緣共平面的實質上垂直的側。該封裝件囊封體230可在鄰近該防溢料結構116的區域形成將該插入件102的該等接觸墊104曝露出來的開口232。外部互連(external interconnect)234(如：錫球)可附接於該載體108的底部。
安裝裝置236(如：積體電路或被動元件)可選擇性地安裝於該積體電路封裝件系統100之上形成積體電路層疊式封裝件系統(package-on-package system)。該安裝裝置236以虛線描述。該安裝裝置236可安裝於該插入件102之上以及該開口232之內。
要了解該實施例中所示的第1圖之該第一積體電路裝置120、該第二積體電路裝置224、以及該安裝裝置236係為說明之目的。該第一積體電路裝置120、該第二積體電路裝置224、以及該安裝裝置236可為晶圓級晶片尺寸封裝件(wafer level chip scale package,WLCSP)、線路重 佈(redistributed line,RDL)晶粒、陣列封裝件、無引腳封裝件、具引腳封裝件、系統級封裝件(system-in-package,SiP)、堆疊式晶粒封裝件、封裝件內封裝件(package-in-package,PiP)、嵌入式晶粒基板或散熱增益封裝件、電磁干擾(EMI)防護封裝件。
現在參閱第3圖，顯示本發明第二實施例的積體電路封裝件系統300的上視圖。該上視圖描述不具有蓋子的積體電路封裝件系統300。該積體電路封裝件系統300可在結構上類似於第1圖之該積體電路封裝件系統100或者可相同於逆時針旋轉90度的該積體電路封裝件系統100。
該上視圖描述插入件302(如：基板)於載體308(如：基板)之上具有接觸墊304與連結墊306。該等連結墊306可鄰近該插入件302的未曝露側310，其中，該未曝露側310係位於該載體308的內部之上。該插入件302的曝露側312係與該載體308的邊緣314共平面。該插入件302顯示於該載體308之上的偏移位置，而不是位於該載體308之上的中央位置。該插入件302係位於該載體308的左上角。
如圖所示，該接觸墊304並未被鄰近該未曝露側310的周邊區域之上的防溢料結構316(諸如：非導電環氧樹脂、密封劑、聚合材料、導線鎖樹脂材料、或可穿透薄膜黏著劑)所覆蓋。該等連結墊306與該載體308之間可建立電性互連318(如：接合線或帶狀接合線)。該防溢料結構316覆蓋該等電性互連318連接至該等連結墊306的該些 端點。該防溢料結構316係可選擇性使用的。
第一積體電路裝置320(如：積體電路晶片、已封裝的積體電路或插入件)安裝於該載體308之上。被動裝置322(如：離散的電阻器或電容器)安裝於該載體308之上。
現在參閱第4圖，顯示該積體電路封裝件系統300沿著第3圖之線4-4的剖面圖。該剖面圖描述第二積體電路裝置424(如：已封裝的積體電路)藉由黏著劑426安裝於該載體308之上。該第二積體電路裝置424包含該插入件302為其基板。如圖所示，該第二積體電路裝置424係位於該載體308之上的偏移位置。該插入件302的該等曝露側312也是該第二積體電路裝置424的該等曝露側。該第二積體電路裝置424的該等曝露側312與該載體308的該等邊緣314共平面。該等電性互連318可連接該插入件302的該等連結墊306以及該載體308。舉例而言，如圖所示，該第二積體電路裝置424為上下顛倒之組構並於遠離該載體308的一側具有插入件302。
該防溢料結構316係位於該插入件302的周邊區域之上，而一部份該電性互連318係位於該插入件302之上。該防溢料結構316與該第二積體電路裝置424可決定位於該載體308之上的封裝件囊封體430的囊封體高度428。該防溢料結構316係可選擇性使用的，且如果有在該防溢料結構316，可曝露出該插入件302的該等接觸墊304。如果該防溢料結構316不存在，則該封裝件囊封體430係位於該連接於該等連結墊306之電性互連318之上且可曝露 出該等接觸墊304。
位於該載體308之上的該封裝件囊封體430係覆蓋第3圖之該第一積體電路裝置320、第3圖之該等被動裝置322、該第二積體電路裝置424、以及該等電性互連318。該封裝件囊封體430可在鄰近該防溢料結構316的區域形成將該插入件302的該等接觸墊304曝露出來的開口432。外部互連434(如：錫球)可附接於該載體308的底部。
安裝裝置436(如：積體電路或被動元件)可選擇性地安裝於該積體電路封裝件系統300之上形成積體電路層疊式封裝件系統。該安裝裝置436以虛線描述。該安裝裝置436可安裝於該插入件302之上以及該開口432之內。
現在參閱第5圖，顯示本發明第三實施例的積體電路封裝件系統500的上視圖。該上視圖描述不具有蓋子的積體電路封裝件系統500。該上視圖描述插入件502(如：基板)於載體508(如：基板)之上具有接觸墊504與連結墊506。該等連結墊506可鄰近該插入件502的未曝露側510，其中，該未曝露側510係位於該載體508的內部之上。該插入件502的曝露側512係與該載體508的邊緣514共平面。該插入件502顯示於該載體508之上的偏移位置，而不是位於該載體508之上的中央位置。該插入件502係位於該載體508的右側邊緣。
如圖所示，該接觸墊504並未被鄰近該未曝露側510的周邊區域之上的防溢料結構516(諸如：非導電環氧樹脂、密封劑、聚合材料、導線鎖樹脂材料、或可穿透薄膜 黏著劑)所覆蓋。該等連結墊506與該載體508之間可建立電性互連518(如：接合線或帶狀接合線)。該防溢料結構516覆蓋該等電性互連518連接至該等連結墊506的該些端點。該防溢料結構516係可選擇性使用的。
第一積體電路裝置520(如：積體電路晶片、已封裝的積體電路或插入件)安裝於該載體508之上。被動裝置522(如：離散的電阻器或電容器)安裝於該載體508之上。雖然要了解該等被動裝置522可互為不同，但為了說明的目的，該等被動裝置522係以相同的元件類形顯示。舉例而言，該等被動裝置522可包含不同的電阻器、電容器、電感器或三者的結合。
現在參閱第6圖，顯示該積體電路封裝件系統500沿著第5圖之線6-6的剖面圖。該剖面圖描述該等被動裝置522被安裝於該載體508之上。第二積體電路裝置624(如：已封裝的積體電路)藉由黏著劑626安裝於該載體508之上。
該第二積體電路裝置624包含該插入件502為其基板。如圖所示，該第二積體電路裝置624係位於該載體508之上的偏移位置。該插入件202的該等曝露側512也是該第二積體電路裝置624的該等曝露側。該第二積體電路裝置624的該等曝露側512與該載體508的該等邊緣514共平面。該等電性互連518可連接該插入件502的該等連結墊506以及該載體508。舉例而言，如圖所示，該第二積體電路裝置624為上下顛倒之組構並於遠離該載體508的 一側具有插入件502。
該防溢料結構516係位於該插入件502的周邊區域之上，而一部份該電性互連518係位於該插入件502之上。該防溢料結構516與該第二積體電路裝置624可決定位於該載體508之上的封裝件囊封體630的囊封體高度628。該防溢料結構516係可選擇性使用的，且如果存在該防溢料結構516，可曝露出該插入件502的該等接觸墊504。如果該防溢料結構516不存在，則該封裝件囊封體630係位於該連接於該等連結墊506之電性互連518之上且可曝露出該等接觸墊504。
位於該載體508之上的該封裝件囊封體630係覆蓋第5圖之該第一積體電路裝置520、該等被動裝置522、該第二積體電路裝置624、以及該等電性互連518。該封裝件囊封體630可在鄰近該防溢料結構516的區域形成將該插入件502的該等接觸墊504曝露出來的開口632。外部互連634(如：錫球)可附接於該載體508的底部。
安裝裝置636(如：積體電路或被動元件)可選擇性地安裝於該積體電路封裝件系統500之上形成積體電路層疊式封裝件系統。該安裝裝置636以虛線描述。該安裝裝置636可安裝於該插入件502之上以及該開口632之內。
現在參閱第7圖，顯示本發明第四實施例的積體電路封裝件系統700的上視圖。該上視圖描述不具有蓋子的積體電路封裝件系統700。該積體電路封裝件系統700可在結構上類似於第5圖之該積體電路封裝件系統500或者相 同於旋轉180度的該積體電路封裝件系統500。
該上視圖描述插入件702(如：基板)於載體708(如：基板)之上具有接觸墊704與連結墊706。該等連結墊706可鄰近該插入件702的未曝露側710，其中，該未曝露側710係位於該載體708的內部之上。該插入件702的曝露側712係與該載體708的邊緣714共平面。該插入件702顯示於該載體708之上的偏移位置，而不是位於該載體708之上的中央位置。該插入件702係位於該載體708的左側邊緣。
如圖所示，該接觸墊704並未被鄰近該未曝露側710的周邊區域之上的防溢料結構716(諸如：非導電環氧樹脂、密封劑、聚合材料、導線鎖樹脂材料、或可穿透薄膜黏著劑)所覆蓋。該等連結墊706與該載體708之間可建立電性互連718(如：接合線或帶狀接合線)。該防溢料結構716覆蓋該等電性互連718連接至該等連結墊706的該些端點。該防溢料結構716係可選擇性使用的。
第一積體電路裝置720(如：積體電路晶片、已封裝的積體電路或插入件)安裝於該載體708之上。被動裝置722(如：離散的電阻器或電容器)安裝於該載體708之上。
現在參閱第8圖，顯示該積體電路封裝件系統700沿著第7圖之線8-8的剖面圖。該剖面圖描述該等被動裝置722被安裝於該載體708之上。第二積體電路裝置824(如：已封裝的積體電路裝)藉由黏著劑826安裝於該載體708之上。
該第二積體電路裝置824包含該插入件702為其基板。如圖所示，該第二積體電路裝置824係位於該載體708之上的偏移位置。該插入件702的該等曝露側712也是該第二積體電路裝置824的該等曝露側。該第二積體電路裝置824的該等曝露側712與該載體708的該等邊緣714共平面。該等電性互連718可連接該插入件702的該等連結墊706以及該載體708。舉例而言，如圖所示，該第二積體電路裝置824為上下顛倒之組構並於遠離該載體708的一側具有插入件702。
該防溢料結構716係位於該插入件702的周邊區域之上，而一部份該電性互連718係位於該插入件702之上。該防溢料結構716與該第二積體電路裝置824可決定位於該載體708之上的封裝件囊封體830的囊封體高度828。該防溢料結構716係可選擇性使用的，且如果存在該防溢料結構316，可曝露出該插入件702的該等接觸墊704。如果該防溢料結構716不存在，則該封裝件囊封體830係位於該連接於該等連結墊706之電性互連718之上且可曝露出該等接觸墊704。
位於該載體708之上的該封裝件囊封體830係覆蓋第7圖之該第一積體電路裝置720、該等被動裝置722、該第二積體電路裝置824、以及該等電性互連718。該封裝件囊封體830可在鄰近該防溢料結構716的區域形成將該插入件702的該等接觸墊704曝露出來的開口832。外部互連834(如：錫球)可附接於該載體708的底部。
接置裝置836(如：積體電路或被動元件)可選擇性地安裝於該積體電路封裝件系統700之上形成積體電路層疊式封裝件系統。該安裝裝置836以虛線描述。該安裝裝置836可安裝於該插入件702之上以及該開口832之內。
現在參閱第9圖，顯示本發明第五實施例的積體電路封裝件系統900的上視圖。該上視圖描述不具有蓋子的積體電路封裝件系統900。該積體電路封裝件系統900可在結構上類似於第7圖之該積體電路封裝件系統700或者相同於該積體電路封裝件系統700。舉一個特例來說，該積體電路封裝件系統900可為兩個並列的該積體電路封裝件系統700。
該積體電路封裝件系統900可包含多個覆蓋於載體908之上的插入件902。每一個插入件902可包含與該載體908的邊緣914共平面的曝露側912。
現在參閱第10圖，顯示該積體電路封裝件系統900沿著第9圖之線10-10的剖面圖。該剖面圖描述該積體電路封裝件系統900可為兩個第7圖之積體電路封裝件系統700，該等系統非彼此分離或彼此分割(singulate)。
安裝裝置1036(如：積體電路或被動元件)可選擇性地安裝於該積體電路封裝件系統900之上形成積體電路層疊式封裝件系統。該安裝裝置1036以虛線描述。該安裝裝置1036可安裝於該插入件902之上以及該積體電路封裝件系統900的開口1032之內。
雖然要了解該積體電路封裝件系統900可包含不同的 積體電路封裝件系統，但為說明的目的，所示的該積體電路封裝件系統900係具有兩個該積體電路封裝件系統700。舉例而言，該積體電路封裝件系統900可包含該積體電路封裝件系統700與第5圖之該積體電路封裝件系統500，其中，該積體電路封裝件系統700不同於該積體電路封裝件系統500。
現在參閱第11圖，顯示本發明實施例的第一中間(intermediate)積體電路封裝件系統1100的上視圖。該上視圖描述不具蓋子的第一中間積體電路封裝件系統1100。該第一中間積體電路封裝件系統1100包含位於複合載體(composite carrier)1108之上的複合插入件1102。該複合插入件1102位於該複合載體1108的中央部分。
該複合插入件1102的連結墊1106與該複合載體1108之間係建立電性互連1118(如：接合線或帶狀接合線)。環狀的防溢料結構1116可形成於該複合插入件1102的周邊區域以及連接至該等連結墊1106的該等電性互連1118的端點之上。多個被動裝置1122與多個第一積體電路裝置1120安裝於該複合載體1108之上。
該第一中間積體電路封裝件系統1100可分成四等份被描述。x軸方向與y軸方向的虛線將該第一中間積體電路封裝件系統1100分成四等份。該等虛線也可代表用以分割該第一中間積體電路封裝件系統1100的分割線1111。
左下角的該四份之一部份可包含第1圖之該積體電路封裝件系統100。右下角的該四份之一部份可包含第3圖 之該積體電路封裝件系統300。右上角與左上角的該等四分之一部份也都可包含進一步的積體電路封裝件系統1104，其中，該進一步的積體電路封裝件系統1104可類似於或相同於該積體電路封裝件系統100或該積體電路封裝件系統300。
現在參閱第12圖，顯示本發明實施例的第二中間積體電路封裝件系統1200的上視圖。該上視圖描述不具蓋子的第二中間積體電路封裝件系統1200。該第二中間積體電路封裝件系統1200包含位於複合載體1208之上的複合插入件1202。該複合插入件1202位於該複合載體1208之上半部與下半部的中央部分。
該複合插入件1202的連結墊1206與該複合載體1208之間係建立電性互連1218(如：接合線或帶狀接合線)。環狀的防溢料結構1216可形成於各該複合插入件1202的周邊區域以及連接至該等連結墊1206的該等電性互連1218的端點之上。多個被動裝置1222與多個第一積體電路裝置1220安裝於該複合載體1208之上。
該第二中間積體電路封裝件系統1200可分成四等份被描述。x軸方向與y軸方向的虛線將該第二中間積體電路封裝件系統1200分成四等份。該等虛線也可代表用以分割該第二中間積體電路封裝件系統1200的分割線1211。
左下角的該四份之一部份可包含第5圖之該積體電路封裝件系統500。右下角的該四份之一部份可包含第7圖之該積體電路封裝件系統700。右上角與左上角的該等四 分之一部份也都可包含進一步的積體電路封裝件系統1204，其中，該進一步的積體電路封裝件系統1204可類似於或相同於該積體電路封裝件系統500或該積體電路封裝件系統700。
現在參閱第13圖，顯示第11圖在形成囊封體1302的步驟中之結構。模製槽1304(如：平面或平坦的模製槽)可位於該防溢料結構1216之上。該模製槽1304也可位於模製終止器(mold stop)1306(諸如：非導電環氧樹脂、密封劑、聚合材料、導線鎖樹脂材料、或可穿透薄膜黏著劑之終止器)之上。該模製終止器1306係可選擇性使用的。該防溢料結構1216、該模製終止器1306、或者兩者的結合能夠緩和來自該模製槽1304的力量以避免損害該複合插入件1102。該防溢料結構1116與該模製終止器1306均包含彈性以補償該積體電路封裝件系統100在組合製程中的傾斜(tilting)所導致的共面誤差(coplanarity error)。
該囊封體1302形成於載體帶(carrier strip)1308之上覆蓋第11圖之該等第一積體電路裝置1120、該等被動裝置1122以及該等包含複合插入件1102的複合第二積體電路裝置1310。該防溢料結構1116緩和或消除該複合插入件1102的該等接觸墊104之上的模製溢料。
復舉例而言，該模製槽1304可選擇性使用的。該模製終止器1306可在模製製程中作為壩體(dam)(如：壩體填充方法(dam-and-fill method))，其中，液態囊封體製程(liquid encapsulation process)可被應用於該載體帶 1308之上以覆蓋該等被動裝置1122、該複合第二積體電路裝置結構1310、以及該電性互連1118。該防溢料結構1116也可在該用以曝露該複合插入件1102的該等接觸墊104的模製製程中作為壩體。
該防溢料結構1116也可選擇性使用的。如果該模製終止器1306與該防溢料結構1116均不存在，則該模製槽1304包含由虛線表示的延伸部份1314。該延伸部份1314避免該囊封體1302形成於該複合插入件1102的該等接觸墊104之上。
該囊封結構1302可被虛線1316所分割，並形成例如第2圖之該積體電路封裝件系統100與第4圖之該積體電路封裝件系統300。
現在參閱第14圖，顯示本發明實施例中用以製造該積體電路封裝件系統100的積體電路封裝方法1400之流程圖。該方法1400包含：於步驟1402，設置具有連結墊與接觸墊的插入件；於步驟1404，在載體之上的偏移位置安裝該插入件，該載體具有與該載體之邊緣共平面的該插入件曝露側；於步驟1406，在連結墊與該載體之間建立電性互連；以及，於步驟1408，在該載體與該電性互連之上形成封裝件囊封體，並維持該接觸墊與該插入件的曝露側不被覆蓋。
本發明之另一重要態樣係有用地支持並服務降低成本、簡化系統、以及增進效能的歷史潮流。
本發明的這些以及其他有用的態樣因而促進該技術狀 態至至少下一層次。
因此，已發現本發明之該積體電路封裝件系統提供用以改善良率、增加可靠度、以及降低電路系統的成本之重要與在此之前未知且無法取得的解決方案、能力、與功能態樣。所產生之製程與組構係直接、具成本效益、不複雜、非常多功能、準確、靈敏、以及有效率的，並且能夠藉由改進已知元件實現快速、有效且具經濟效益的製造、應用以及利用的目的。
儘管本發明係以結合特定的最佳模式來描述，但要了解有鑑於上述說明，許多的替代、修改與變化對熟悉本領域之技藝人士而言，將變得顯而易見。因此，其係傾向包含在本申請專利範圍內的所有此類替代、修改、與變化。在此提出或顯示於附圖中的內容係用於解釋本發明，而非用於限制本發明。
100、300、500、700、900、1100、1104、1200、1204、1400‧‧‧積體電路封裝件系統
102、302、502、702、902‧‧‧插入件
104、304、404、504、704‧‧‧接觸墊
106、306、506、706、1106、1206‧‧‧連結墊
108、308、508、708、908‧‧‧載體
110、310、510、710‧‧‧未曝露側
112、312、512、712、912‧‧‧曝露側
114、314、415、714、914‧‧‧邊緣
115‧‧‧邊側
116、316、516、716‧‧‧防溢料結構
118、318、518、718、1118、1218‧‧‧電性互連
120、320、520、720、1220‧‧‧第一積體電路裝置
122、322、522、722、1122‧‧‧被動裝置
224、424、824‧‧‧第二積體電路裝置
226、626、826‧‧‧黏著劑
228、428、628、828‧‧‧囊封體高度
230、430、630、830‧‧‧封裝件囊封體
232、432、832‧‧‧開口
234、434、634、834‧‧‧外部互連
436、636、836、1036‧‧‧安裝裝置
1032‧‧‧開口
1102、1202‧‧‧複合插入件
1108‧‧‧複合載體
1111、1211‧‧‧分割線
1116、1216‧‧‧防溢料結構
1302‧‧‧囊封體
1304‧‧‧模製槽
1306‧‧‧模製終止器
1308‧‧‧載體帶
1310‧‧‧複合第二積體電路裝置
1314‧‧‧延伸部份
1316‧‧‧虛線
1402、1404、1406、1408‧‧‧步驟
第1圖係本發明第一實施例的積體電路封裝件系統的上視圖；第2圖係該積體電路封裝件系統沿著第1圖之線2-2的剖面圖；第3圖係本發明第二實施例的積體電路封裝件系統的上視圖；第4圖係該積體電路封裝件系統沿著第3圖之線4-4的剖面圖；第5圖係本發明第三實施例的積體電路封裝件系統 的上視圖；第6圖係該積體電路封裝件系統沿著第5圖之線6-6的剖面圖；第7圖係本發明第四實施例的積體電路封裝件系統的上視圖；第8圖係該積體電路封裝件系統沿著第7圖之線8-8的剖面圖；第9圖係係本發明第五實施例的積體電路封裝件系統的上視圖；第10圖係該積體電路封裝件系統沿著第9圖之線10-10的剖面圖；第11圖係本發明實施例的第一中間積體電路封裝件系統的上視圖；第12圖係本發明實施例的第二中間積體電路封裝件系統的上視圖；第13圖係第11圖在形成囊封體的步驟中之結構；以及第14圖係本發明實施例中用以製造該積體電路封裝件系統的積體電路封裝方法之流程圖。
1400‧‧‧積體電路封裝方法
1402、1404、1406、1408‧‧‧步驟

Claims (10)

  1. 一種製造積體電路封裝件系統之方法，包括：於未曝露側上設置具有連結墊和接觸墊的插入件，且復具有曝露側；於載體上方的偏移位置安裝該插入件，且該載體的邊緣與該插入件的該曝露側共平面，以安裝安裝裝置於其上；於連結墊與該載體之間連接電性互連；於該連結墊上方的該電性互連的一部份上方形成防溢料結構；以及於該載體與該電性互連上方形成封裝件囊封體，且於該未曝露側之上的接觸墊與該插入件之該曝露側皆未被該封裝件囊封體覆蓋，並於該封裝件囊封體的邊側暴露該防溢料結構。
  2. 如申請專利範圍第1項所述之方法，其中，安裝該插入件包含安裝具有該插入件的第二積體電路裝置。
  3. 如申請專利範圍第1項所述之方法，其中：設置該插入件包含：設置具有該插入件的複合插入件；以及於該載體上方的偏移位置安裝該插入件包含：於具有該載體的複合載體上方安裝具有該插入件的該複合插入件。
  4. 如申請專利範圍第1項所述之方法，其中，於該連結墊上方的該電性互連的一部份上方形成該防溢料結構包 含暴露於該封裝件囊封體之兩鄰近邊側上的該防溢料結構。
  5. 如申請專利範圍第1項所述之方法，復包括於該載體上方安裝第一積體電路裝置。
  6. 一種積體電路封裝件系統，包括：載體；插入件，係於未曝露側上具有連結墊和接觸墊，且復具有曝露側，該插入件於該載體上方的偏移位置，該載體的邊緣與該插入件的該曝露側共平面，以安裝安裝裝置於其上；防溢料結構，係於該連結墊上方之電性互連的一部份上方；以及電性互連，係於連結墊與該載體之間；封裝件囊封體，係於該載體和該電性互連上方，且於該未曝露側上之該接觸墊和該插入件的該曝露側皆未被該封裝件囊封體覆蓋，並於該封裝件囊封體之邊側暴露該防溢料結構。
  7. 如申請專利範圍第6項所述之系統，其中，該插入件係包含於第二積體電路裝置中。
  8. 如申請專利範圍第6項所述之系統，其中：該插入件係包含於複合插入件中；以及該載體係包含於具有該複合插入件安裝於其上方的複合載體中。
  9. 如申請專利範圍第6項所述之系統，其中，於該連結墊 上方的該電性互連的一部份上方的該防溢料結構包含於該封裝件囊封體之鄰近邊側上暴露的該防溢料結構。
  10. 如申請專利範圍第6項所述之系統，復包括於該載體上方的第一積體電路裝置。
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KR101557089B1 (ko) 2015-10-02

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