TWI383724B - 印刷電路板及其製造方法 - Google Patents

印刷電路板及其製造方法 Download PDF

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TWI383724B
TWI383724B TW098113386A TW98113386A TWI383724B TW I383724 B TWI383724 B TW I383724B TW 098113386 A TW098113386 A TW 098113386A TW 98113386 A TW98113386 A TW 98113386A TW I383724 B TWI383724 B TW I383724B
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hole
seed layer
printed circuit
circuit board
insulator
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TW201019813A (en
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Tae-Gui Kim
Young-Hwan Shin
Jae-Soo Lee
Tae-Gon Lee
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Samsung Electro Mech
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    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
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    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
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  • Manufacturing Of Printed Wiring (AREA)

Description

印刷電路板及其製造方法
本發明係關於一種印刷電路板及其製造方法。
隨蓍高密度、高度整合電路板之趨勢，主要藉由使用形成於一基板1之一下側中之一線或一墊3及焊粒(solder ball)4將一封裝安裝在一基板上，如第1圖中所示。
然而，第1圖中所示之結構，需要一空間以分別用於一通孔(via)2及該墊3。相應地，已建議一如第2圖中所示之VOP(via on pad，焊墊上通孔)結構，其中一通孔7穿透一形成有一電路圖案6之基板5，直接連接至一墊8，及一焊粒9耦接至該墊8。
當該VOP結構形成時，通常藉由使用一雷射鑽(lazer drill)形成一通孔洞(via hole)。在一基板中形成金屬膜(舉例而言，一覆銅箔層壓板(copper clad laminate))之情況下，藉由該雷射鑽穿透一下金屬膜(lower metal film)。
為解決此一問題，已嘗試增加該下金屬膜之厚度。然而，隨著該下金屬膜變得更厚，將變得更難以形成一精細電路。
已有另一嘗試以在該雷射鑽中使用更少之能量。然而，使用更少能量之雷射鑽在形成該通孔洞時之效率較低。
本發明揭示一種印刷電路板及一種製造該印刷電路板之方法，其可防止一下基板(lower substrate)被穿透並改良該製程效率。
本發明之一態樣之特徵在於一印刷電路板。根據本發明之一具體實施例，該印刷電路板可包含一絕緣體、一通孔(其經組態以電氣方式連接該絕緣體之兩側)，及一墊部件(其形成於該絕緣體之一側，以直接接觸該通孔)。該墊部件可包含一種子層部件(其形成於該絕緣體之一側，以直接與該通孔接觸，且成臺階形(stepped)，以便凸出(buldge)一對應於該通孔之部分)，及一鍍膜層(其形成於該種子層部件上)。
一表面處理層(surface-treatment layer)可形成於該鍍膜層上，且凸出部分之面積可等於或大於與該種子層部件相接觸的該通孔之一橫截面(cross-section)。
本發明之另一態樣之特徵在於一種製造一印刷電路板之方法。根據本發明之一具體實施例，該製造一印刷電路板之方法可包含：於該絕緣體之一側上形成一種子層部件，凸出該種子層部件之一部分；藉由處理該絕緣體之另一側形成一通孔洞，其對應於該種子層部件之凸出部分；於該通孔洞內形成該通孔；及在該種子層部件上形成一鍍膜層，其對應於該墊部件。
該方法亦可包含在該鍍膜層上形成一表面處理層，且 凸出部分之面積可等於或大於與該種子層部件相接觸的該通孔之一橫截面。
由於本發明可有各種排列及具體實施例，所以將參照隨附該等圖式，圖解說明及描述特定具體實施例。然而，此並非意欲限制本發明於某些具體實施例，且應被視為包含由本發明之精神及範圍覆蓋之所有排列、等效項及替代。在所有圖式中，為類似元件指定了類似元件參照符號。在本發明之整個說明中，如果認為對某一特定技術之說明將脫離本發明之要點，將省略該相關詳細說明。
以下，將參考隨附該等圖式，詳細說明根據本發明一具體實施例之一印刷電路板及一種製造該印刷電路板之方法。將為相同或對應元件指定相同元件參照符號，而無論圖號如何，且該相同或對應元件之任何冗餘說明將不被重複。
以下，將首先說明根據本發明之一具體實施例製造一印刷電路板之方法。第3圖係顯示根據本發明之一具體實施例製造一印刷電路板之方法之流程圖，且第4圖至第9圖顯示根據本發明之一具體實施例製造一印刷電路板之方法之製程。
第4圖至第9圖中顯示一絕緣體10、金屬層11及12、一種子層部件11’、一抗蝕刻(etching resist)13、一通孔 洞14、一通孔15、型樣20及21、墊部件22、一阻焊(solder resist)30及一表面處理層40。
在藉由S110表示之製程中，該種子層部件11’具有一凸出部分11b，其形成於該絕緣體10之一側上。以下將對此進行更詳盡之描述。
如第4圖中所示，準備一具有絕緣體10之基板，該絕緣體10佈置於諸如銅箔之該等金屬層11與12之間。一覆銅箔層壓板可用於該基板。
然後，該圖案化之抗蝕刻13形成於該基板之一下側上，如第5圖中所示。該抗蝕刻13可藉由將一乾燥膜堆疊於該基板上，然後選擇性曝光及顯影該乾燥膜而形成。
下一步，蝕刻該金屬層11。在此時，充分執行該蝕刻以保持該絕緣體10不被曝光(exposed)，如第6圖中所示。意即執行該蝕刻，直至該被曝光金屬層11變得足夠薄。
透過該等以上製程，該種子層部件11’可形成於該絕緣體10之一下側(lower side)上，以便凸出已由該抗蝕刻13覆蓋之一部分11b。
該種子層部件11’形成之後，在以S120表示之製程中，藉由處理絕緣體10之另一側(例如上側)形成該通孔洞14，其對應於該種子層部件11’之凸出部分11b，如第7圖中所示。一雷射鑽可用於形成該通孔洞14。
由於在本具體實施例中，對應於形成該通孔洞14之位置之部分11b凸出於在該絕緣體10之下側上所形成之種子層部件11’中，在藉由使用一雷射鑽形成該通孔洞14之過 程，形成於該絕緣體10之下側上之種子層部件11’被穿透之可能更小。在此時，如果該凸出部分11b形成為大於該通孔洞14之一下側之橫截面，可進一步降低穿透該種子層部件11’之可能性。
此外，藉由選擇性使其中該通孔洞14將被處理之部件11b比該種子層部件11’中之另一部件11a更厚，有可能透過一後續鍍膜製程形成一精細圖案。
然後，如第8圖中所示，在藉由S130表示之製程中，該通孔15形成於該通孔洞14內部，及在藉由S140表示之製程中，一鍍膜層22a形成於該種子層部件11’上，其對應於該墊部件22。一鍍膜製程可用於形成該通孔15。在此情況下，將形成於該通孔洞14內部之通孔15及將形成於該種子層部件11’上之鍍膜層22a可形成於相同製程中。
儘管在該圖式中未圖解說明，但是該鍍膜層22a可藉由(按此順序)於該種子層部件11’上的形成、電鍍及快速蝕刻一圖案化抗電鍍(未顯示)之過程，而形成於該種子層部件11’上，該種子層部件11’形成於該絕緣體10之下側上。
第8圖透過該等以上製程顯示完全圖案化通孔15、電路型樣20及21及墊部件22。
然後在藉由S150表示之製程中，在除了某些將曝光區域(舉例而言，該墊部件22)之所有區域上覆蓋該阻焊30之後，形成該表面處理層40(參見第9圖)。意即該表面處理層40形成於該墊部件22上，該處之後將形成一焊粒。 該表面處理層40可藉由鍍膜鎳或金形成。
第10圖顯示一具有透過上述製程製造之印刷電路板之封裝。如第10圖中所示，該表面處理層40形成於直接與通孔15接觸之墊部件22上，且該焊粒50形成於該表面處理層40上。將一電子裝置60(其中形成一電極62)放置於該印刷電路板之一上側上，且透過該線70連接(舉例而言)該電路圖案20。該電子裝置60可由一成型部件65覆蓋。
儘管在上述具體實施例中，一厚金屬層被蝕刻以形成具有一凸出部分之種子層部件，但亦可能在一薄金屬膜上鍍膜以形成該種子層部件。
舉例而言，在準備一於任一側上具有薄金屬膜11-1及12’之絕緣體10之後(如第11圖中所示)，一圖案化抗電鍍13'可形成於該下側金屬膜11-1上，如第12圖中所示。然後，可執行該鍍膜，且可移除該抗電鍍13’，如第13圖中所示。
相應地，類似於本發明之上述具體實施例，亦可能透過本方法形成具有一凸出部分11-2之種子層部件11’，其中將處理一通孔洞。
由於所遵循製程與上述具體實施例之製程相同，將省略該等詳細說明。
迄今為止，儘管已經顯示及說明本發明之某些具體實施例，本項技術中之任何普通習知技藝者應瞭解，在本發明之該等原理及精神內可進行大量修改、排列及替代，且 本發明之範圍應藉由該等所附申請專利範圍及其等效項所定義。
於本發明之申請專利範圍中可包含許多其他具體實施例。
1‧‧‧基板
2‧‧‧通孔
3‧‧‧墊
4‧‧‧焊粒
5‧‧‧基板
6‧‧‧電路圖案
7‧‧‧通孔
8‧‧‧墊
9‧‧‧焊粒
10‧‧‧絕緣體
11‧‧‧金屬層
11’‧‧‧種子層部件
11-1‧‧‧金屬膜
11-2‧‧‧凸出部分
11a‧‧‧部件
11b‧‧‧凸出部分
12‧‧‧金屬層
12’‧‧‧金屬膜
13‧‧‧抗蝕刻
13’‧‧‧圖案化抗電鍍
14‧‧‧通孔洞
15‧‧‧通孔
20‧‧‧型樣
21‧‧‧型樣
22‧‧‧墊部件
22a‧‧‧鍍膜層
30‧‧‧阻焊
40‧‧‧表面處理層
50‧‧‧焊粒
60‧‧‧電子裝置
62‧‧‧電極
65‧‧‧成型部件
70‧‧‧線
第1圖及第2圖係顯示習知印刷電路之剖面視圖；第3圖係顯示根據本發明之一具體實施例一種製造一印刷電路板之方法之流程圖；第4圖至第9圖顯示根據本發明之一具體實施例製造一印刷電路板之方法之製程；第10圖係顯示一具有根據本發明之一具體實施例一印刷電路板之封裝之剖面視圖；及第11圖至第13圖顯示根據本發明之另一具體實施例一種製造一印刷電路板之方法之製程。

Claims (6)

  1. 一種印刷電路板(printed circuit board)，該印刷電路板包括：一絕緣體；一種子層部件，該種子層部件形成於該絕緣體之一側，並凸出(buldge)一對應於欲形成之一通孔洞之部分；一通孔(via)，該通孔形成於該通孔洞內側，該通孔係連接至該種子層部件的一凸出部分；及一鍍膜層(plating layer)，該鍍膜層形成於該種子層部件的該凸出部分上其中該通孔洞穿透該絕緣體並被該種子層部件的該凸出部分覆蓋。
  2. 如申請專利範圍第1項之所述印刷電路板，其更包括一形成於該鍍膜層上之表面處理層(surface-treatment layer)。
  3. 如申請專利範圍第1項之所述印刷電路板，其中該凸出部分之一面積等於或大於與該種子層部件接觸的該通孔之一橫截面(cross-section)。
  4. 一種製造一印刷電路板之方法，該方法包括以下步驟：在該絕緣體之一側上形成一種子層部件，凸出該種子層部件之一部分；藉由處理該絕緣體之另一側形成一通孔洞(via hole)，該通孔洞對應於該種子層部件之該凸出部分，該通孔洞被該種子層部件的該凸出部分覆蓋；於該通孔洞內形成該通孔，該通孔係連接至該種子層部件的該凸出部分；及在該種子層部件的該凸出部分上形成一鍍膜層。
  5. 如申請專利範圍第4項所述之方法，其更包括以下步驟：在該鍍膜層上形成一表面處理層。
  6. 如申請專利範圍第4項所述之方法，其中該凸出部分之一面積等於或大於與該種子層部件接觸的該通孔之一橫截面。
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