TWI346974B - Polycrystalline sige junctions for advanced devices - Google Patents

Polycrystalline sige junctions for advanced devices

Info

Publication number
TWI346974B
TWI346974B TW094113976A TW94113976A TWI346974B TW I346974 B TWI346974 B TW I346974B TW 094113976 A TW094113976 A TW 094113976A TW 94113976 A TW94113976 A TW 94113976A TW I346974 B TWI346974 B TW I346974B
Authority
TW
Taiwan
Prior art keywords
advanced devices
polycrystalline sige
junctions
sige junctions
polycrystalline
Prior art date
Application number
TW094113976A
Other languages
English (en)
Chinese (zh)
Other versions
TW200539323A (en
Inventor
Kevin K Chan
Rober J Miller
Erin C Jones
Atul Ajmera
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of TW200539323A publication Critical patent/TW200539323A/zh
Application granted granted Critical
Publication of TWI346974B publication Critical patent/TWI346974B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
TW094113976A 2004-05-21 2005-04-29 Polycrystalline sige junctions for advanced devices TWI346974B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/851,821 US7135391B2 (en) 2004-05-21 2004-05-21 Polycrystalline SiGe junctions for advanced devices

Publications (2)

Publication Number Publication Date
TW200539323A TW200539323A (en) 2005-12-01
TWI346974B true TWI346974B (en) 2011-08-11

Family

ID=35375736

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094113976A TWI346974B (en) 2004-05-21 2005-04-29 Polycrystalline sige junctions for advanced devices

Country Status (4)

Country Link
US (3) US7135391B2 (enExample)
JP (1) JP4948785B2 (enExample)
CN (1) CN100369199C (enExample)
TW (1) TWI346974B (enExample)

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FR2781485B1 (fr) 1998-07-21 2003-08-08 Denis Barritault Polymeres biocompatibles leur procede de preparation et les compositions les contenant
US8323157B2 (en) * 2004-02-24 2012-12-04 Total Gym Global Corp. Method of using an exercise device having an adjustable incline
US7135391B2 (en) * 2004-05-21 2006-11-14 International Business Machines Corporation Polycrystalline SiGe junctions for advanced devices
NO324539B1 (no) * 2005-06-14 2007-11-19 Thin Film Electronics Asa Fremgangsmate i fabrikasjonen av en ferroelektrisk minneinnretning
US8278176B2 (en) 2006-06-07 2012-10-02 Asm America, Inc. Selective epitaxial formation of semiconductor films
US20080124874A1 (en) * 2006-11-03 2008-05-29 Samsung Electronics Co., Ltd. Methods of Forming Field Effect Transistors Having Silicon-Germanium Source and Drain Regions
JP2009043916A (ja) 2007-08-08 2009-02-26 Toshiba Corp 半導体装置及びその製造方法
DE102007052626B4 (de) 2007-11-05 2018-05-30 Robert Bosch Gmbh Verfahren zur Herstellung von porösen Strukturen in auf Silizium basierenden Halbleiterstrukturen
US9095506B2 (en) * 2008-11-17 2015-08-04 Allergan, Inc. Biodegradable alpha-2 agonist polymeric implants and therapeutic uses thereof
US8809170B2 (en) 2011-05-19 2014-08-19 Asm America Inc. High throughput cyclical epitaxial deposition and etch process
JP2013089889A (ja) * 2011-10-21 2013-05-13 Elpida Memory Inc 半導体装置及びその製造方法
US8741726B2 (en) * 2011-12-01 2014-06-03 Taiwan Semiconductor Manufacturing Company, Ltd. Reacted layer for improving thickness uniformity of strained structures
US11575043B1 (en) * 2021-07-23 2023-02-07 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and manufacturing method of the same

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Publication number Priority date Publication date Assignee Title
US3902936A (en) * 1973-04-04 1975-09-02 Motorola Inc Germanium bonded silicon substrate and method of manufacture
JPS57128022A (en) * 1981-01-30 1982-08-09 Tadatsugu Ito Forming method for silicon epitaxially grown film
JPH01248668A (ja) * 1988-03-30 1989-10-04 Seiko Epson Corp 薄膜トランジスタ
US5101247A (en) * 1990-04-27 1992-03-31 North Carolina State University Germanium silicon dioxide gate MOSFET
US5250452A (en) * 1990-04-27 1993-10-05 North Carolina State University Deposition of germanium thin films on silicon dioxide employing interposed polysilicon layer
JPH04127522A (ja) * 1990-09-19 1992-04-28 Nec Corp 半導体多結晶の選択的成長方法
JP2965094B2 (ja) * 1991-06-28 1999-10-18 キヤノン株式会社 堆積膜形成方法
US5571744A (en) 1993-08-27 1996-11-05 National Semiconductor Corporation Defect free CMOS process
JP2919281B2 (ja) * 1994-11-11 1999-07-12 日本電気株式会社 半導体装置の製造方法
US5646073A (en) 1995-01-18 1997-07-08 Lsi Logic Corporation Process for selective deposition of polysilicon over single crystal silicon substrate and resulting product
FR2765394B1 (fr) * 1997-06-25 1999-09-24 France Telecom Procede d'obtention d'un transistor a grille en silicium-germanium
FR2773177B1 (fr) * 1997-12-29 2000-03-17 France Telecom Procede d'obtention d'une couche de germanium ou silicium monocristallin sur un substrat de silicium ou germanium monocristallin, respectivement, et produits multicouches obtenus
EP1192646B1 (en) * 1999-06-25 2008-08-13 Massachusetts Institute Of Technology Cyclic thermal anneal for dislocation reduction
DE10246718A1 (de) * 2002-10-07 2004-04-22 Infineon Technologies Ag Feldeffekttransistor mit lokaler Source-/Drainisolation sowie zugehöriges Herstellungsverfahren
US7166528B2 (en) * 2003-10-10 2007-01-23 Applied Materials, Inc. Methods of selective deposition of heavily doped epitaxial SiGe
US6872626B1 (en) * 2003-11-21 2005-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a source/drain and a transistor employing the same
US7135391B2 (en) * 2004-05-21 2006-11-14 International Business Machines Corporation Polycrystalline SiGe junctions for advanced devices

Also Published As

Publication number Publication date
US7741165B2 (en) 2010-06-22
JP2005340816A (ja) 2005-12-08
JP4948785B2 (ja) 2012-06-06
US20080248635A1 (en) 2008-10-09
CN1707754A (zh) 2005-12-14
US20070010076A1 (en) 2007-01-11
US20050260832A1 (en) 2005-11-24
US7387924B2 (en) 2008-06-17
US7135391B2 (en) 2006-11-14
CN100369199C (zh) 2008-02-13
TW200539323A (en) 2005-12-01

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