TWI338544B - Three-dimensional patterned structure of circuit board and process thereof - Google Patents

Description

22354twf.doc/e IX. Description of the Invention: [Technical Field] The present invention relates to a three-dimensional patterning structure of a circuit board and a trace process thereof, and in particular to a The metal layer has a plurality of three-dimensional patterned structures of different thicknesses and processes thereof. [Prior Art] With the advancement of technology, electronic products such as cellular phones, notebook PCs, and personal digital assistants (PDAs) have become widespread in modern society. In the necessary parts of these electronic products, in addition to electronic components such as chips and passive components, circuit boards carrying and arranging these wafers and passive components are also indispensable important parts. 1A is a schematic cross-sectional view of a conventional circuit board. Referring to FIG. 1A, the circuit board 1A shown in FIG. 1A is a four-layer ayer wiring board, which is composed of two signal layers 11a and 11b, a ground layer 120, a power layer 130, and three. The basic dielectric structure of the layer dielectric layers 140a, 140b, 140c. The signal layers 112 are disposed on the signal layer 110a, and the electronic component 10 is electrically connected to the signal line 112. In addition, the power layer 130 can externally connect the power supply 'supplied with the power of the circuit board 1 ' to drive the electronic components 1 装 mounted on the circuit board 1 , and enable the input/round signals of the electronic component 10 to pass the signal Line 112 is passed and operates. The ground layer 120 is disposed between the signal layer 11〇3 and the power layer 13〇. In addition, 22355 twf.doc/e, the signal layers 11a and 11b, the ground layer 12A, and the power layer 13 are separated by dielectric layers 140a, 140b, and 140c, respectively, for insulation. In the field of heat dissipation, the circuit board 1 used to transmit the waste heat generated by the electronic component 1 to the signal layer 11 〇 & and 11 〇 b to keep the electronic component at a normal operating temperature, but derived from the electronic component. Waste heat is constantly increasing. Therefore, under the existing line structure, how to improve the heat dissipation capacity of the circuit board to meet the actual heat dissipation requirements needs to be solved. Figure 1B is a schematic illustration of the formation of a blind via in a dielectric layer by laser ablation techniques. In FIG. 1B, the conventional dielectric layer i4〇d is superposed between the upper and lower signal layers 110c and 110d, and the annular pad of the upper signal layer ii〇c is opposite to the receiving pad 114b of the lower signal layer 110d. And electrically connected between the two by a conductive material or a conductive material (not shown) filled in the blind hole. However, the blind hole P1 formed by laser ablation has a defect that the aspect ratio (the aspect ratio) is too high, which is disadvantageous for the subsequent plating or hole filling process. Therefore, how to solve the bottleneck of the blind hole P1 aspect ratio is too high, to mention: the reliability of the circuit board, it is an urgent task. SUMMARY OF THE INVENTION The present invention provides a three-dimensional patterned structure of a circuit board and its control rights to improve the heat dissipation capability of the south circuit board. The invention provides a three-dimensional patterned structure of a circuit board and a process thereof to solve the bottleneck of the aspect ratio of the laser burning process and the plating process, and to improve the reliability of the circuit board. The present invention provides a three-dimensional patterned structure of a wiring board, comprising a dielectric layer of 22354 twf.doc/e, at least one first three-dimensional pattern, and at least one second three-dimensional pattern of the same material as the first three-dimensional pattern. The first three-dimensional pattern and the second vertical pattern are disposed on the same surface of the first dielectric layer, and the thickness of the first three-dimensional pattern is greater than the thickness of the second three-dimensional pattern. In one embodiment, the first three-dimensional pattern is a first heat dissipation line, and the second three-dimensional pattern is a second heat dissipation line, and the heat dissipation capability of the first three-dimensional pattern is relatively larger than the heat dissipation capability of each second three-dimensional pattern. The invention further provides a three-dimensional patterning process for a circuit board, comprising the steps of: firstly forming at least a first three-dimensional pattern and at least two second three-dimensional patterns on the same surface of the dielectric layer. Next, a patterned overcoat layer is formed on the first dielectric layer, and the thickness of the third stereoscopic pattern is changed by the %. The thickness of the k-stereoscopic pattern is greater than that of the second month. In the embodiment, the patterning comprises the steps of: forming a layer of the first layer of the first and second layers of the photoresist layer with a three-dimensional pattern and the second three-dimensional pattern. . Next, the photoresist layer is partially removed to form a (four) cladding layer. In the embodiment, the method of forming a patterned overcoat layer is formed by forming an insulating layer on the first dielectric layer, wherein - a laser beam is used; a three-dimensional pattern. In the embodiment, in one embodiment of the invention, the method includes performing a thickness of a three-dimensional pattern on the first-dimensional pattern. Electroplating. 1338544 22354lwf.doc/e In an embodiment of the invention, after removing the patterned cap layer, the method further includes forming a second dielectric layer on the first dielectric layer, wherein the second dielectric The layer covers the first three-dimensional pattern and the second three-dimensional pattern, and the dielectric f has at least one blind hole corresponding to the first three-dimensional pattern. The present invention further provides a three-dimensional patterning process for the circuit board, including Taking the I step. First, forming at least the first three-dimensional pattern and the at least one second three-dimensional pattern in the same dielectric layer by directly printing the metal conductor.

surface. Next, the direct printing of the metal conductor is performed once, and the thickness of the first-stereoscopic pattern is changed so that the thickness of the first three-dimensional pattern is larger than the thickness of the second three-dimensional pattern. In the three-dimensional patterned structure of the circuit board of the present invention, the heat dissipation of the first perspective view increases with the increase of the thickness, so that the circuit board can improve the overall heat dissipation capability by diverging the father's first-dimensional pattern. In addition, the increase in the thickness of the -1 case also reduces the aspect ratio of the blind hole, which improves the quality of the blind hole and improves the reliability of the circuit board.

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; The three-dimensional patterned structure of the board is a three-dimensional a Lit * FIG. 2B is a cross-sectional view of the circuit board according to the embodiment of the present invention. It must be explained in advance that the circuit board

Only Ξ: two: layer, six layers, eight layers or more of multi-layer circuit boards, the configuration of the patterning structure of the figure is representative, in which Figure 2A 22354twf.d〇c/e can be used as the outermost line of the circuit board Layer, and Figure 2B can be used as the wiring structure of the middle layer of the circuit board. Therefore, the circuit board can select the inner layer circuit process after the completion of the conventional line=, and then the bulk patterning method of the present invention is performed by the build-up method or the stacking method as the outermost circuit layer, or when the inner layer line is private. The three-dimensional three-dimensional mileage of the present invention is completed by the build-up method or the stacking method as a three-dimensional patterned structure of any layer in the circuit board. Therefore, the drawings are intended to be illustrative only and not to limit the invention. Referring to FIG. 2A, the three-dimensional patterned structure 200 of the circuit board includes a layer 210, a first three-dimensional pattern 22A, and a second three-dimensional pattern 23A, the first three-dimensional pattern 220 and the plurality of second three-dimensional patterns 23A. The material of the first three-dimensional pattern 22A can be selected to be the same as the material of the second three-dimensional pattern 230 (for example, copper or aluminum). The number of the jth and second three-dimensional patterns 22A, 23A can be adjusted in accordance with the change of the wiring board 2A. Specifically, the thickness T1 of the first three-dimensional pattern 220 is larger than the thickness T2 of each of the second three-dimensional patterns 230. The first three-dimensional pattern and the second three-dimensional pattern can be used as heat dissipation lines, and can be adjusted to different degrees according to heat dissipation requirements. For example, the first three-dimensional pattern 220 is, for example, a high current amount: a heat dissipation line, and the second three-dimensional pattern 230 is, for example, a second current line of a low current amount. The heat dissipation force of the first three-dimensional pattern θ2 is greater than the heat dissipation capability of the second three-dimensional pattern 230 by increasing the thickness of the first three-dimensional pattern 220, so that the heat dissipation capability of the first three-dimensional pattern 230 is greater than that of the second three-dimensional pattern 230. The overall heat dissipation capability of the circuit board 200 is provided. Next, referring to FIG. 2B, the first three-dimensional pattern 220 and the second three-dimensional 22354 twf.doc/e pattern 230 may also be buried in the dielectric layer 21' to form a buried line. In the present embodiment, the thickness T1 of the first three-dimensional pattern 220 is greater than the thickness T2 of the second three-dimensional pattern. Therefore, the circuit board 200 can relatively increase the overall heat dissipation capability by increasing the thickness of the first three-dimensional pattern 220. Next, please refer to FIG. 2C, which is a schematic diagram showing the aspect ratio of the blind hole reduced by the three-dimensional patterning structure of FIG. With respect to the blind via pi shown in FIG. 1β, when the present invention laser ablates the dielectric layer 210 to form the blind via ρ2 on the first three-dimensional pattern 220, the thickness of the first three-dimensional pattern 22 is relatively reduced. The depth of the blind hole Ρ 2 can thus overcome the defect that the blind hole ρ2 aspect ratio (the ratio of the hole depth/hole width) is too high. In addition, the first three-dimensional pattern 22 can be used as the receiving layer 而 and the annular signal pad 214 of the upper signal layer can be electrically connected to the first three-dimensional pattern 22 by the blind hole 2 of the completion key and hole filling process to transmit the electronic signal. Next, a three-dimensional patterning process of the wiring board of this embodiment will be described. FIG. 3A to FIG. 3B are schematic diagrams showing the process of the three-dimensional patterning process of the circuit board of FIG. Please refer to FIG. 2 for the first time; (4) The surface of the electric layer 210 is formed with a plurality of second three-dimensional patterns, a first three-dimensional pattern 220, wherein the first three-dimensional pattern 22 〇, two = pattern 230 can be heard on the surface with money Form formation ^ first = face 210a laminating one piece (four) copper film (four) n = ae eGppepRCC) 'and then patterned to form the backing copper film. The upper 1 and the first three-dimensional pattern 220, and the second three-dimensional pattern 230 The thickness is substantially followed by 'see FIG. 3B and FIG. 3C, forming a patterned cover layer 25 〇 22354 twf. doc / e = surface 2 of the electrical layer 21 ,, wherein the patterned cover layer 25 〇 sweat: H, and open卩Η will expose the first - [in the example of the formation of patterned overlay 25 〇: = one = 2 = dielectric layer 210 (Figure 3 Β == = stereo map? 22., and the second stereo two: and Layered (as shown in FIG. 3B, the cover layer 24G may be a photoresist layer or an insulation such as the layer 240 is a photoresist layer, as shown in FIG. 3B: a method of forming a complex j 240 It may be a dry film photoresist (_ 〇 〇 〇 )) on the dielectric layer 21 ,, or a photoresist is applied on the dielectric layer 2 (1). The layer 240 (i.e., the photoresist layer) is exposed (exp_re) and de-emelded (deVel) to partially remove the cap layer 24 to form an opening Η (as shown in Fig. 3C). Thus, the patterned cap layer 25 is completed. In addition, since the cover layer 240 may also be an insulating layer, the method of forming the cover layer 240 may also form a layer of a tree on the dielectric layer 21' as shown in FIG. 3A. The light illuminates the cover layer 240 (ie, the resin layer) to form an opening σ Η, thereby exposing the first three-dimensional pattern 220. It is worth noting that the laser light can also ablate the dry film photoresist or the octahedral photoresist layer. Therefore, the above method of laser light burning can also be applied to the case where the cover layer 240 is a photoresist layer. Next, referring to FIG. 3D and FIG. 3B, the thickness of the first three-dimensional pattern 220 is changed so that the first three-dimensional pattern 220 The thickness of the film is increased to be larger than the thickness of each of the first three-dimensional patterns 230 (as shown in FIG. 3A). In the present embodiment, the method of thickness of 1338544 22354twf.doc/e Γ2=Τ 220, firstly, forming a seed Two and two inner wall (SideWall) S, first-dimensional pattern 22〇, and The surface of the cover layer 250 is on the surface 25〇a. The seed shoulder 22 is made by electro-electric recording (e-叩), and the material of the type 222 is the same as the first-dimensional pattern 220. Next, the seed layer is used. 222 is a body for electroplating the first-dimensional pattern 220' so that the first three-dimensional pattern 220' becomes a thicker first three-dimensional pattern 22', as shown in FIG. 3e.

After forming the first three-dimensional pattern 220, referring to FIG. 3F, the seed layer 222 on the surface 250a can be removed. For example, the seed layer 222 on the surface 25A can be removed by micro etching or grinding. ^ Next, the patterned cover layer 250 may be removed to expose the first three-dimensional patterns 230, as shown in Figure 3G. Since the material of the patterned cap layer 25A can be photoresist, a photoresist can be used to remove the patterned cap layer 250. %

After the patterned cover layer 250 is removed, a tamper-resistant layer may be formed on the first three-dimensional pattern 220 and the second three-dimensional patterns 230 respectively (the first three-dimensional pattern 220 and the second three-dimensional patterns 230 are not protected). These anti-oxidation layers can be made of a Ni/Au layer or other materials that are resistant to deuteration. In addition to forming an oxidation resistant layer, please refer to Figure 3H to remove the patterned coating layer. After the 250 is formed, another dielectric layer 270 is formed on the dielectric layer 21 , to cover the first three-dimensional pattern 220 and the second three-dimensional patterns 23 〇 the first three-dimensional pattern 220 and the second three-dimensional pattern 230 are buried in the second medium 12 1338544 22354twf.doc/e In the electrical layer 270, the configuration type is as shown in Fig. 2B, forming a buried circuit. After forming the first dielectric layer 270, the laser-fired first dielectric layer 270 can be laser-fired. To form a blind via (as shown in FIG. 2C) to expose the first three-dimensional pattern 220. The subsequent plating blind holes and the hole-filling process are well known to those of ordinary skill in the art and will not be described herein.

It is worth mentioning that the three-dimensional patterning process of the circuit board shown in FIG. 3A to FIG. 3H increases the thickness of the first three-dimensional pattern 220 ′, so that the thickness of the first three-dimensional pattern 220 is greater than each of the second three-dimensional patterns 230 . thickness of. However, in another embodiment, the second three-dimensional pattern 23A may be etched to reduce the thickness of each of the second three-dimensional patterns 230, thereby forming a thinner second three-dimensional pattern 230. In this way, instead of the electroplating process, the thickness of the first three-dimensional pattern 220 can also be greater than the thickness of the second three-dimensional pattern 230. ,

(4) In addition, FIG. 4A and FIG. 4B further illustrate a schematic diagram of a three-dimensional printing process. In this embodiment, first, a P-metal conductor is used to form a at least-first-dimensional pattern 320 by using a printing head 340, and at least a body pattern 330 is formed on the dielectric layer 31-surface bird, followed by I Shuo 34Q. Performing a direct-to-slip metal conductor manner, changing the thickness of the second (four) case 320' is such that the thickness of the first three-dimensional pattern 320 is greater than that of the guide; the thickness of the case 330 is as shown in FIG. 4B. The printed metal, copper, inscription, tin or silver, is directly printed on the dielectric layer 310, and the required line = pattern to replace the plating, (4), etc. Time and cost. It can be seen from the above embodiments that the 13th 1338544 22354twf.doc/e stereoscopic pattern and the second stereoscopic pattern can be formed, and then the subsequent burn-in can be performed to improve the quality of the blind via recording. The r-shaped to the heart-shaped plate has a thicker third-dimensional pattern as the heat dissipation structure to utilize the overall heat dissipation capability of the thick circuit board. In addition, k-South can be used as a blind hole to support the scale, and it is possible to overcome the (four)^ brother-three-dimensional pattern=and further improve the subsequent electric clock and the hole-filling process. 2===: Λ·degree° Although the present invention has been disclosed in the preferred embodiment As above, it is not intended to limit the invention, and any one of ordinary skill in the art to which the invention pertains can be made without departing from the spirit and scope of the invention. The person defined in the attached application shall prevail. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a schematic cross-sectional view of a conventional circuit board.

The electric recording 01 or a combination of the two is a blind cut and hole filling process. FIG. 13 is a schematic view showing a blind hole in a dielectric reed by a laser ablation technique. Fig. 2A is a cross-sectional view showing a three-dimensional patterned structure of a wiring board according to an embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Figure 2C is a schematic cross-sectional view showing the three-dimensional patterned structure of a circuit board according to another embodiment of the present invention. Figure 2C is a schematic view showing the aspect ratio of the blind hole reduced by the three-dimensional patterned structure of Figure 2; 14 1338544 22354twf.doc/e FIGS. 3A to 3H are flow diagrams illustrating a three-dimensional patterning process of the three-dimensional patterned structure of the circuit board of FIG. 2A. 4A and 4B are schematic views showing a jet-type three-dimensional patterning process of the present invention. [Main component symbol description] 10: Electronic component 112: Signal line 100: Circuit board 114a: Ring pad

110a, 110b: signal layer 114b: receiving pad 110c: upper signal layer 120: ground layer 110d: lower signal layer 130: power supply layer 140a, 140b, 140c, 140d: dielectric layer 200, 200': three-dimensional patterning of circuit board Structure 210, 210', 270: dielectric layer 210a, 210a': surface 214: annular pad 220, 220': first three-dimensional pattern 222: seed layer 240: cover layer 230: second three-dimensional pattern 250, 250': pattern Cover layer S: inner wall ΤΙ, Τ 2: thickness 310: dielectric layer 250a: surface Η: opening PI, Ρ 2: blind hole ^ 320, 320': first three-dimensional pattern 330: second three-dimensional pattern 340: print head 15

Claims (1)

99-11-9 99-11-9 X. Patent application scope: The three-dimensional patterned structure of the L-type circuit board comprises: ~ a first dielectric layer; at least one first three-dimensional pattern 'one of the first current quantities is adapted to pass the first three-dimensional pattern; and the same The at least one second three-dimensional pattern is opposite to the material of the first three-dimensional pattern, wherein the first three-dimensional pattern and the second three-dimensional pattern are disposed on the same surface of the first two-μ layer, and the first three-dimensional pattern The thickness of the second case is greater than the thickness of the second case, and a second amount of current is adapted to pass through the second perspective view "and the first amount of current is greater than the second amount of current. Structure 2 is as claimed in claim 1 The three-dimensional patterned circuit of the circuit board, wherein the first three-dimensional pattern and the second three-dimensional pattern have a heat dissipation capability that is greater than a heat dissipation capability of the first three-dimensional pattern. a three-dimensional pattern of a circuit board according to the first aspect of the patent application, in which the three-dimensional pattern and the second three-dimensional pattern are buried in the second dielectric layer structure Reading i The second dielectric layer is covered on the first dielectric layer, and the three-dimensional pattern of the structural plate is on the three-dimensional pattern. /, there is a hole, and the axis is exposed on the fifth type of circuit board. The three-dimensional patterning process comprises: forming at least a first-dimensional _ and at least - 16 on the second electrical layer, and a replacement layer on the first dielectric layer. ^度大: iC thickness 'the thickness of the first three-dimensional pattern is greater than the first three-dimensional pattern - the amount of current is suitable for the case, and the amount of the first current is greater than the fifth embodiment of the second perspective process The method of three-dimensionally patterning a printed circuit board includes: · the first body =:: the first: the electrical layer, wherein the first layer 7 is covered by an ir layer to form the patterned cap layer. The second layer of the F and the =:== the insulating layer covers the cover layer. The light is ablated by the lightening of the insulating layer '(10) into the patterning. 8. The circuit board of the invention is changed as described in the patent application. Three-dimensional patterning of a three-dimensional method for performing the thickness of the three-dimensional pattern includes the standing of the circuit board of the fifth process The patterned two-dielectric layer: after the cover layer is further formed, further comprising: forming a first-third-dimensional pattern: ί: Γ layer, wherein the second dielectric layer covers the second second three-dimensional pattern, and the The second dielectric layer has a blind hole to be replaced by 17 1338544 99-11-9, which is correspondingly exposed on the first three-dimensional pattern. The three-dimensional patterning process of the circuit board, wherein the method for forming the blind hole comprises laser ablation. 11. A three-dimensional patterning process of the circuit board, comprising: forming at least one first by directly printing a metal conductor The three-dimensional pattern and the at least one second three-dimensional pattern are on the same surface of a dielectric layer; and the direct printing of the metal conductor is performed to increase the thickness of the first three-dimensional pattern, such that the thickness of the first three-dimensional pattern is greater than the first The thickness of the two-dimensional pattern. 12. The three-dimensional patterning process of a circuit board according to claim 11, wherein the printed metal conductor comprises copper, aluminum, tin or silver. 18