200845846 22j^4twLaoc/e 九、發明說明： 【發明所屬之技術領域】 本杳明疋有關於一種線路板（circuit board)之立體圖 案化結構及其線路（trace)製程，且特別是有關於一種在 同一金屬層中具有多條不同厚度之立體圖案化結構及其製 程。 【先前技術】 隨著科技進步’手機（cenular phone)、筆記型電腦 (notebook PC)以及個人數位助理機（pers〇nal邮灿 assistant，PDA)等電子產品已普遍地在現代社會中。在這 些電子產品的必要零件中，除了晶片（chip)與被動元件 (passive component)專電子元件（eiectric comp〇nent)之 外’承載與配置這些晶片與被動元件的線路板也是不可或 缺的重要零件。 圖1A是習知一種線路板之剖面示意圖。請參閱圖 1A圖1A所示的線路板1〇〇是四層線路板（f〇ur_iayer wiring board)，其由二訊號層 11〇&與11〇]3、接地層 12〇、 電源層13〇以及三層介電層140a、140b、140c組成的基本 疊板結構。訊號層l10a、11〇t)已佈局好多條訊號線路112, 而電子元件10可裝設在訊號層ll〇a上，並與訊號線路112 電性連接。此外，電源層130可對外連接供應此線路板1〇〇 電力的電源’以驅動裝設於線路板1〇〇上的電子元件1〇，並 使電子元件10的輪入/輸出訊號可經由訊號線路112傳遞而運 作。接地層120配置於訊號層n〇a與電源層n〇之間。另 200845846 22354twt.doc/e 外，汛號層110a與ll〇b、接地層120以及電源層i3〇分 別以介電層140a、140b、140c相隔於其中，以作為絕緣之 用0200845846 22j^4twLaoc/e Nine, the invention description: [Technical field of the invention] The present invention relates to a three-dimensional patterned structure of a circuit board and a trace process thereof, and particularly relates to a There are a plurality of three-dimensional patterned structures of different thicknesses in the same metal layer and processes thereof. [Prior Art] With the advancement of technology, electronic products such as cenular phones, notebook PCs, and personal digital assistants (PDAs) have been widely used in modern society. In the necessary parts of these electronic products, in addition to the chip and the passive component eiectric comp〇nent, the board that carries and configures these chips and passive components is also indispensable. Components. 1A is a schematic cross-sectional view of a conventional circuit board. Referring to FIG. 1A and FIG. 1A, the circuit board 1A is a four-layer wiring board (f〇ur_iayer wiring board), which is composed of two signal layers 11〇& and 11〇]3, a ground layer 12〇, and a power layer 13 A substantially stacked structure of germanium and three dielectric layers 140a, 140b, 140c. The signal layer l10a, 11〇t) has a plurality of signal lines 112 arranged, and the electronic component 10 can be mounted on the signal layer 11a and electrically connected to the signal line 112. In addition, the power layer 130 can externally connect the power supply 'supplied with the power of the circuit board 1 ' to drive the electronic components 1 装 mounted on the circuit board 1 , and enable the wheel input/output signals of the electronic component 10 to pass the signal Line 112 is passed and operates. The ground layer 120 is disposed between the signal layer n〇a and the power layer n〇. In addition, the apostrophe layers 110a and 〇b, the ground layer 120, and the power layer i3 are separated by dielectric layers 140a, 140b, and 140c, respectively, for use as insulation.
ί 在散熱課題上，線路板100以往以訊號層110&與11〇b 來傳遞電子元件10所衍生的廢熱，讓電子元件保持在正常 的工作溫度下，但電子元件所衍生的廢熱不斷地在增加， 因此在既有的線路結構下，如何提高線路板100的散熱能 力以符合實際的散熱需求，亟待解決。 一圖1B是習知以雷射燒蝕技術形成盲孔於一介電層中 的不意圖。在圖1B中，習知的介電層M〇d疊合於上、下 訊號層110c、ll〇d之間，而上訊號層n〇c的環形墊⑽ 與下汛號層110d的承接墊114b相對，且兩者之間以電铲 或填入於盲孔中的導電材料（未綠示）電性連接。缺而，又 =雷射祕所形成之盲孔P1存在縱橫比（孔深/孔寬的比 :Aspect Rati0)過高的缺陷，不利於後續電鍍或填孔製 1 口此’如何解決盲孔Pi縱橫比過高的瓶頸，以提高 線路板的可靠度，實乃刻不容緩的課題。 【發明内容】 ^本發明提供一種線路板之立體圖案化結構及其製 私’以提高線路板的散熱能力。 本發明提供-種線路板之立體圖案化結構及 解決雷射燒減電料製程的縱橫比的瓶頸，進ς k升線路板的可靠度。 本發明提ώ-齡路板之立體圖案化結構，其包括第 200845846 22354twf.doc/e -介電層、至少-第-立體圖案以及與第„立體圖 質相同的至少-第二立體圖案。第—立體圖案以及 體圖案配置於第一介電層的同一表面，且第一立體〜立 厚度大於第二立體圖案的厚度。 181案的 Γί In the heat dissipation problem, the circuit board 100 used to transmit the waste heat generated by the electronic component 10 by the signal layers 110& and 11〇b, so that the electronic components are kept at a normal operating temperature, but the waste heat generated by the electronic components is constantly Therefore, under the existing line structure, how to improve the heat dissipation capability of the circuit board 100 to meet the actual heat dissipation requirements needs to be solved. Figure 1B is a schematic view of the conventional formation of blind vias in a dielectric layer by laser ablation techniques. In FIG. 1B, a conventional dielectric layer M〇d is superposed between the upper and lower signal layers 110c and 110d, and the annular pad (10) of the upper signal layer n〇c and the lower pad 110d are supported by the pad. The 114b is opposite, and the two are electrically connected by a shovel or a conductive material (not shown) filled in the blind hole. Missing, and = blind hole formed by the blind hole P1 has an aspect ratio (hole depth / hole width ratio: Aspect Rati0) too high defects, is not conducive to subsequent plating or hole filling system 1 how to solve blind holes The bottleneck of the Pi aspect ratio is too high, so as to improve the reliability of the circuit board, it is an urgent task. SUMMARY OF THE INVENTION The present invention provides a three-dimensional patterned structure of a circuit board and its manufacturing to improve the heat dissipation capability of the circuit board. The invention provides a three-dimensional patterned structure of the circuit board and a bottleneck for solving the aspect ratio of the laser burning and reducing electric power material manufacturing process, and the reliability of the k-liter circuit board. The three-dimensional patterned structure of the present invention includes a 200845846 22354 twf.doc/e-dielectric layer, at least a first-dimensional pattern, and at least a second three-dimensional pattern identical to the first stereoscopic image. The three-dimensional pattern and the body pattern are disposed on the same surface of the first dielectric layer, and the first three-dimensional thickness is greater than the thickness of the second three-dimensional pattern.
(J 在本發明之一實施例中，第一立體圖案為第一 路，而第二立翻案為第二散熱線路，且第—立體=線 散熱能力相對大於各第二立體圖案的散熱能力。"的 本發明又板出一種線路板的立體圖案化製程， 以下步驟：首先’形成至少—第-立體圖案與至少二!Γ括 立體圖案於-第-介電層之同—表面。接著，〜苹二 改鐵笛It 顯露出第一立體圖案。接基 艾 體圖案的厚度，使第—立體圖案的厚产大， 二立體圖案的厚度。 子度大於第 =發明之—實_巾，形成圖案域 =:t驟:首先，形成-光阻層於第-介電層上2 先阻層覆蓋第-立體圖案以及這， 部份，阻層，以形成圖案;^體圖案。接著’ 括以下^明之:實施例中’形朗案化覆蓋層之方法包 絕緣層覆4錢’形成—絕緣層於第—介電層上，其中 用_雷^；弟—立體圖案與這些第二立體圖案。接著，利 ablatio^o光（匕财beam )對絕緣層進行燒蝕（laser ’以形成圖案化覆蓋層。 方法包ίίΓ之—實施例中’改㈣—立體圖案的厚度之 第立體圖案進行電鍍（electroplating)。 200845846 22354twf doc/e π个赞叨之 ,ζ, .....，小π间未化復盖層 後，更匕括形成一第二介電層於第一介電層上，豆 2層立體圖案與第二立體圖案，且第二介電i 至乂目孔，其對應顯露於第一立體圖案上。 μΪΓ明又提出—種線路板的立體圖案化製程，盆包括 利用直接噴印金屬導體方式，形成= c o 一立體圖案的厚产，μ 屬¥體方式，改變第 圖案的料 使弟—立體圖案的厚度大於第二立體 在本兔明之線路板之立體圖案化、纟 一 案的散熱性隨著厚度的择 〃 : 立體圖 立體圖案的厚心力=间整體的散熱能力。此外，第- 鍍品質&胃、t相對減少盲孔的縱橫比，使盲+ -貝“，柄提高線路板的 使目孔電 為讓本發明之上、f 易懂’下文特舉較佳他目的、特徵和優點能更明顯 明如下。只施例，並配合所附圖式’作詳細說 【實施方式】 的叫二-施例之線路板之立體_荦^士 立體圖案化結構的剖面亍實施例之線路板之 可以是二層、四層、了圖。而事先說明的是，線路板 式僅以立體圖案化Μ二、八層或以上的多層線路板，圖 口成構的配置形態為代表說明，其中圖= 8 200845846 22354twf.doc/e 可作為線路板的最外層線路層，而圖2B可作為線路板中 \ 層的線路結構。因此，線路板可選擇在完成習知線路 ^的内層線路製程之後，接著以增層法或疊合法完成本發 曰的2體圖案化結構作為最外層線路層，或是在進行内層 線ΐ衣=之時，以增層法或疊合法一併完成本發明的立體 故明之圖式僅為了方便說明，並非用嫌制本;!月。(J In one embodiment of the present invention, the first three-dimensional pattern is the first road, and the second vertical pattern is the second heat dissipation line, and the first three-dimensional line heat dissipation capability is relatively larger than the heat dissipation capability of each of the second three-dimensional patterns. The invention of the present invention further provides a three-dimensional patterning process for the circuit board, the following steps: firstly forming a surface of at least the first-three-dimensional pattern and at least two of the three-dimensional pattern on the first-dielectric layer. , 〜二二改铁笛 It reveals the first three-dimensional pattern. The thickness of the base body pattern makes the thickness of the first three-dimensional pattern large, and the thickness of the two-dimensional pattern. The sub-degree is greater than the first invention - the actual _ towel Forming the pattern field =: t: first, forming a photoresist layer on the first dielectric layer 2 first resisting the first-dimensional pattern and the portion, the resist layer to form a pattern; 'Including the following ^: In the embodiment, the method of forming a cover layer is covered with an insulating layer, and the insulating layer is formed on the first dielectric layer, wherein the _Ray ^; brother - three-dimensional pattern and these Two-dimensional pattern. Next, Lee ablatio^o light (匕财beam) on the insulation layer Row ablation (laser ' to form a patterned overlayer. Method package — Γ — 实施 实施 实施 实施 实施 四 四 四 四 四 四 四 四 四 四 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 ζ, ....., after the small π uncoated layer, further comprising forming a second dielectric layer on the first dielectric layer, the bean 2 layer three-dimensional pattern and the second three-dimensional pattern, and second Dielectric i to the eyelet hole, the corresponding surface is exposed on the first three-dimensional pattern. μ Mingming also proposes a three-dimensional patterning process of the circuit board, the basin includes a direct printing metal conductor to form a thickness of = co a three-dimensional pattern Production, μ belongs to the body mode, the material of the first pattern is changed, the thickness of the three-dimensional pattern is greater than that of the second three-dimensional pattern in the circuit board of the rabbit, and the heat dissipation of the case is selected according to the thickness: three-dimensional three-dimensional Thickness of the pattern = overall heat dissipation capability. In addition, the first plating quality & stomach, t relatively reduce the aspect ratio of the blind hole, so that the blind + - shell ", the handle increases the circuit board to make the eye hole electricity for the present invention Above, f is easy to understand' His purpose, characteristics and advantages can be more clearly as follows. Only the example, and with the accompanying drawings 'detailedly, the second embodiment of the circuit board is called a three-dimensional pattern of three-dimensional pattern structure. The circuit board of the embodiment may be a two-layer, four-layer, and a picture. In advance, the circuit board type only designs a multilayer circuit board of two, eight or more layers in a three-dimensional pattern, and the configuration of the image is structured. The form is representative, in which figure = 8 200845846 22354twf.doc/e can be used as the outermost circuit layer of the circuit board, and Figure 2B can be used as the circuit structure of the layer in the circuit board. Therefore, the circuit board can be selected to complete the conventional circuit. After the inner layer circuit process, the 2-body patterned structure of the present hair strand is then formed as the outermost circuit layer by the build-up method or the stacking method, or when the inner layer line is used, the layering method or the stacking method is performed. The three-dimensional illustration of the present invention is only for convenience of explanation, and is not intended to be used in this case;
Ο +月《閱圖2Α，線路板之立體圖案化結構2〇〇包括介 二層210、第一立體圖案220以及第二立體圖案230,其中 弟立體圖帛220以及多個第二立體圖案23〇配置於介電 層21二的同—表面21〇a，而第一立體圖案的材質可選 =第二立體圖案23G的材質相同（例如銅或銘）。第一Ο +月 "Learning Figure 2, the three-dimensional patterned structure 2 of the circuit board includes a second layer 210, a first three-dimensional pattern 220, and a second three-dimensional pattern 230, wherein the stereoscopic image 220 and the plurality of second three-dimensional patterns 23 It is disposed on the same surface 21〇a of the dielectric layer 21, and the material of the first three-dimensional pattern is optional=the material of the second three-dimensional pattern 23G is the same (for example, copper or Ming). the first
=第一立體圖案22〇、23〇的數量可依據線路板2〇〇的 變更而調整。 W # 一 /、而㊂，第一立體圖案220的厚度T1大於每一個 案230的·2。第一立體圖案與第二立體圖 =作為散熱線路，並可依據散_求調整為不同的厚 例來說’第—立體圖案22G例如為高電流量之第— ^線路，而第二立體随23G例如為低電流量的第二散 :線路。相對於散熱需求較低的第二立體圖案23〇而言，= The number of first three-dimensional patterns 22 〇, 23 可 can be adjusted in accordance with the change of the board 2 。. W #一/, and three, the thickness T1 of the first three-dimensional pattern 220 is larger than ·2 of each case 230. The first three-dimensional pattern and the second three-dimensional pattern=as the heat-dissipating line, and the thickness of the first-dimensional pattern 22G is, for example, the first line of the high current amount, and the second three-dimensional pattern is the same as the thick line. For example, a second amount of low current: line. Relative to the second three-dimensional pattern 23〇 having a lower heat dissipation requirement,
第一立體圖案220的厚度，可使第一立體圖案220 ^能力大於第二立體圖案23G的散熱能力，進 線路板200的整體散熱能力。 V 接著，請蒼考圖2B，第-立體圖案22〇與第二立趙 9 200845846 22354twf.doc/e 圖案230亦可㈣於介電層21()，之中，以形成内埋式線 路。在本實施例中，第一立體圖案22〇的厚度Tl大於第 二立體圖案的厚度T2,因此線路板2〇〇,可藉由第一立體圖 案220的厚度增加而相對提高整體散熱能力。 接著，請參考圖2C，其繪示以圖23之立體圖案化結 構來縮小盲孔之縱橫比的示意圖。相對於圖1B所示之盲 孔P1，本發明以雷射燒蝕介電層21〇，以形成盲孔打於第 一立體圖案220上時，由於第一立體圖案22〇的厚度增加 相對減少了盲孔P2的深度，因此可克服盲孔p2縱橫比（孔 深/孔寬的比值）過高的缺陷。此外，第一立體圖案22〇可 作為承接墊，而上方訊號層的環形墊214可藉由完成電鍍 及填孔製程之盲孔P2與第一立體圖案220電性連接，以 傳遞電子訊號。 接下來將介紹本實施例之線路板的立體圖案化製 私。圖3A至圖3H為圖解圖2A之線路板之立體圖案化結 構的立體圖案化製程之流程示意圖。請先參閱圖3A，首 先，在介電層210的表面210a上形成多個第二立體圖案 230與第一立體圖案220’，其中第一立體圖案22〇,與第二 立體圖案230可以是在表面21〇a上以電鍍方式形成，或是 先在表面210a上壓合（iaminating) —片背膠銅膜（resin coated C0pper，RCC)，然後對此背膠銅膜圖案化而形成。 此時，第一立體圖案220,與第二立體圖案230的厚度大致 上相同。 接著’請參閱圖3B與圖3C，形成一圖案化覆蓋層250 200845846 22354twf.doc/e =電層21G的表面2lGaJi’其中圖案化覆蓋層25〇具有 二! H’„ Η會暴露出第-立體随22G，。在本實 二圖案化覆蓋層25G的方法是先形成一覆蓋層 合210上（如圖3B所示），其中覆蓋層240 弟：立體圖案22〇,與第二立體圖案23〇以及介 Z二1，接著’將覆蓋層240 ,案化以形成圖案化覆蓋 層250 (如圖3C所示）。 Γ 具體而言’覆蓋層可以是光阻層或絕緣層（如樹 若覆蓋層240為光阻層時，如圖3B所示，則形 成後盘，24〇的方法可以是壓合乾膜光阻（㈣舰咖加 =在介Ϊ層210上，或是將光阻塗佈於介電層210上。 ,覆蓋層240 (即光阻層）進行曝光（exposure)與 HUeVel°Pment)，以部分移除覆蓋層240 *形成開口 圖3C所不）。如此，完成圖案化覆蓋層25〇。 除，之外’由於覆蓋層也可以是絕緣層，因此形 ^盖f 240的方法也可以是在介電層210上形成一層樹 ^匕®、圖3B所不。接著’利用雷射光將覆蓋層240 (即 22〇Wi兹Γ形成開口 H ’進而暴露出第一立體圖案 诚意的是，由於雷射光也能祕乾膜光阻或是 阻層，因此上叙雷射光驗的方法亦可以運用在 復盍層240是光阻層的情形。 ^者’請參閱圖3D與圖3E，改變第—立體圖案22〇, 二予又，使得第一立體圖案220,的厚度增加而大於每一第 -立體圖案23〇的厚度（如圖犯所示）。在本實施例中， 11 200845846 22354twf.doc/e 增加第一立體圖案220,的厚度之 層瓜於開口 Η的内壁㈤ewa= 2 J成一種子 以及圖案化覆蓋層250的表面25〇 =體圖案220 ^ 此上。種子層222可採用 (electroless plating) , ^ 貝了以與弟—立體圖案22G，相同。接著，以種子層222為 體随22G，進行㈣圖案 ，交成尽度較厚的第一立體圖案22〇，如圖π所示。 f u 在形成第—立體圖案220之後，請參閱圖3F，可以將 =面25Ga上的種子層222去除。舉例來說，可以用微姓刻 (m聊etehing )歧研㈣料去除表面施上的種子 層 222。 # 一接下來，可以移除圖案化覆蓋層250，以暴露出這些 第一=體圖案230，如圖3G所示。由於圖案化覆蓋層25〇 的材質可以是光阻，因此可用去光阻劑來去除圖案化 層 250。 在圖案化覆蓋層250移除之後，可以在第一立體圖案 220與這些第二立體圖案230上分別形成抗氧化層（未繪 示），以保護第一立體圖案220與這些第二立體圖案23〇。 這些抗氧化層可以是鎳金層（Ni/Au layer)或是採用其他 抗氧化的材料來製成。 除了形成抗氧化層之外，請參閱圖3H，也可以在移 除圖案化覆蓋層250之後形成另一介電層270於介電層 210上，以覆蓋第一立體圖案220與這些第二立體圖案 230。第一立體圖案220與第二立體圖案230内埋於第二介 12 200845846 22354twf.doc/e 1層270中，其配置型態如同圖2Β所示，形成内埋式線 f成第二介電層27〇之後，更可以雷射燒蝕第二介 " 以形成—盲孔（如圖2C所示），以顯露第一立體 二有關後續的電麻以及填孔製叫 有t吊知識者所熟知，在此不再贅述。 Γ ο 圖安Π—提的是’圖3A至圖3H所示的線路板的立體 Γ/卞衣各是將第—立體圖案220,的厚度增加，進而使得 ΓίΓ案220的厚度大於每-第二立體圖案== 蝕刻:、以域在ΐ—實施例中’可對第二立體圖案230進行 厂一減^母一個第二立體圖案230的厚度，進而带成 薄的第二立體圖案230。如此一來，利用侧梦程 製程，第-立體圖案22。的厚度同 弟一立體圖案230的厚度。 心 化f ^之ί ’圖4Α及圖4Β更緣示一種嘴印式立體圖案 偷例中:首先’利用-喷印頭 ^體方式’軸至少—第—立體圖案32〇，盘至少 33〇於介電層31〇之同一表面贿’接著 -立體JJ34。，進t —次直接噴印金屬導體方式，改變第 第-立320的厚度，使第一立體圖案320的厚度大於 ^體的厚度，如圖4B所示。所喷‘ 上而^ 錫或銀等導體，直接喷印在介電層310 而2所需的線路圖案，以取代電鑛 私’〜省製程的時間及成本。由上述各實:化^ 13 200845846 以 Mtwt.doc/e 一立體圖案與第二立體圖案可以電鍍、喷印或兩者之組合 而完成，之後更可進行後續燒蝕、電鍍盲孔以及填孔製程， 以提南盲孔電鍵的品質。 綜上所述’本發明之線路板之立體圖案化結構利用厚 度較厚的第一立體圖案做為散熱需求較高的線路，可提高 線路板的整體散熱能力。此外，厚度較厚的第一立體圖案 2為盲孔的承接㈣，更可克服習知盲孔的縱橫比過高的 二陷，進而提高後續電鍍及填孔製程的良率及線路板的可 罪度。 雖然本發明已以較佳實施例揭露如上，麸豆 :定本發明，任何熟習本發明所屬領域之具、有 、’在不脫離本發明之精神和範圍内，當可作些許之更動 =者=本發明之保護範圍當視後附之申請專利範圍 【圖式簡單說明】 圖1Α是習知一種線路板之剖面示意圖。 j 1Β是習知以雷射燒蝕技術形成盲孔於一介電層中 巧不:意圖。 曰 的却f 2八是本發明—實施例之線路板之立體圖案化結構 w 口丨』面示意圖。 什 構的:二發明另-實施例之線路板之立體圖案化結 比的圖是以圖26之立體圖案化結構來縮小盲孔之縱橫 」不思圖。 14 200845846 22354twf.doc/e 案化結 圖3A至圖3H為圖解圖2A之線路板之立體圖 構的立體圖案化製程之流程示意圖。 製裎 圖4A及圖4B繪示本發明一種噴印式立體圖案化 的示意圖。The thickness of the first three-dimensional pattern 220 can make the first three-dimensional pattern 220 ^ capability greater than the heat dissipation capability of the second three-dimensional pattern 23G and the overall heat dissipation capability of the circuit board 200. V Next, please refer to FIG. 2B, the first-dimensional pattern 22〇 and the second Li Zhao 9 200845846 22354twf.doc/e pattern 230 may also be (iv) in the dielectric layer 21(), to form a buried line. In the present embodiment, the thickness T1 of the first three-dimensional pattern 22A is greater than the thickness T2 of the second three-dimensional pattern. Therefore, the circuit board 2〇〇 can relatively increase the overall heat dissipation capability by increasing the thickness of the first three-dimensional pattern 220. Next, please refer to FIG. 2C, which is a schematic diagram showing the aspect ratio of the blind hole reduced by the three-dimensional patterning structure of FIG. Compared with the blind hole P1 shown in FIG. 1B, the present invention ablate the dielectric layer 21A with a laser to form a blind hole on the first three-dimensional pattern 220, because the thickness of the first three-dimensional pattern 22 is relatively decreased. The depth of the blind hole P2 can overcome the defect that the blind hole p2 aspect ratio (the ratio of the hole depth/hole width) is too high. In addition, the first three-dimensional pattern 22 can be used as a receiving pad, and the annular pad 214 of the upper signal layer can be electrically connected to the first three-dimensional pattern 220 by the blind hole P2 of the plating and hole filling process to transmit the electronic signal. Next, the three-dimensional patterning of the wiring board of this embodiment will be described. 3A through 3H are flow diagrams illustrating a three-dimensional patterning process of the three-dimensional patterned structure of the circuit board of Fig. 2A. Referring to FIG. 3A , first, a plurality of second three-dimensional patterns 230 and first three-dimensional patterns 220 ′ are formed on the surface 210 a of the dielectric layer 210 , wherein the first three-dimensional patterns 22 〇 and the second three-dimensional patterns 230 may be The surface 21〇a is formed by electroplating, or is first iaminating-resin coated C0pper (RCC) on the surface 210a, and then patterned by patterning the backing copper film. At this time, the first three-dimensional pattern 220 is substantially the same as the thickness of the second three-dimensional pattern 230. Then, referring to FIG. 3B and FIG. 3C, a patterned cap layer 250 200845846 22354twf.doc/e = surface 2lGaJi of the electric layer 21G is formed, wherein the patterned cap layer 25 〇 has two! H' „ Η will expose the first - Stereo with 22G, the method of patterning the cover layer 25G in the second embodiment is to form a cover layer 210 (as shown in FIG. 3B), wherein the cover layer 240: the three-dimensional pattern 22〇, and the second three-dimensional pattern 23 〇 and Z 2, then 'cover layer 240, to form patterned cap layer 250 (as shown in Figure 3C). Γ In particular, 'the cover layer can be a photoresist layer or an insulating layer (such as tree When the cover layer 240 is a photoresist layer, as shown in FIG. 3B, a rear disk is formed, and the method of 24 〇 may be pressing dry film photoresist ((4) ship-to-charge = on the dielectric layer 210, or the photoresist Applying on the dielectric layer 210. The cover layer 240 (ie, the photoresist layer) performs exposure and HUeVel°Pment) to partially remove the cover layer 240* to form an opening as shown in FIG. 3C. Thus, the pattern is completed. The cover layer is 25 〇. In addition, because the cover layer can also be an insulating layer, the method of forming the cover f 240 can also A layer of tree is formed on the dielectric layer 210, and FIG. 3B does not. Then, using the laser light to cover the layer 240 (ie, 22 〇 Γ Γ forming the opening H ′ to expose the first three-dimensional pattern, sincerity is Since the laser light can also be used as a thin film photoresist or a resist layer, the method of the above-mentioned laser light inspection can also be applied to the case where the retanning layer 240 is a photoresist layer. ^ Please refer to FIG. 3D and FIG. 3E to change The first three-dimensional pattern 22 〇, two, further increases the thickness of the first three-dimensional pattern 220 to be greater than the thickness of each of the first-three-dimensional patterns 23 ( (as shown in the figure). In this embodiment, 11 200845846 22354twf .doc/e increases the thickness of the first three-dimensional pattern 220, the thickness of the layer on the inner wall of the opening ( (5) ewa = 2 J into a kind and the surface of the patterned cover layer 250 25 〇 = body pattern 220 ^. The seed layer 222 can be used (electroless plating), ^Bei is the same as the brother-stereo pattern 22G. Then, with the seed layer 222 as the body and 22G, the (four) pattern is formed, and the first three-dimensional pattern 22〇 is thicker, as shown in Fig. π. As shown in Fig. 3F, after forming the first three-dimensional pattern 220, The seed layer 222 on the surface 25Ga is removed. For example, the surface layer 222 applied to the surface can be removed by micro-meeting (4) material. #一Next, the patterning can be removed. The layer 250 is exposed to expose the first body pattern 230, as shown in Fig. 3G. Since the material of the patterned cap layer 25A may be photoresist, the photoresist layer may be removed by a photoresist. After the patterned cover layer 250 is removed, an oxidation resistant layer (not shown) may be formed on the first three-dimensional pattern 220 and the second three-dimensional patterns 230 to protect the first three-dimensional pattern 220 and the second three-dimensional patterns 23 . Hey. These anti-oxidation layers can be made of a Ni/Au layer or other materials that are resistant to oxidation. In addition to forming an anti-oxidation layer, referring to FIG. 3H, another dielectric layer 270 may be formed on the dielectric layer 210 after removing the patterned cap layer 250 to cover the first three-dimensional pattern 220 and the second three-dimensional patterns. Pattern 230. The first three-dimensional pattern 220 and the second three-dimensional pattern 230 are embedded in the second layer 270 of the second layer 12 200845846 22354 twf.doc/e, and the configuration pattern is as shown in FIG. 2A, forming the buried line f into the second dielectric. After the layer 27〇, the laser can ablate the second layer to form a blind hole (as shown in Fig. 2C) to reveal the first stereo two related to the subsequent electric anesthesia and the hole filling system is called t-hanger. It is well known and will not be described here. ο ο 图安Π— mentions that the three-dimensional Γ/卞 of the circuit board shown in FIG. 3A to FIG. 3H each increase the thickness of the first three-dimensional pattern 220, so that the thickness of the 220ίΓ 220 is greater than each The two-dimensional pattern == etch: in the field - in the embodiment, the thickness of the second three-dimensional pattern 230 can be reduced by the second three-dimensional pattern 230, and then the thin second three-dimensional pattern 230. In this way, the side-dimensional pattern 22 is utilized by the side dream process. The thickness is the thickness of a stereoscopic pattern 230. Figure 4Α and Figure 4Β show a kind of mouth-printing three-dimensional pattern in the case of stealing: firstly, the 'using-printing head ^ body mode' axis at least - the first three-dimensional pattern 32 〇, the disk is at least 33 〇 On the same surface of the dielectric layer 31, the bribe 'continues - three-dimensional JJ34. In the case of direct printing of the metal conductor, the thickness of the first protrusion 320 is changed such that the thickness of the first three-dimensional pattern 320 is greater than the thickness of the body, as shown in FIG. 4B. It is sprayed with the conductors such as tin or silver, which are directly printed on the dielectric layer 310 and 2 to replace the time and cost of the electricity process. It can be completed by the above-mentioned various: ^ 13 200845846 with Mtwt.doc / e a three-dimensional pattern and a second three-dimensional pattern can be electroplated, sprayed or a combination of the two, after which subsequent ablation, plating blind holes and hole filling can be performed. Process, to mention the quality of the blind hole key. In summary, the three-dimensional patterned structure of the circuit board of the present invention utilizes a thicker first three-dimensional pattern as a line having a higher heat dissipation requirement, thereby improving the overall heat dissipation capability of the circuit board. In addition, the thicker first three-dimensional pattern 2 is a blind hole receiving (four), which can overcome the conventional two-infrared ratio of the blind hole, thereby improving the yield of the subsequent plating and filling process and the circuit board. Guilty. Although the present invention has been disclosed in the above preferred embodiments, the present invention is intended to be a part of the invention, and it is intended to be a part of the invention. The scope of the present invention is defined by the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a schematic cross-sectional view of a conventional circuit board. j 1Β is a conventional method of forming a blind hole in a dielectric layer by laser ablation technique. However, the f 2 eight is a schematic view of the three-dimensional patterned structure of the circuit board of the present invention. What is the structure of the three-dimensional patterning of the circuit board of the second embodiment is the three-dimensional patterning structure of Fig. 26 to reduce the vertical and horizontal of the blind hole. 14 200845846 22354twf.doc/e FIG. 3A to FIG. 3H are flow diagrams illustrating a three-dimensional patterning process of the three-dimensional structure of the circuit board of FIG. 2A. 4A and 4B are schematic views showing a three-dimensional patterning of the ink jet printing of the present invention.
【主要元件符號說明】 10 :電子元件 112 :訊號線路 100 :線路板 114a :環形塾 110a、110b ··訊號層 114b :承接墊 110c :上訊號層 120 :接地層 110d :下訊號層 130 :電源層 140a、140b、140c、140d : 介電層 200、200’ ··線路板之立體圖案化結構 210、210,、270 :介電層 210a、210a’ ：表面 214 :環形塾 220、220，·第一立體圖案 222 :種子層 240 :覆蓋層 230 :第二立體圖案 250、250’ ：圖案化覆蓋層 250a :表面 S :内壁 Η ··開口 T1'T2:厚度 PI、Ρ2 :盲孔 310 :介電層 320、320’ ：第一立體圖案 330 :第二立體圖案 340 :喷印頭 15[Main component symbol description] 10: Electronic component 112: Signal line 100: circuit board 114a: ring 塾 110a, 110b · Signal layer 114b: receiving pad 110c: upper signal layer 120: ground layer 110d: lower signal layer 130: power supply Layers 140a, 140b, 140c, 140d: dielectric layers 200, 200'. - Three-dimensional patterned structures 210, 210, 270 of dielectric boards: dielectric layers 210a, 210a': surface 214: annular turns 220, 220, First three-dimensional pattern 222: seed layer 240: cover layer 230: second three-dimensional pattern 250, 250': patterned cover layer 250a: surface S: inner wall Η · opening T1'T2: thickness PI, Ρ 2: blind hole 310: Dielectric layer 320, 320': first three-dimensional pattern 330: second three-dimensional pattern 340: print head 15