TWI320631B - Device and system having self-terminated driver and active terminator for high speed interface - Google Patents

Device and system having self-terminated driver and active terminator for high speed interface

Info

Publication number
TWI320631B
TWI320631B TW091133945A TW91133945A TWI320631B TW I320631 B TWI320631 B TW I320631B TW 091133945 A TW091133945 A TW 091133945A TW 91133945 A TW91133945 A TW 91133945A TW I320631 B TWI320631 B TW I320631B
Authority
TW
Taiwan
Prior art keywords
self
high speed
speed interface
active terminator
terminated driver
Prior art date
Application number
TW091133945A
Other languages
English (en)
Other versions
TW200402191A (en
Inventor
Ki Kwon Chang
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR10-2002-0042771A external-priority patent/KR100469155B1/ko
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200402191A publication Critical patent/TW200402191A/zh
Application granted granted Critical
Publication of TWI320631B publication Critical patent/TWI320631B/zh

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0278—Arrangements for impedance matching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0292—Arrangements specific to the receiver end

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Dc Digital Transmission (AREA)
  • Logic Circuits (AREA)
  • Networks Using Active Elements (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
TW091133945A 2001-11-21 2002-11-21 Device and system having self-terminated driver and active terminator for high speed interface TWI320631B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20010072778 2001-11-21
KR10-2002-0042771A KR100469155B1 (ko) 2001-11-21 2002-07-20 고속동작 인터페이스를 위한 능동종단기 및 자체종단구동기를 포함하는 송수신 장치 및 시스템

Publications (2)

Publication Number Publication Date
TW200402191A TW200402191A (en) 2004-02-01
TWI320631B true TWI320631B (en) 2010-02-11

Family

ID=26639471

Family Applications (1)

Application Number Title Priority Date Filing Date
TW091133945A TWI320631B (en) 2001-11-21 2002-11-21 Device and system having self-terminated driver and active terminator for high speed interface

Country Status (4)

Country Link
US (1) US6937111B2 (zh)
JP (1) JP4206731B2 (zh)
DE (1) DE10253695A1 (zh)
TW (1) TWI320631B (zh)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6690191B2 (en) * 2001-12-21 2004-02-10 Sun Microsystems, Inc. Bi-directional output buffer
CN1826825A (zh) * 2003-09-10 2006-08-30 西门子公司 Gsm装置中作为sim卡接口用的电路配置
KR100539252B1 (ko) * 2004-03-08 2005-12-27 삼성전자주식회사 데이터 버스 및 커맨드/어드레스 버스를 통해 전송되는신호의 충실도를 향상시킬 수 있는 메모리 모듈 및 이를포함하는 메모리 시스템
US7173450B2 (en) * 2004-06-01 2007-02-06 Hewlett-Packard Development Company, L.P. Bus controller
US7205789B1 (en) * 2004-08-26 2007-04-17 Chris Karabatsos Termination arrangement for high speed data rate multi-drop data bit connections
US8335115B2 (en) * 2004-12-30 2012-12-18 Samsung Electronics Co., Ltd. Semiconductor memory module and semiconductor memory system having termination resistor units
US7996590B2 (en) * 2004-12-30 2011-08-09 Samsung Electronics Co., Ltd. Semiconductor memory module and semiconductor memory system having termination resistor units
DE102005055886B4 (de) 2005-11-23 2015-03-26 Austriamicrosystems Ag Halbleiterkörper, Schaltungsanordnung mit dem Halbleiterkörper und Verfahren
US20070126462A1 (en) * 2005-12-05 2007-06-07 Intel Corporation Enabling multiple memory modules for high-speed memory interfaces
WO2007117526A2 (en) * 2006-04-03 2007-10-18 Ati Technologies, Inc. Low power mode unipolar current/voltage mode interface
JP4870610B2 (ja) * 2007-04-18 2012-02-08 シャープ株式会社 並列接続トランジスタ
US7863964B2 (en) * 2007-12-27 2011-01-04 Northrop Grumman Systems Corporation Level shifting switch driver on GaAs pHEMT
KR100943861B1 (ko) * 2008-06-12 2010-02-24 주식회사 하이닉스반도체 임피던스 매칭된 양방향 멀티 드롭 버스 시스템, 그를이용한 메모리 시스템 및 메모리 모듈
KR100991383B1 (ko) 2008-12-26 2010-11-02 주식회사 하이닉스반도체 반도체 장치의 출력 드라이버
TWI407421B (zh) * 2009-02-17 2013-09-01 Au Optronics Corp 用於驅動一液晶顯示面板之驅動裝置
KR101009348B1 (ko) * 2009-07-01 2011-01-19 주식회사 하이닉스반도체 반도체 장치
JP6015144B2 (ja) * 2012-06-04 2016-10-26 富士通株式会社 電子機器及び半導体装置
US9094068B2 (en) * 2013-10-11 2015-07-28 Entropic Communications, Llc Transmit noise and impedance change mitigation in wired communication system
US10425361B2 (en) 2017-03-16 2019-09-24 Trane International Inc. Dynamic allocation of termination resistors in a communication network
US10530325B1 (en) 2018-08-30 2020-01-07 Advanced Micro Devices, Inc. Low loss T-coil configuration with frequency boost for an analog receiver front end
US10692545B2 (en) 2018-09-24 2020-06-23 Advanced Micro Devices, Inc. Low power VTT generation mechanism for receiver termination
US10749552B2 (en) 2018-09-24 2020-08-18 Advanced Micro Devices, Inc. Pseudo differential receiving mechanism for single-ended signaling
US10461965B1 (en) 2018-09-28 2019-10-29 Western Digital Technologies, Inc. Active low-power termination
US10944368B2 (en) 2019-02-28 2021-03-09 Advanced Micro Devices, Inc. Offset correction for pseudo differential signaling
US11152944B2 (en) 2019-09-13 2021-10-19 Advanced Micro Devices, Inc. Termination calibration scheme using a current mirror

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4748426A (en) * 1986-11-07 1988-05-31 Rodime Plc Active termination circuit for computer interface use
US4713827A (en) * 1986-11-10 1987-12-15 Ncr Corporation Terminator for a cmos transceiver device
US5568064A (en) 1995-01-23 1996-10-22 International Business Machines Corporation Bidirectional transmission line driver/receiver
US5822426A (en) * 1995-06-06 1998-10-13 International Business Machines Corporation Balanced hybrid circuit
JPH1020974A (ja) 1996-07-03 1998-01-23 Fujitsu Ltd バス構造及び入出力バッファ
US6222389B1 (en) * 1999-03-25 2001-04-24 International Business Machines Corporation Assisted gunning transceiver logic (AGTL) bus driver
US6477205B1 (en) * 1999-06-03 2002-11-05 Sun Microsystems, Inc. Digital data transmission via multi-valued logic signals generated using multiple drive states each causing a different amount of current to flow through a termination resistor
US6501293B2 (en) * 1999-11-12 2002-12-31 International Business Machines Corporation Method and apparatus for programmable active termination of input/output devices
US6577179B2 (en) * 1999-11-15 2003-06-10 Intel Corporation Dynamic line termination with self-adjusting impedance
JP3423267B2 (ja) 2000-01-27 2003-07-07 寛治 大塚 ドライバ回路、レシーバ回路、および信号伝送バスシステム
US6356106B1 (en) * 2000-09-12 2002-03-12 Micron Technology, Inc. Active termination in a multidrop memory system
US6766155B2 (en) * 2002-01-24 2004-07-20 Agilent Technologies, Inc. Fixed termination scheme for differential receiver that compensates for process, voltage, and temperature variations

Also Published As

Publication number Publication date
JP4206731B2 (ja) 2009-01-14
US6937111B2 (en) 2005-08-30
DE10253695A1 (de) 2003-06-26
JP2003218958A (ja) 2003-07-31
TW200402191A (en) 2004-02-01
US20030124989A1 (en) 2003-07-03

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees