TWI301649B - Bga package and manufacturing method thereof - Google Patents
Bga package and manufacturing method thereof Download PDFInfo
- Publication number
- TWI301649B TWI301649B TW094108391A TW94108391A TWI301649B TW I301649 B TWI301649 B TW I301649B TW 094108391 A TW094108391 A TW 094108391A TW 94108391 A TW94108391 A TW 94108391A TW I301649 B TWI301649 B TW I301649B
- Authority
- TW
- Taiwan
- Prior art keywords
- pad
- insulating layer
- region
- substrate
- bga package
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01077—Iridium [Ir]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20040052224 | 2004-07-06 | ||
KR1020050016929A KR100632596B1 (ko) | 2004-07-06 | 2005-02-28 | Bga 패키지 및 그 제조 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200603302A TW200603302A (en) | 2006-01-16 |
TWI301649B true TWI301649B (en) | 2008-10-01 |
Family
ID=35931386
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094108391A TWI301649B (en) | 2004-07-06 | 2005-03-18 | Bga package and manufacturing method thereof |
Country Status (3)
Country | Link |
---|---|
KR (1) | KR100632596B1 (ko) |
CN (1) | CN1719588A (ko) |
TW (1) | TWI301649B (ko) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101255958B1 (ko) * | 2011-12-28 | 2013-04-23 | 삼성전기주식회사 | 회로기판의 제조방법 |
CN104465575B (zh) * | 2013-09-17 | 2019-04-12 | 日月光半导体制造股份有限公司 | 半导体封装及其制造方法 |
-
2005
- 2005-02-28 KR KR1020050016929A patent/KR100632596B1/ko active IP Right Grant
- 2005-03-18 TW TW094108391A patent/TWI301649B/zh active
- 2005-04-12 CN CNA200510064256XA patent/CN1719588A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
TW200603302A (en) | 2006-01-16 |
CN1719588A (zh) | 2006-01-11 |
KR20060043291A (ko) | 2006-05-15 |
KR100632596B1 (ko) | 2006-10-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI451549B (zh) | 嵌埋半導體元件之封裝結構及其製法 | |
TWI462197B (zh) | 半導體元件、製造該半導體元件之方法、具有該半導體元件之倒裝晶片封裝體及製造該倒裝晶片封裝體之方法 | |
TWI241700B (en) | Packaging assembly with integrated circuits redistribution routing semiconductor die and method for fabrication | |
TWI496254B (zh) | 嵌埋半導體元件之封裝結構及其製法 | |
KR20070042475A (ko) | 반도체 칩 및 반도체 칩의 제조 방법 | |
WO1998056041A1 (en) | Semiconductor device and method for manufacturing the same | |
JPH1116933A (ja) | 金属バンプを有する回路基板の製造方法及びこの回路基板を利用した半導体チップパッケージの製造方法 | |
JP2007096030A (ja) | 半導体装置及びその製造方法 | |
JP2008532292A5 (ko) | ||
TWI496258B (zh) | 封裝基板之製法 | |
TWI413210B (zh) | 電子裝置封裝及製造方法 | |
TWI453844B (zh) | 四方平面無導腳半導體封裝件及其製法 | |
US7615408B2 (en) | Method of manufacturing semiconductor device | |
TWI503935B (zh) | 半導體封裝件及其製法 | |
TW512503B (en) | Integrated circuit package having partially exposed conductive layer | |
KR100843705B1 (ko) | 금속 범프를 갖는 반도체 칩 패키지 및 그 제조방법 | |
TWI301649B (en) | Bga package and manufacturing method thereof | |
KR20120031681A (ko) | 반도체 패키지 및 그 제조 방법 | |
JP4511148B2 (ja) | 半導体装置の製造方法 | |
TWI520278B (zh) | 嵌埋有晶片之封裝結構的製法 | |
JP2007149731A (ja) | 配線基板、半導体装置、及び配線基板の製造方法 | |
TW201336369A (zh) | 線路板製作方法及線路板 | |
TWI816063B (zh) | 半導體裝置及製造方法 | |
TW200845332A (en) | Package substrate and its solder pad | |
JP2006100666A (ja) | 半導体装置及びその製造方法 |