TWI300969B - - Google Patents
Download PDFInfo
- Publication number
- TWI300969B TWI300969B TW091109211A TW91109211A TWI300969B TW I300969 B TWI300969 B TW I300969B TW 091109211 A TW091109211 A TW 091109211A TW 91109211 A TW91109211 A TW 91109211A TW I300969 B TWI300969 B TW I300969B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- pattern
- mask
- opening
- forming
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/50—Mask blanks not covered by G03F1/20 - G03F1/34; Preparation thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
- H10W20/0882—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures wherein the dual damascene structure is in a photoresist layer
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW091109211A TWI300969B (https=) | 2002-05-03 | 2002-05-03 | |
| US10/255,176 US6858377B2 (en) | 2002-05-03 | 2002-09-24 | Dual damascene process using a single photo mask |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW091109211A TWI300969B (https=) | 2002-05-03 | 2002-05-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TWI300969B true TWI300969B (https=) | 2008-09-11 |
Family
ID=29268322
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW091109211A TWI300969B (https=) | 2002-05-03 | 2002-05-03 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6858377B2 (https=) |
| TW (1) | TWI300969B (https=) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10301291B3 (de) * | 2003-01-15 | 2004-08-26 | Infineon Technologies Ag | Verfahren zum Einbringen von eine unterschiedliche Dimensionierung aufweisenden Strukturen in ein Substrat |
| TW200418716A (en) * | 2003-03-21 | 2004-10-01 | Hon Hai Prec Ind Co Ltd | A cavity and the method for fabricating the same |
| KR100552816B1 (ko) * | 2004-07-13 | 2006-02-21 | 동부아남반도체 주식회사 | 포토 마스크 및 그 제조방법과 포토 마스크를 이용한반도체 소자의 배선 형성방법 |
| KR100691964B1 (ko) * | 2004-12-29 | 2007-03-09 | 동부일렉트로닉스 주식회사 | 반도체 소자의 듀얼 다마신 식각 방법 |
| TWI257177B (en) * | 2005-07-27 | 2006-06-21 | Quanta Display Inc | Manufacturing processes for a thin film transistor and a pixel structure |
| KR100698102B1 (ko) * | 2005-10-05 | 2007-03-23 | 동부일렉트로닉스 주식회사 | 반도체 소자의 금속배선 형성방법 |
| US8017517B2 (en) * | 2007-06-07 | 2011-09-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Dual damascene process |
| CN110544671A (zh) * | 2019-08-26 | 2019-12-06 | 上海新微技术研发中心有限公司 | 半导体结构的形成方法 |
| CN110993561A (zh) * | 2019-11-28 | 2020-04-10 | 福建省福联集成电路有限公司 | 一种防止金属连接线断连的方法 |
| WO2022000478A1 (zh) * | 2020-07-03 | 2022-01-06 | 欧菲光集团股份有限公司 | 线路板制作方法及线路板 |
| US12230535B2 (en) * | 2022-03-23 | 2025-02-18 | Nanya Technology Corporation | Method for fabricating semiconductor device with damascene structure |
| US12142518B2 (en) * | 2022-03-23 | 2024-11-12 | Nanya Technology Corporation | Method for fabricating semiconductor device with damascene structure by using etch stop layer |
| US12159790B2 (en) * | 2022-03-23 | 2024-12-03 | Nanya Technology Corporation | Method for fabricating semiconductor device with damascene structure by using etch stop layer |
| US12283518B2 (en) * | 2022-05-25 | 2025-04-22 | Nanya Technology Corporation | Method for fabricating semiconductor device with contact structure |
| US12417982B2 (en) | 2022-05-25 | 2025-09-16 | Nanya Technology Corporation | Semiconductor device with contact structure |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5976968A (en) * | 1997-10-14 | 1999-11-02 | Industrial Technology Research Institute | Single-mask dual damascene processes by using phase-shifting mask |
| US20030027419A1 (en) * | 2001-08-02 | 2003-02-06 | International Business Machines Corporation | Tri-tone photomask to form dual damascene structures |
-
2002
- 2002-05-03 TW TW091109211A patent/TWI300969B/zh not_active IP Right Cessation
- 2002-09-24 US US10/255,176 patent/US6858377B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US20030207180A1 (en) | 2003-11-06 |
| US6858377B2 (en) | 2005-02-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI300969B (https=) | ||
| KR100354440B1 (ko) | 반도체 장치의 패턴 형성 방법 | |
| US9831117B2 (en) | Self-aligned double spacer patterning process | |
| TWI302643B (en) | Overlay and alignment marks for reusing photomasks in a monolithic vertical structure and methods thereof | |
| JPH10209161A (ja) | 簡略型ホール相互接続方法 | |
| TWI288951B (en) | Method utilizing compensation features in semiconductor processing | |
| TW444271B (en) | Method for manufacturing semiconductor device | |
| JP3912949B2 (ja) | フォトマスクの形成方法及び半導体装置の製造方法 | |
| CN101471282B (zh) | 一种形成半导体器件金属线的方法 | |
| TW202041389A (zh) | 熱印頭結構之製造方法 | |
| JP2010118529A (ja) | 半導体素子の製造方法 | |
| TWI358789B (en) | Method for dual damascene process | |
| TWI309089B (en) | Fabrication method of active device array substrate | |
| TWI288459B (en) | A dual-damascene process for manufacturing semiconductor device | |
| JP2000058647A (ja) | 半導体装置の製造方法 | |
| KR100384876B1 (ko) | 반도체소자에서의 개선된 듀얼 대머신 공정 | |
| CN112768351B (zh) | 一种图形形成方法 | |
| WO2007054506A1 (en) | Method for printing contacts on a substrate | |
| KR20060076498A (ko) | 반도체 소자의 소자 분리막 형성 방법 | |
| TWI283547B (en) | Method for patterning films, methods for fabricating active organic electroluminescence display and for fabricating thin film transistor array substrate | |
| KR20070000204A (ko) | 미세 패턴 형성 방법 | |
| KR20060136174A (ko) | 미세 패턴 형성 방법 | |
| TW535214B (en) | Method of removing hard mask | |
| TWI323295B (en) | Method for etching metal | |
| KR20030066999A (ko) | 반도체 소자의 금속배선 형성방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK4A | Expiration of patent term of an invention patent |