TWI290816B - Wiring board and method for producing the same - Google Patents

Wiring board and method for producing the same Download PDF

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Publication number
TWI290816B
TWI290816B TW94112998A TW94112998A TWI290816B TW I290816 B TWI290816 B TW I290816B TW 94112998 A TW94112998 A TW 94112998A TW 94112998 A TW94112998 A TW 94112998A TW I290816 B TWI290816 B TW I290816B
Authority
TW
Taiwan
Prior art keywords
substrate
roughening treatment
roughening
wiring board
roughened
Prior art date
Application number
TW94112998A
Other languages
Chinese (zh)
Other versions
TW200603705A (en
Inventor
Yasuo Fukuhara
Kenji Ogasawara
Tomoaki Watanabe
Keiko Kashihara
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Publication of TW200603705A publication Critical patent/TW200603705A/en
Application granted granted Critical
Publication of TWI290816B publication Critical patent/TWI290816B/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0264Peeling insulating layer, e.g. foil, or separating mask
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1152Replicating the surface structure of a sacrificial layer, e.g. for roughening
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A wiring board exhibiting high adhesion between a substrate and a conductive layer, and its production method. A transfer sheet having a protruding/recessed surface of specified surface roughness is formed integrally with the substrate such that the protruding/recessed surface is transferred to the surface of the substrate, and then the transfer sheet is removed from the substrate, thus performing first surface roughening. The substrate surface roughened by the first surface roughing is then chemically roughened using etching liquid, thus performing second surface roughening. Subsequently, a conductive layer is formed on the substrate surface subjected to first and second surface roughening preferably by an additive method.

Description

1290816 九、發明說明: 【發明所屬之技術領域】 本發明係關於配線基板及其製造方法,尤其是,與在 形成導電層前實施之基板之粗面化處理相關。 【先前技術】 近年來,隨著電子/電性機器之小型化及輕量化,組 合於内部之印刷電路板亦呈現薄型化傾向,且針對其製造 方法亦進行各種改良。[Technical Field] The present invention relates to a wiring board and a method of manufacturing the same, and more particularly to a roughening treatment of a substrate which is performed before forming a conductive layer. [Prior Art] In recent years, with the miniaturization and weight reduction of electronic/electrical devices, printed circuit boards combined with them have become thinner, and various improvements have been made to the manufacturing methods thereof.

例如,日本公開特許公報5—136575號公報即為了追求 多層印刷板之薄型化而提出可減少構件安裝時之反翹及扭 曲之多層印刷板製造方法。該方法如第八圖(a)、(b)所示, 在具有特定内層電路4之内層基材5之表面配置具保護膜26 之樹脂膜25而形成疊層體後,利用真空層合機實施疊層體 之一體成形。此時,樹脂膜25具有絕緣層之機能。其:, 如第八圖(c)所示,剝除保護膜26,利用堆疊法在霖: 脂膜25上形成外層電路70。因此,得到第八圖(d)所示之^ 層印刷板。此外,圖中之符號7卜72係用以實施内層電路4 及外層電路7G間之電性連結之通孔電鍵及盲通孔。 以此方式製造之多層印刷板時,因 :形成較薄之絕緣層,此外,因為採用堆疊法,』可开; =圖案。然而,外層電路W之密合性仍有改善之空間 ^外,使用樹脂膜25尚有導致多層印刷板之剛性降低之 5 1290816 【發明内容】 本毛月之主要目的係提供配線基板之製造方法,以達 成導電層具有高密合強度,可彈性對應絕緣信賴性之提 及剛性之改善。 亦即’本發明之製造方法之特徵係含有:對以電性絕 緣性織組成物為主要成分之基板之表面實施物理粗面化 之第1粗面化處理;對利用幻粗面化處理實施粗面化基板 之表面以飯刻液實施化學粗面化之第2粗面化處理;以及在 利用第2粗面化處理實施粗面化之基板表面形成導電層之 步驟。 此外,本發明之其他目的係在提供利用上述製造方法 獲得之配線基板,該配線基板之特徵,係具有以使構成導 電層之材料嵌入利用第1粗面化處理及第2粗面化處理實施 粗面化之表面之凹凸而形成導電層及基板間之界面構造。 依據本發明,除了可顯著增加導電層及基板間之接觸 面積以外,尚利用導電層材料對基板表面之凹凸之錨定效 果而使導電層強力固定於基板上,故可實現導電層之高漆 合性。 上述發明時,第1粗面化處理應含有:實施具有特定表 面粗細度之凹凸面之薄片與基板之一體成形而使凹凸面複 製至基板表面之步驟、及從基板除去薄片而得到物理粗面 化之基板表面之步驟。尤其是,最好採用以下之步驟,亦 即,薄片由如銅之金屬所構成,利用蝕刻除去該薄片而得 到物理粗面化之基板表面之步驟,或者,使用表面塗布著 1290816 含有無機填料之脫膜劑之薄片 到物理粗面化之基板表面之步驟。〜⑼從基板剝離而得 採用上述第1粗面化處理時,與 實施粗面化處理時相比,因為處理效=或:砂之手法 可獲得良好之高密合性。 之均一性較高,故 上述發明時,基板含有分散於雷 中而被她液優先溶解之材料之】:'、、巴緣性樹脂娜 之與姑卜粒子,故第2粗面化處理 處理^粗面化之基板之表面附近之前述粒子。 此:夺’改變分散之粒子之含有量、形狀、以及尺寸, =空㈣i用师面化處理而導入至基板表面之凹凸之 :方=二及大小,尤其是,以組合上述第1粗面化處理 之方式貝㈣,即使製造較薄之印刷電路板,從導電層之 密合性之改善及電性崎性之確保之兩觀點而言,可^ 實施最佳粗面化處理。 上述第1及第2粗面化處理之實施上,基板之表面粗細 度Rz(lG點平均粗細度)應為3〜15_,*且,Ra(算術平均 粗細度)應為0.1〜1.0# m。如利用將電性絕緣性樹脂組成 物浸潰於纖維狀基材來製作之半固化片之基板厚度較薄 Ά若超過15/zm、或Ra超過,可能降低配線基板 之深度方向之絕緣信賴性。此外,Rz小於m、或Ra小於 0. 1 //m時,會呈現導電層之密合強度之改善效果較小之傾 向。 、 導電層之形成應利用堆疊法實施。除了形成之上述界 1290816 面構,具有良好信雛以外,也較容㈣成精細圖案。 、土开/ΐ明之其他目的及效果’由以下用以實施本發明之 取么形怨可得到確實理解。 【實施方式】 以下,參_面,_較佳實關針對本發明之配線 基板及其製造方法進行詳細說明。 、本毛明所使用之基板之主要成分係電性絕緣性樹脂組 ^物。該樹脂組成物並無特別限制,例如,可以使用含碟 =樹脂、溴化環氧樹脂、以及曱(苯)紛_清漆型環氧 树月曰專環氧树|曰。此外,樹脂組成物可以含有雙氰胺等之 硬化劑、及2-乙基—4一甲基口米唾等之硬化促進劑,此外,必 要時,亦可添加二氧化料之充填劑及二甲基甲醯胺⑽) 等之有機溶劑。 此外,如利用將電性絕緣性樹脂組成物浸潰於纖維狀 基材,製作之半固化片之基板時,可因為纖維狀基材而得 到較尚之印刷電路板剛性。此外,應使用厚度〇· 以下之 纖維狀基材,不但可確保適度之剛性,尚可提高印刷電路 板之小型薄型化。具體而§,可使用日東紡社製之 WEA1116」(厚度0· 08_之玻璃布)或「weai〇78」(厚产 〇· 〇4mm之玻璃布)等。此外,纖維狀基材之厚度可配合基板 之厚度尺寸進行適度設定’其厚度之下限,例如,可設定 成〇· 〇19mm(19 // m)。將樹脂組成物浸潰於纖維狀基材後, 以乾燥機實施所得到之浸潰體之加熱乾燥,可得到半硬化 8 1290816 之B階段狀態之半固化片。 此外,為了有效實施後述之第2粗面化處理,應使第2 粗面化處理所使用之蝕刻溶液可優先溶解之材料之粒子分 散於樹脂組成物中。第一圖(a)係第丨粗面化處理前之基板刀 1 ,平坦表面狀態,基板!内均—分散著前述粒子2卜此外,‘ 第二圖之SEM相片顯示第丨粗面化處理前之基板表面十分平 坦。(第二圖至第四圖纽以線條表示,容以相片表示) ,次’對基板1之表面實施物理粗面化之第陳面化處 理。第1粗面化處理方面,以處理效率及處理效果之均一性 而口應3有.貫施具有特定表面粗細度之凹凸面之複製 薄片8與基板之-體成形而使凹凸面複製至基板丨表面之^ 驟(第一圖⑻)、及從基板1除去複製薄片8而得到物理粗^ 化之基板表面之步驟(第一圖⑹)。具體而言,可以採用以 下之方法’亦即’在基板1及複製薄片8之-體成形後,以 敍刻複製薄片來實施溶解除去之方法或、以複製 施剝離除去之方法。 Λ 以溶解除去複製薄片8來實施基板之粗面化時,複製薄 片8可使用例如電解銅箱等之脫模金屬箱。此時,接合^電 解銅箱之基板1之表面,應具有㈠^之㈣聰平均粗 、.’田度)及0. 3〜〇. 7m2Ra(算術平均粗細度),並將該複妒 薄片之表面粗細度複製至基祀。複製薄片之溶解則使用既 有之銅蝕刻溶液。 此外,剝離複製薄片8實施基板!之粗面化時,例如, 可以利用將含有無機填料之脫膜劑塗布於薄片材來製作複 9 1290816 •製薄片。利用脫膜劑實施疊層成形後,很容易制離複㈣ • I ^體而+言,如第五圖所示,首先,以黏結劑14將_ 狀之聚對苯二曱酸乙二醇酯(PET)13黏結於鋁箔π而製成 _ ^材12 ’其次,在聚丙烯(PP)等之脫膜劑u調合5〜15 質量%之粉碎之二氧化石夕等無機填料10,將該調合物塗布於 薄片材12之料15表面,製成複製薄片8。無機填料10之平 均粒徑並無特別限制,然而,以1〜1〇//m為佳。此外,塗 布著含有無機填料10之脫膜劑Π之表面應具有4〜 • Rz(10點平均粗細度)、及〇· 3〜0· 7m之Ra(算術平均粗細 度),將該面之凹凸複製至基板表面。 第一圖(b)係將複製薄片8—體成形於基板丨之表面之 狀態,第一圖(c)係剝離該複製薄片而將複製薄片表面之凹 凸複製至基板表面之狀態。此外,第三圖係剝除複製薄片 後之基板表面之SEM相片,基板表面形成均一之數微米之凹 凸。利用上述複製薄片8之第1粗面化處理,與研磨加工或 鲁 噴砂等粗面化時相比,具有較優之密合性改善效果及信賴 性。亦即’利用研磨加工實施基板表面之粗面化時,因為 表面附近之基板材料會粉碎,即使在其上形成導電層,導 • 電層在粉碎基板材料會發生剝離,而難以獲得期待之密合 、 性。此外,利用喷砂等機械方式實施基板表面之粗面化時, 吹附之粒子會殘留於基板表面,對後面形成之導電層之密 合性可能會造成不良影響。此外,利用研磨加工或噴砂之 粗面化處理,其處理效果很容易出現誤差。 相對於此,利用複製薄片之上述第1粗面化處理時,應 1290816 形成於基板之凹凸之大小及形狀很容緒制,此外,即使 基板之處理面積較大時,尚具有可實現基板整體十分均-之,理效果之優點。基於上述理由,本發明之第1粗面化處 理最好能採用從基板1除去複製薄片8之方式。 其-人,對利用第1粗面化處理實施粗面化之基板表面, 貫施利用蝕刻液之化學粗面化之第2粗面化處理。第2粗面 化處理最好採用以下之方法,亦即,利用钱刻溶液優先溶 解分布於利用第1粗面化處理實施粗面化之内部分散著前 述粒子20之基板之表面附近之粒子2〇。 姓刻溶液優先溶解之粒子2〇可使用例如丁二烯-丙烯 晴共聚物等之架橋彈性體、或聚乙烯醇縮乙醛等。粒子之 含有量可進行適度設定,然而,例如,以相對於樹脂組成 物整體之粒子成分之含有量為1〜2〇質量%較佳。此外,利 用第2粗面化處理溶解之粒子2〇之平均粒徑方面,以有效在 經過第1粗面化處理之表面形成微細凹凸之觀點而言,以 0· 1〜2//m之範圍為佳。 用以溶解粒子20之I虫刻溶液可使用至少含有酸及氧化劑之 其中一方者,例如,組合使用CYPRES公司製「CIRCUPOSIT MLB211」、MELTEX公司製「EMPRATE MLB497」、以及MELTEX 公司製「EMPRATE MLB-791M」之3種當做蝕刻溶液。此處, 「CIRCUPOSIT MLB211」之主要成分為乙二醇水溶液,具 有膨潤樹脂之機能。「EMPRATE MLB497」之主要成分為 過I孟酸鉀水溶液(氧化劑)及氫氧化鉀水溶液,具有用以溶 解樹脂(尤其是溶解成分)之機能。過錳酸鉀等過錳酸鹽在 11 1290816 鹼性下具有強氧化劑之作用。具有溶解樹脂之機能之溶 液,亦可以使用主要成分為過猛酸鈉水溶液(氧化劑)及氫 氧化鈉水溶液之物。「EMPRATE MLB-791M」之主要成分 為硫酸水溶液(酸)及過氧化氫水溶液,具有中和鹼性下狀 態之機能。 實施第2粗面化處理時,存在於利用第1粗面化處理而 複製至基板1之凹凸表面附近之粒子20,會優先被餘刻溶液 溶解,如第一圖(d)所示,基板之凹凸表面會進一步形成微 細凹凸。第四圖係對第三圖之經過第1粗面化處理之表面實 施第2粗面化處理後之基板表面之SEM相片,比較第三圖及 第四圖可知’利用弟1粗面化處理形成之各凹凸,會因為第 2粗面化處理而形成多數之微細凹凸。如此,在第1粗面化 處理後實施第2粗面化處理,可以顯著增加基板之表面積。 此外,若只對具有平坦表面之基板實施第2粗面化處理時, 基板表面只會形成1〜5//m之Rz(10點平均粗細度)及〇· 〇3 〜0.4m之Ra(算術平均粗細度)之相對較小之凹凸,最好如 上所述,組合實施以形成4〜12//111之1^(1()點平均粗細度) 及0· 3〜0. 7m之Ra(异術平均粗細度)之相對較大(粗)之凹 凸為目的之第1粗面化處理,可使第2粗面化處理後之表面 粗細度成為3〜15//m之Rz(l〇點平均粗細度)及〇·丨〜丨· 〇 v m之Ra(算術平均粗細度)。 其次,在利用第2粗面化處理實施粗面化之基板丨表面 形成導電層7。導電層7之形成上,如第一圖(e)所示,構成 導電層之材料會嵌入利用第丨粗面化處理及第2粗面化處理 12 1290816 實施粗面化之表面之凹凸(產生錨定效果)。以此方式得到 之導電層7及基板1間之界面構造,除了可顯著增加導電層 及基板間之接觸面積以外,尚可利用導電層材料對基板^ 面之凹凸之錨定效果而使導電層強力固定於基板上。導電 、 層之形成方法只要為可形成上述界面構造之方法,並無特 - 別限制,然而,如後面所述,最好採用堆疊法。此外,堆 疊法分成全堆疊法及半堆疊法,本發明可使用其中任一種 _ 方法。 、 如此,依據本發明,利用物理粗面化處理及化學粗面 化處理之組合,尤其是,利用將複製薄片之凹凸複製至基 材而實施基板表面之物理粗面化之第丨粗面化處理、及優先 蝕刻除去分散於基板内部之粒子而實施基板表面之化學粗 面化之第2粗面化處理之組合,可提高導電層及基板間之密 合性而獲得較佳信賴性。 其次,針對本發明之多層印刷電路板之製造方法之且 體實例進行說明。 μ 如第六圖(a)所示,在兩面預絲成特定内層電路4之 内層基板5,配置·將電性絕緣性樹驗成物娘潰於纖 維狀基材3而製成之半固化片3〇,在該半固化片別上配置複 製薄^後’如第六圖(b)所示,利用多段真空冲壓等成形 方法實施使其成為-體之疊層成形。内層基板5之製作上, 係利用例如使必要數#之半固化片3()疊合並實施叠層成 形’内層電路4係利用堆疊法或除去法來形成。此外,亦可 在市面販賣之銅落疊層板等疊層板形成電路。此外,亦可 13 1290816 外在:之—面配置半固化片30並進行疊層成形。此 黑色氧,處==等= 半固化片3。形1二::稭由除去複製薄片8,利用 半固化片表面。如此:因複㈣片之凹凸複製至 粗面化處理,㈣_^、、_贿實施絕緣層之 之钮而彳t 率。此外,利用複製薄片8 之凹凸來二力丰Γ^、’在利用形成於半固化片3G(絕緣層6) 半==Γ片30之表面積,形成之凹凸深度係由 板之薄型化而使用|C 列如,為了實現配線基 ο 吏之半固化片時,若利用粗面化處理 /成之凹Μ度過深’可能降低厚度方向之絕緣信賴性。 之粗面化處理時,若處__,會 使+固化片之厚度變薄而有絕緣信賴性之問題,然而,利 用上述複㈣4法,只要制具有特絲面粗細度之凹凸 面之複製薄片,即可提供良好之具有相同表面粗細度之半 固化片之再現性,品質營理鉍盔六曰 貝5理#乂為谷易,而且,可減少前處 理步驟中所發生之不良,故可降低不良率。 其次,使祕刻溶液實施第2粗面化處理。第2粗面化 處理可以將第六圖(C )所示之疊層板浸潰於⑽溶液浸潰 之方式來實施’此外,亦可變更#刻溶液之種類並執行複 數次。例如’可將㈣溶液之溫度設定成4G〜⑽。C,將浸 潰時間設疋成1〜30分鐘。此外,組合使用前述「CiRCUp〇SIT MLB211」、「EMPRATE MLB497」、以及「E_ATE MLB—791M」 1290816 之3種當舰雜液❹時,實施如下解之帛2粗面化處 ,,亦即,首先,將疊層板浸潰於「circup〇sit MLB21l」 貫加树脂之膨潤’其次,將疊層板浸潰於「EMpRATE MLB497」實施樹脂之轉,最後,將疊層板浸潰於In order to reduce the thickness of a multilayer printed board, a method of manufacturing a multilayer printed board capable of reducing back warpage and twisting during mounting of a member has been proposed in the Japanese Patent Laid-Open Publication No. Hei 5-136575. In the method, as shown in the eighth (a) and (b), after the resin film 25 having the protective film 26 is placed on the surface of the inner layer substrate 5 having the specific inner layer circuit 4 to form a laminate, the vacuum laminator is used. One piece of the laminate is formed. At this time, the resin film 25 has the function of an insulating layer. It is as follows: As shown in the eighth diagram (c), the protective film 26 is peeled off, and the outer layer circuit 70 is formed on the Lin: lipid film 25 by a stacking method. Therefore, the layer printed board shown in the eighth figure (d) is obtained. In addition, the symbol 7b 72 in the figure is a through-hole key and a blind via for electrically connecting the inner layer circuit 4 and the outer layer circuit 7G. When the multilayer printed board is manufactured in this manner, a thinner insulating layer is formed, and further, since the stacking method is employed, the pattern can be opened. However, there is still room for improvement in the adhesion of the outer layer circuit W. The resin film 25 is used to reduce the rigidity of the multilayer printed board. 5 1290816 [Invention] The main purpose of the present invention is to provide a method for manufacturing a wiring substrate. In order to achieve a high adhesion strength of the conductive layer, the elasticity can be improved corresponding to the improvement of the reliability of the insulation. In other words, the method of the present invention includes a first roughening treatment for physically roughening the surface of a substrate having an electrically insulating woven composition as a main component, and performing a roughening treatment using a magical roughening treatment. The surface of the roughened substrate is subjected to a second roughening treatment of chemical roughening with a meal liquid; and a step of forming a conductive layer on the surface of the substrate roughened by the second roughening treatment. Further, another object of the present invention is to provide a wiring board obtained by the above-described manufacturing method, the wiring board having a feature of embedding a material constituting the conductive layer by the first roughening treatment and the second roughening treatment The unevenness of the roughened surface forms an interface structure between the conductive layer and the substrate. According to the present invention, in addition to significantly increasing the contact area between the conductive layer and the substrate, the anchoring effect of the conductive layer material on the surface of the substrate is utilized to strongly fix the conductive layer on the substrate, so that the conductive layer can be highly painted. Synergy. In the above invention, the first roughening treatment includes a step of forming a sheet having a concave-convex surface having a specific surface roughness and a substrate, and a step of replicating the uneven surface onto the surface of the substrate, and removing the sheet from the substrate to obtain a physical rough surface. The step of the substrate surface. In particular, it is preferable to use a step in which the sheet is made of a metal such as copper, the step of removing the sheet by etching to obtain a surface of the substantially roughened substrate, or the surface coating of 1290816 containing an inorganic filler. The step of removing the sheet of the release agent onto the surface of the physically roughened substrate. - (9) Peeling from the substrate When the first roughening treatment is employed, a high adhesion can be obtained by the treatment effect = or sand method as compared with the case of performing the roughening treatment. The uniformity is high. Therefore, in the above invention, the substrate contains a material which is dispersed in the thunder and is preferentially dissolved by the liquid.], ', and the resin of the rim resin and the granules, so the second roughening treatment The aforementioned particles in the vicinity of the surface of the roughened substrate. This: wins the content, shape, and size of the particles that are dispersed, = null (4) i is introduced into the surface of the substrate by the surface treatment: square = two and size, in particular, to combine the above first rough surface In the case of manufacturing a thin printed circuit board, the optimum roughening treatment can be performed from the viewpoints of improvement in adhesion of the conductive layer and securing of electrical properties. In the implementation of the first and second roughening treatments, the surface roughness Rz (1G point average thickness) of the substrate should be 3 to 15 mm, and the Ra (arithmetic mean thickness) should be 0.1 to 1.0 # m. . When the thickness of the substrate of the prepreg which is obtained by impregnating the fibrous base material with the electrically insulating resin composition is thin, if it exceeds 15/zm or Ra exceeds, the insulation reliability in the depth direction of the wiring board may be lowered. Further, when Rz is less than m or Ra is less than 0.1 / m, the effect of improving the adhesion strength of the conductive layer is small. The formation of the conductive layer should be carried out by a stacking method. In addition to the formation of the above-mentioned boundary 1290816 surface structure, in addition to good believers, but also more (four) into a fine pattern. The other purposes and effects of the soil opening/detailing can be clearly understood from the following exemplifications for carrying out the invention. [Embodiment] Hereinafter, a wiring board and a method of manufacturing the same according to the present invention will be described in detail with reference to FIG. The main component of the substrate used in the present invention is an electrically insulating resin composition. The resin composition is not particularly limited. For example, a dish containing a resin, a brominated epoxy resin, and a bismuth-type epoxidized epoxy tree can be used. Further, the resin composition may contain a curing agent such as dicyandiamide or a hardening accelerator such as 2-ethyl-4-methylammonium saliva, and if necessary, a filler of a dioxide filler and two may be added. An organic solvent such as methylformamide (10)). Further, when the substrate of the prepreg is produced by impregnating the fibrous base material with the electrically insulating resin composition, the rigidity of the printed circuit board can be obtained by the fibrous substrate. In addition, a fibrous base material having a thickness of 〇 or less should be used, which not only ensures moderate rigidity, but also improves the size and thickness of the printed circuit board. Specifically, §, WEA1116" (glass cloth with a thickness of 0. 08_) or "weai〇78" (a glass cloth with a thickness of 〇· 〇 4 mm) manufactured by Nitto Denko can be used. Further, the thickness of the fibrous base material can be appropriately set to the lower limit of the thickness of the substrate, and the lower limit of the thickness can be set, for example, to 19 mm (19 // m). After the resin composition is impregnated into the fibrous substrate, the obtained impregnated body is dried by heating in a dryer to obtain a prepreg in a B-stage state of semi-hardened 8 1290816. Further, in order to effectively carry out the second roughening treatment to be described later, the particles of the material which can be preferentially dissolved in the etching solution used in the second roughening treatment are dispersed in the resin composition. The first figure (a) is the substrate knife before the roughening process, the flat surface state, the substrate! Internally - the particles 2 are dispersed. Further, the SEM photograph of the second figure shows that the surface of the substrate before the third surface roughening treatment is very flat. (The second to fourth figures are indicated by lines, which are represented by photographs), and the second surface is subjected to physical roughening of the surface of the substrate 1. In the first roughening treatment, the uniformity of the treatment efficiency and the treatment effect is applied to the substrate. The replica sheet 8 having the uneven surface having a specific surface thickness and the substrate are formed to form the concave and convex surface to the substrate. The surface of the crucible (first figure (8)) and the step of removing the replica sheet 8 from the substrate 1 to obtain a physically roughened substrate surface (first figure (6)). Specifically, a method in which the substrate 1 and the replica sheet 8 are formed after the formation of the substrate 1 and the replica sheet 8 may be carried out by a method of dissolving and removing the sheet, or a method of removing and removing it by copying.时 When the surface of the substrate is roughened by dissolving and removing the replica sheet 8, the release sheet 8 may be a metal mold such as an electrolytic copper box. At this time, the surface of the substrate 1 to which the electrolytic copper case is bonded shall have (1) ^ (4) Cong average coarse, . 'Field degree' and 0. 3~〇. 7m2Ra (arithmetic mean thickness), and the retanning sheet The surface thickness is copied to the base. The dissolution of the replicated flakes uses an existing copper etching solution. In addition, the release sheet 8 is peeled off to implement the substrate! In the case of roughening, for example, a release agent containing an inorganic filler may be applied to a sheet to prepare a sheet. After the lamination is carried out by using a release agent, it is easy to make a complex (4) • I ^ body and +, as shown in the fifth figure, first, the _-like polyethylene terephthalate is formed with the binder 14 The ester (PET) 13 is bonded to the aluminum foil π and is made into a material of the aluminum foil π. Next, the inorganic filler 10 such as pulverized cerium oxide is mixed with a release agent u such as polypropylene (PP). This blend is applied to the surface of the material 15 of the sheet material 12 to form a replica sheet 8. The average particle diameter of the inorganic filler 10 is not particularly limited, however, it is preferably 1 to 1 Å/m. Further, the surface of the release agent coated with the inorganic filler 10 should have a Ra to (10 point average thickness) and a Ra (arithmetic mean thickness) of 〇·3 to 0·7 m, and the surface The relief is copied to the surface of the substrate. The first figure (b) is a state in which the replica sheet 8 is formed on the surface of the substrate, and the first sheet (c) is a state in which the replica sheet is peeled off and the concave surface on the surface of the replica sheet is copied to the surface of the substrate. Further, the third figure is an SEM photograph of the surface of the substrate after the sheet is peeled off, and the surface of the substrate is formed into a uniform number of micrometers. The first roughening treatment by the above-mentioned replica sheet 8 has an excellent adhesion improving effect and reliability as compared with the case of roughening such as polishing or blasting. That is, when the surface of the substrate is roughened by polishing, the substrate material in the vicinity of the surface is pulverized, and even if a conductive layer is formed thereon, the conductive layer peels off the material of the substrate, and it is difficult to obtain the desired density. Combination, sex. Further, when the surface of the substrate is roughened by mechanical means such as sand blasting, the particles to be blown remain on the surface of the substrate, and the adhesion of the conductive layer formed later may be adversely affected. In addition, the use of grinding or blasting roughening treatment is prone to errors. On the other hand, when the first roughening treatment of the replica sheet is used, the size and shape of the unevenness formed on the substrate by 1290816 are sufficient, and even if the processing area of the substrate is large, the entire substrate can be realized. Very uniform - the advantages of the rational effect. For the above reasons, the first roughening treatment of the present invention is preferably carried out by removing the replica sheet 8 from the substrate 1. In the case of the surface of the substrate roughened by the first roughening treatment, the second roughening treatment using the chemical roughening of the etching liquid is applied. In the second roughening treatment, it is preferable to use a method in which the money engraving solution is preferentially dissolved and distributed in the vicinity of the surface of the substrate on which the particles 20 are dispersed by the first roughening treatment. Hey. For example, a bridging elastomer such as a butadiene-acrylonitrile copolymer or polyvinyl acetal may be used as the particles in which the solution is preferentially dissolved. The content of the particles can be appropriately set. However, for example, the content of the particle component with respect to the entire resin composition is preferably 1 to 2% by mass. In addition, in terms of the average particle diameter of the particles 2溶解 dissolved in the second roughening treatment, it is effective at 0 to 1 to 2//m from the viewpoint of forming fine unevenness on the surface subjected to the first roughening treatment. The range is good. For the solution of the insect-like solution for dissolving the particles 20, at least one of an acid and an oxidizing agent may be used. For example, "CIRCUPOSIT MLB211" manufactured by CYPRES, "EMPRATE MLB497" manufactured by MELTEX, and "EMPRATE MLB-" manufactured by MELTEX Co., Ltd. may be used in combination. Three kinds of 791M" are used as etching solutions. Here, the main component of "CIRCUPOSIT MLB211" is an aqueous solution of ethylene glycol, which has the function of swelling resin. The main component of "EMPRATE MLB497" is an aqueous solution of potassium methacrylate (oxidizing agent) and an aqueous solution of potassium hydroxide, which has a function of dissolving a resin (especially a dissolved component). Permanganate such as potassium permanganate has a strong oxidizing agent at 11 1290816 alkaline. As the solution having a function of dissolving the resin, it is also possible to use a substance having a main component of an aqueous solution of sodium permanate (oxidizing agent) and an aqueous solution of sodium hydroxide. The main component of "EMPRATE MLB-791M" is an aqueous solution of sulfuric acid (acid) and an aqueous solution of hydrogen peroxide, which has the function of neutralizing the alkaline state. When the second roughening treatment is performed, the particles 20 which are copied to the vicinity of the uneven surface of the substrate 1 by the first roughening treatment are preferentially dissolved by the residual solution, as shown in the first diagram (d), the substrate The uneven surface is further formed with fine irregularities. The fourth figure is an SEM photograph of the surface of the substrate after the second roughening treatment on the surface of the first roughening treatment of the third figure, and comparing the third and fourth figures, it is known that the treatment is performed by using the younger one. Each of the unevenness formed is formed by a plurality of fine irregularities due to the second roughening treatment. As described above, by performing the second roughening treatment after the first roughening treatment, the surface area of the substrate can be remarkably increased. Further, when the second roughening treatment is performed on only the substrate having a flat surface, only R1 (10-point average thickness) of 1 to 5/m and Ra of 〇3 to 0.4 m are formed on the surface of the substrate ( The Raman of the arithmetic mean thickness (the arithmetic mean thickness) is preferably combined as described above to form a 1~(1() point average thickness) of 4~12//111 and a Ra of 0·3~0. 7m (1) The roughening treatment for the purpose of the relatively large (thickness of the average thickness), and the surface roughness after the second roughening treatment can be 3 to 15/m. The average thickness of the 〇 point) and Ra·丨~丨· Ravm Ra (arithmetic mean thickness). Next, the conductive layer 7 is formed on the surface of the substrate which is roughened by the second roughening treatment. As shown in the first figure (e), the material constituting the conductive layer is embedded in the surface of the roughened surface by the second roughening treatment and the second roughening treatment 12 1290816. Anchoring effect). The interface structure between the conductive layer 7 and the substrate 1 obtained in this way can not only significantly increase the contact area between the conductive layer and the substrate, but also utilize the conductive layer material to anchor the unevenness of the substrate surface to make the conductive layer Strongly fixed on the substrate. The method of forming the conductive layer and the layer is not particularly limited as long as it is a method for forming the above-described interface structure. However, as will be described later, a stacking method is preferably employed. Further, the stacking method is divided into a full stacking method and a half stacking method, and any one of the methods can be used in the present invention. According to the present invention, in combination with the physical roughening treatment and the chemical roughening treatment, in particular, the third surface roughening of the surface of the substrate is performed by copying the unevenness of the replicated sheet to the substrate. The combination of the treatment and the second roughening treatment for preferentially etching and removing the particles dispersed in the inside of the substrate to chemically roughen the surface of the substrate improves the adhesion between the conductive layer and the substrate, thereby achieving better reliability. Next, an example of a method of manufacturing a multilayer printed wiring board of the present invention will be described. μ As shown in Fig. 6(a), the inner layer substrate 5 of the specific inner layer circuit 4 is pre-wired on both sides, and the prepreg 3 which is formed by the electrical insulating property is formed into a fibrous base material 3 Then, after the replica film is placed on the prepreg, as shown in FIG. 6(b), the laminate is formed into a body by a molding method such as multi-stage vacuum press. The inner layer substrate 5 is formed by, for example, laminating the prepreg 3 () of the necessary number to form a laminate structure. The inner layer circuit 4 is formed by a stacking method or a removal method. In addition, a circuit can be formed on a laminated board such as a copper-clad laminate which is commercially available. Further, it is also possible to arrange the prepreg 30 on the outer surface of the 13 1290816 and perform lamination molding. This black oxygen, where == etc. = prepreg 3. Shape 1:: The straw is removed from the replicated sheet 8, using the surface of the prepreg. Thus: due to the copy of the complex (four) film to the roughening process, (4) _^,, _ bribe the button of the insulating layer and 彳t rate. Further, by using the unevenness of the replica sheet 8 to make use of the surface area formed on the prepreg 3G (insulating layer 6) half == the crucible 30, the depth of the concavity formed is reduced by the thickness of the sheet|C For example, in order to realize the prepreg of the wiring base, if the roughening treatment is used/the undercut is too deep, the insulation reliability in the thickness direction may be lowered. In the roughening treatment, if the thickness is __, the thickness of the +-cured sheet is reduced and there is a problem of insulation reliability. However, by using the above-mentioned complex (four) 4 method, it is only necessary to produce a copy of the uneven surface having the thickness of the special surface. The thin sheet can provide good reproducibility of the prepreg with the same surface thickness, and the quality of the 铋 曰 曰 曰 5 5 5 谷 谷 谷 谷 谷 , , , , , , , , , , , , , , , , , , , , , , , , , , , , Bad rate. Next, the secret engraving solution was subjected to the second roughening treatment. The second roughening treatment can be carried out by impregnating the laminated sheet shown in Fig. 6(C) with the (10) solution impregnation. Further, the type of the etching solution can be changed and performed plural times. For example, the temperature of the (iv) solution can be set to 4G to (10). C, set the immersion time to 1 to 30 minutes. In addition, when the above-mentioned "CiRCUp〇SIT MLB211", "EMPRATE MLB497", and "E_ATE MLB-791M" 1290816 are used in combination, the following solutions are implemented, that is, First, the laminate is immersed in "circup〇sit MLB21l" and the resin is swelled. Next, the laminate is immersed in "EMpRATE MLB497" to carry out the resin transfer. Finally, the laminate is immersed in

「EMPRATE 791M」中和驗性下之狀態。如此,在使用複製薄片實 把第1粗面化處理後再利用兹刻實施第2粗面化處理係最理 釔,然而,並未排除以利用複製薄片以外之手法實施第^ 粗面化處理後再實施第2粗面化處理之方法。 其後,利用堆疊法在實施過第1及第2粗面化處理之絕 緣層6表面形成外層電路7〇,且在必要時,形成用以連結内 層電,4、及絕緣層6上之外層€路7()之通孔電㈣,而得 到如第六圖⑷所示之多層印刷電路板。此外,第六圖⑷ 所示之印觀路板係4難,然而,本發明並未受限於此, 亦可將上述4層板當做内層基板5,並以相同步驟製作更多 層之印刷電路板。 其次,針對外層電路70之形成方法採用半堆疊法時之 印刷電路板製造方法之實例進行說明。 首先,在實施過第2粗面化處理之第七圖(a)所示之疊 曰=上’如第七圖⑹所示,以鑽頭等形成通孔電鑛形成用 之貫,孔50、及盲通孔形成用之到達内層電路4之孔52。此 =,第七圖(a)所示之疊層體係以和第六圖(c)相同之方式 A作,故省略重複說明。 其次,如第七圖(c)所示,利用無電解電鍍,在由半固 化片30所構成之絕緣層6之表面形成電鍍層4〇。其次,如第 15 1290816 七圖⑷所示’在不必形成外層電糊之部份 •此外,如第七圖(e)所示,實施電解鋼電鑛 解電鑛處理,在未形成财電鑛抗钱⑽之部 當 鍍層43。 *电鮮電"EMPRATE 791M" neutralizes the state under the test. In this way, the second roughening treatment is performed after the first roughening treatment is performed using the copy sheet. However, it is not excluded that the second roughening treatment is performed by using a method other than the replica sheet. Then, the method of the second roughening treatment is carried out. Thereafter, an outer layer circuit 7 is formed on the surface of the insulating layer 6 subjected to the first and second roughening treatments by a stacking method, and if necessary, is formed to connect the inner layer of electricity, 4, and the outer layer of the insulating layer 6. The via hole (4) of the road 7 () is obtained as a multilayer printed circuit board as shown in the sixth figure (4). In addition, the printed circuit board system shown in the sixth figure (4) is difficult. However, the present invention is not limited thereto, and the above-mentioned four-layer board can also be regarded as the inner layer substrate 5, and more layers can be printed in the same steps. Circuit board. Next, an example of a method of manufacturing a printed circuit board in the method of forming the outer layer circuit 70 using the half stack method will be described. First, as shown in the seventh figure (6), the stacking method shown in the seventh figure (a) of the second roughening treatment is performed, and the hole 50 is formed by a drill or the like. And the blind via hole is formed to reach the hole 52 of the inner layer circuit 4. This =, the laminated system shown in the seventh figure (a) is made in the same manner as in the sixth drawing (c), and the repeated description is omitted. Next, as shown in the seventh diagram (c), a plating layer 4 is formed on the surface of the insulating layer 6 composed of the semi-cured sheet 30 by electroless plating. Secondly, as shown in Fig. 15 1290816, Figure 7 (4), in the part that does not have to form the outer layer of electric paste. In addition, as shown in the seventh figure (e), the implementation of electrolytic steel electro-mineralization and demineralization treatment does not form a coal mine. The part of the anti-money (10) is the plating 43. *Electric fresh electricity

其次,如第七圖⑺所示’除去耐電鑛抗餘細使 解電鑛鄕出後,快祕而丨触灿㈣除去、= 到如第七圖(g)所示之形成外層電路7〇之多層印刷電: 板。在貫通孔孔52之内面形成無電解電⑽及電 鍍43,形成用以實施内層電路4及外層電路7〇之電性連結之 通孔電鍍71及盲通孔72。此外’適度實施後硬化。 〔實施例〕 以下,利用實施例針對本發明進行具體說明。 <清漆之調製> 本實施例時,係以表1所示之含有量調合各成分,調製 3種類之清漆” Γ〜” 3” 。 、 調製清漆” Γ所使用之含磷環氧樹脂以如下所示之 方法取得。首先,在容量300ml之三口燒瓶裝上攪拌裝置及 冷卻管,其次,將特定量之二甲基甲醯胺(DMF)及曱氧基丙 搭(Methoxy propanol,MP)添加至該燒瓶後,進一步添加 環氧樹脂(大日本油墨化學工業社製「EPIKURON 850S」 53重量百分比及「EPIKURON N690」13重量百分比)。 「EPIKURON 850S」及「EPIKURON N690」之環氧化物當 量分別為190及220。 其後,以油浴將所得到之混合物加熱至8(TC時,投入 16 1290816 1!重里百刀比之〔化學式1〕所示之鱗化合物(三光化學社 亚進-步進行加熱。到達⑽。c日夺,以相對於總 1為〇_2質量%之比例投人三苯基鱗,使上述氣合物 氣樹脂進行反應。此外,到達特定環氧化物當量時,停止 反應而得到含响氧躺之麵。此外,反紅進行 =依據nSK7i1995檢測環氧化物#量之方式來進行確 〔化學式1〕Secondly, as shown in the seventh figure (7), 'removing the resistance to the anti-mineral anti-refinement, so that after the de-extracted ore is removed, it will be removed quickly, and the outer layer circuit will be formed as shown in the seventh figure (g). Multilayer printed electricity: board. Electroless electricity (10) and plating 43 are formed on the inner surface of the through hole 52, and via plating 71 and blind via 72 for electrically connecting the inner layer circuit 4 and the outer layer circuit 7 are formed. In addition, it is hardened after moderate implementation. [Examples] Hereinafter, the present invention will be specifically described by way of examples. <Preparation of varnish> In the present embodiment, each component was blended in the amounts shown in Table 1, and three types of varnishes "”~" 3" were prepared. Obtained as follows. First, a stirring apparatus and a cooling tube were placed in a three-necked flask having a capacity of 300 ml, and then, a specific amount of dimethylformamide (DMF) and Methoxy propanol (MP) were added to the flask, and further, Epoxy resin (EPIKURON 850S, manufactured by Dainippon Ink and Chemicals, Inc., 53 wt% and "EPIKURON N690", 13 wt%) were added. The epoxides of "EPIKURON 850S" and "EPIKURON N690" were 190 and 220 respectively. Thereafter, the obtained mixture was heated to 8 (TC) in an oil bath, and the scaly compound shown in [Chemical Formula 1] was added in a ratio of 16 1290816 1 (the chemical formula 1). In the case of c-day, the triphenylbenzene scale is injected at a ratio of 〇2% by mass to the total of 1, and the gas-gas resin is reacted. Further, when a specific epoxide equivalent is reached, the reaction is stopped to obtain Oxygen lie on the surface. In addition, anti-red is carried out = according to nSK7i1995 to detect the amount of epoxide # to determine [Chemical Formula 1]

Η 清漆” 2”及” 3”之調製所使用之溴化環氧樹脂係東 都化成社製「YDB-500」,cresol novolak型環氧樹脂係大 日本油墨化學工業社製「EPIKURON N690」。使用雙氮胺 (分子量84、理論活性氫當量21)當做硬化劑,硬化促進劑 係使用2-乙基-4-甲基咪唑。此外,使用將二氧化矽(電性 化學工業社製「SFP-10X」)當做有機溶劑使用之二甲基甲 醯胺(DMF)當做充填劑。 此外,第2粗面化處理所使用之蝕刻溶液優先溶解除去 之成分,係丁二烯-丙烯晴共聚物之架橋彈性體(JSR社製 「XER-91」:粒子徑0· 1 // m以下)及聚乙烯醇縮乙駿 (polyvinylacetal)樹脂(電性化學工業社製「6000R」)。 17 1290816 【表1】 含有量(韋暈百分比) 淸漆編號 1 2 3 含磷環氧樹脂 82 0 0 溴化環氧樹脂 0 49 49 甲(苯)酚酚醛淸漆型環氧樹月旨 0 9 9 雙氰胺 — 3~~ 2 2 2-乙基-4-甲基咪唑 0.1 0.1 0.1 二氧化矽 10 10 10 DMF 0 25 25 架橋彈性體 10 10 0 聚乙烯醇縮乙醛樹脂 5 5 0 合計 110.1 110.1 95.1 (半固化片之製作) 本實施例所使用之表1所示之3種清漆及纖維狀基材係 厚度0.08mm之玻璃布之日東紡社製rWEA1116」及厚度 0.04mm之玻璃布之日東紡社製rWEA1〇78」,與表2所示之 清漆及玻璃布進行組合並將清漆浸潰於玻璃布後,以乾燥 機實施170°C之加熱乾燥,製成半硬化之价皆段狀態之半固 化片。 (實施例1) 利用以清漆,,1,,及玻璃布「WEA1116」製成之半固化 18 1290816 片一、下述方式製作印刷電路板。首先,如第六圖(a)、(b) - 所不在預先形成内層電路4(松下電工社製「R-1566」) 之内層基板5表面配置半固化片3〇,並將當做複製薄片8使 三井金屬社製「3EG-III」,厚度18μπ〇重 且於口玄半固化片3〇上,以多段真空冲壓法實施疊層成形而 成為一體。®層成形之實施上,係依以下之(1)〜⑺之順 序改變加熱加壓之條件。 (1)壓力0· 5MPa(5KgF/cm2)、熱盤溫度3〇°c、保持30分鐘。 _ ⑵壓力0· 5MPa(5KgF/cm2)、使熱盤溫度上昇至i2〇°c。昇 溫速度為2〇C /分。 (3) 壓力〇· 5MPa(5KgF/cm2)、熱盤溫度12〇。〇、保持5分鐘。 (4) 壓力 2· 0MPa(20KgF/cm2)、熱盤溫度 120°C、保持20分 鐘。 (5) 壓力2· 0MPa(20KgF/cm2)、使熱盤溫度上昇至160°c。 昇溫速度為3°C/分。 (6) 壓力 2· 0MPa(20KgF/cm2)、熱盤溫度 160°C、保持30分 _ 鐘。 (7) 壓力2· 0MPa(20KgF/cm2)、以冷卻水使熱盤溫度冷卻至 50°c以下。 •其次,如第六圖(c)所示,疊層成形後,利用蝕刻除去 複製薄片8而完成第1粗面化處理。此外,第1粗面化處理之 後,實施第2粗面化處理。第2粗面化處理係依下述(1)〜(3) 之順序實施。溴 The brominated epoxy resin used for the preparation of the varnishes 2" and "3" is "YDB-500" manufactured by Tosho Kasei Co., Ltd., and the cresol novolak epoxy resin is "EPIKURON N690" manufactured by Nippon Ink Chemical Industry Co., Ltd. As the hardener, a diazoamine (molecular weight 84, theoretically active hydrogen equivalent 21) was used, and a hardening accelerator was 2-ethyl-4-methylimidazole. Further, dimethylformamide (DMF) using cerium oxide ("SFP-10X" manufactured by Electrochemical Industry Co., Ltd.) as an organic solvent was used as a filler. In addition, the component which is preferentially dissolved and removed by the etching solution used for the second roughening treatment is a bridging elastomer of butadiene-acrylonitrile copolymer (XER-91 manufactured by JSR Corporation: particle diameter 0·1 // m The following) and polyvinylacetal resin ("6000R" manufactured by Electric Chemical Industry Co., Ltd.). 17 1290816 [Table 1] Content (% of Wei Halo) Paint No. 1 2 3 Phosphorus-containing epoxy resin 82 0 0 Brominated epoxy resin 0 49 49 A(phenyl)phenol phenolic enamel paint type epoxy tree month 0 9 9 dicyandiamide — 3~~ 2 2 2-ethyl-4-methylimidazole 0.1 0.1 0.1 cerium oxide 10 10 10 DMF 0 25 25 bridging elastomer 10 10 0 polyvinyl acetal resin 5 5 0 Total 110.1 110.1 95.1 (Preparation of prepreg) The three types of varnish and fibrous substrate shown in Table 1 used in this example are rWEA1116 manufactured by Nippon Textile Co., Ltd. and glass cloth with a thickness of 0.04 mm. RWEA1〇78" manufactured by Nitto Spinning Co., Ltd., combined with the varnish and glass cloth shown in Table 2, and immersed the varnish in a glass cloth, and then dried at 170 ° C in a dryer to obtain a semi-hardened price. State prepreg. (Example 1) A printed circuit board was produced by the following method using a semi-cured 18 1290816 sheet made of varnish, 1, and glass cloth "WEA1116". First, as shown in Fig. 6 (a) and (b), the prepreg 3 配置 is disposed on the surface of the inner substrate 5 in which the inner layer circuit 4 ("R-1566" manufactured by Matsushita Electric Works Co., Ltd.) is not formed, and the replica sheet 8 is used as the triple sheet. "3EG-III" manufactured by Metals Co., Ltd., having a thickness of 18 μπ〇 and a thickness of 18 μm, was laminated on a three-stage vacuum prepreg to form a laminate. In the implementation of the layer formation, the conditions of heating and pressurization are changed in the order of (1) to (7) below. (1) Pressure 0·5 MPa (5 KgF/cm 2 ), hot plate temperature 3 〇 ° c, and hold for 30 minutes. _ (2) The pressure is 0·5 MPa (5 KgF/cm2), and the hot plate temperature is raised to i2 〇 °c. The temperature rise rate is 2 〇C / min. (3) Pressure 〇 · 5MPa (5KgF / cm2), hot plate temperature 12 〇. Hey, keep it for 5 minutes. (4) Pressure 2·0MPa (20KgF/cm2), hot plate temperature 120°C, hold for 20 minutes. (5) The pressure is 2.0 MPa (20 KgF/cm2), and the hot plate temperature is raised to 160 °C. The heating rate was 3 ° C / min. (6) Pressure 2·0MPa (20KgF/cm2), hot plate temperature 160°C, hold for 30 minutes _ clock. (7) Pressure 2·0 MPa (20 KgF/cm2), and the hot plate temperature is cooled to 50 ° C or less with cooling water. • Next, as shown in Fig. 6(c), after the laminate is formed, the replica sheet 8 is removed by etching to complete the first roughening treatment. Further, after the first roughening treatment, the second roughening treatment is performed. The second roughening treatment is carried out in the following order (1) to (3).

(1)將疊層板浸潰於75°C之CYPRES公司製” CIRCUPOSIT 19 1290816 κ MLB211”液中,浸潰時間6分鐘。 (2) 其次,浸潰於80。(:之·LTEX公司製” EMPRAte MLB497”液中,浸潰時間1〇分鐘。 (3) 浸潰於40°C之MELTEX公司製「EMpRATE MLB—791M」液 中,浸潰時間5分鐘。 在以堆疊法形成外層電路7〇後,利用乾燥機實施17〇 t:、120分鐘之後硬化,得到第六圖(d)所示之實施例丨之4 層印刷電純。外層電_之形成上,储銅電鑛處 ⑩ 理後’貫施120 C、60分鐘之乾燥,再進行電解銅電鍍處理。 電鍍厚度為20± 2//m。 (實施例2) 除了使用以清漆” Γ及玻璃布「WEA1078」製成之半 固化片、及使用剝離型之複製薄片8取代實施例蝕刻除 去型複製薄片以外,其餘與實施例1相同,得到實施例2之4 層印刷電路板。 _ 本實施例所使用之複製薄片8之製作上,如第五圖所 示,係將厚度12//m之薄膜狀聚對苯二曱酸乙二醇醋 (PET) 13以乾式黏結劑14黏結於厚度25 // m之铭箔15來製成 薄片材12,其次,將1〇質量%之聚丙烯(pp)調合於粉碎二氧 化矽(電性化學工業社製「FS—20」),以厚度為2//Π!之方式 將該調合物塗布於上述薄片材12之鋁箔15之表面。 (實施例3) 除了使用以清漆” 2”及玻璃布「WEA1078」製成之半 固化片以外,其餘與實施例2相同,得到實施例3之4層印刷 20 1290816 電路板。 (實施例4) 除了使用以清漆,,3”及玻璃布「WEA1078」製成之半 固化片以外,其餘與實施例2相同,得到實施例4之4層印刷 電路板。 (實施例5) 除了使用粉碎二氧化矽之含有量為2〇質量%之複製薄 片8以外,其餘與實施例2相同,得到實施例5之4層印刷電 路板。 (比較例1) 除了複製薄片8係使用未含粉碎二氧化石夕之薄片以 外,其餘與實施例2相同,得到比較例1之4層印刷電路板。 (比較例2) 以下述方法製造比較例2之印刷電路板。首先,如第八 圖(a)、(b)所示,將附有保護膜26之樹脂薄片25以樹脂薄 片25之表面接觸内層基板5之方式疊合於與實施例1所使用 者相同種類之内層基板5表面後,以真空層合法實施疊層成 形而成為體。 本比較例所使用之附有保護膜26之樹脂膜25之製作 上’係使用MULTICT(HELANOTAXID公司製「M400」),在厚 度40 /z m之聚對苯二曱酸乙二醇酯(pET)膜塗布厚度約6〇 # m之β漆1 ’以搬運速度2〇cm/分進行搬運同時實施1〇〇 C溫度之乾燥,此外,以厚度20//m之聚乙烯(PE)膜覆蓋塗 21 1290816 布面。此外,在疊層成形前剝除PE膜。 ^其次,如第八圖(C)所示,剝離保護膜26後,以堆疊法 在路出之樹㈣上形成外層電路70,並_乾燥機實施 ^〇C、120分鐘之後硬化,得到第八圖(d)所示之4層印刷 ,,板。外層電路7〇之形成上,係在無電解銅電鍍處理後, 貝轭120 C、60分鐘之乾燥,然後再實施電解銅電鍍處理。 電鍍厚度為20± 2//m。 針對以上述方法製成之實施例丨〜5及比較例丨〜2之印 刷電路板,貫施⑴電鑛之剝離強度、⑵彈性率⑶絕緣 ,性之評估。此外,觀職公司製之超深度表面形狀測 疋顯微鏡VK-85GG檢測電鍍前之基板之表面粗細度(_(1) The laminate was immersed in a "CIRCUPOSIT 19 1290816 κ MLB211" solution manufactured by CYPRES Co., Ltd. at 75 ° C for 6 minutes. (2) Second, immerse in 80. (In the EMPRAte MLB497" liquid manufactured by LTEX Co., Ltd., the immersion time was 1 minute. (3) The immersion time of 5 minutes was immersed in the "EMpRATE MLB-791M" liquid manufactured by MELTEX Co., Ltd. at 40 °C. After the outer layer circuit 7 is formed by a stacking method, it is cured by a dryer for 17 〇t: and after 120 minutes to obtain a 4-layer printed electric purity of the embodiment shown in the sixth figure (d). After the storage of the copper ore deposit, the treatment is carried out after 120 C, 60 minutes of drying, and then electrolytic copper plating treatment. The plating thickness is 20 ± 2 / / m. (Example 2) In addition to the use of varnish "Γ and glass The four-layer printed circuit board of Example 2 was obtained in the same manner as in Example 1 except that the prepreg made of "WEA1078" and the detachable replica sheet 8 were used instead of the etch-removable sheet of the embodiment. For the production of the replica sheet 8 used, as shown in the fifth figure, a film-like poly(ethylene terephthalate) (PET) 13 having a thickness of 12/m is bonded to the thickness of the dry binder 14 by 25 / / m of the foil 15 to make the sheet 12, and secondly, 1% by mass of polypropylene (pp) This mixture was applied to the surface of the aluminum foil 15 of the above-mentioned sheet material 12 so as to have a thickness of 2 / / Π 粉碎 二 二 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 A 4-layer printed 20 1290816 circuit board of Example 3 was obtained in the same manner as in Example 2 except that a prepreg made of varnish "2" and glass cloth "WEA1078" was used. (Example 4) In addition to using varnish, A four-layer printed circuit board of Example 4 was obtained in the same manner as in Example 2 except that the prepreg made of the glass cloth "WEA1078" was used. (Example 5) The content of the pulverized cerium oxide was 2 Å. A four-layer printed circuit board of Example 5 was obtained in the same manner as in Example 2 except for the % of the replica sheet 8. (Comparative Example 1) Except that the sheet 6 was used, a sheet containing no pulverized silica was used, and the same was carried out. In the same manner as in Example 2, a 4-layer printed circuit board of Comparative Example 1 was obtained. (Comparative Example 2) A printed circuit board of Comparative Example 2 was produced by the following method. First, as shown in the eighth (a) and (b), Resin sheet 25 having protective film 26 as resin sheet The surface of the inner layer substrate 5 of the same type as that of the user of the first embodiment is superimposed on the surface of the inner layer substrate 5 of the first embodiment, and then laminated by vacuum lamination. The protective film is used in this comparative example. In the production of the resin film 25 of 26, a MULTICHET ("M400" manufactured by HELANOTAIX Co., Ltd.) was used, and a polyethylene terephthalate (pET) film having a thickness of 40 /zm was coated with a thickness of about 6 〇 #m. The paint 1' was conveyed at a conveyance speed of 2 〇cm/min while being dried at a temperature of 1 〇〇C, and covered with a polyethylene (PE) film having a thickness of 20/m. Further, the PE film was peeled off before the laminate molding. ^ Next, as shown in the eighth figure (C), after the protective film 26 is peeled off, the outer layer circuit 70 is formed on the road-out tree (4) by a stacking method, and the dryer is hardened by performing a heat treatment for 120 minutes. The four layers of printing shown in Figure 8 (d), the board. The outer layer circuit 7 is formed by electroless copper plating treatment, and the bead yoke 120 C, dried for 60 minutes, and then subjected to electrolytic copper plating treatment. The plating thickness is 20 ± 2 / / m. With respect to the printed circuit boards of Examples 丨 to 5 and Comparative Examples 丨 2 which were produced by the above method, (1) peel strength of the electric ore, and (2) elasticity (3) insulation and evaluation were evaluated. In addition, the ultra-deep surface shape measuring microscope VK-85GG manufactured by the company is used to detect the surface roughness of the substrate before plating (_

Ra)。 (1) 剝離強度 檢測外層電路70(銅電鍍幅10_)之剝離 樣數⑷為5,取其平均値當做剝離強度。結果如表=抽 (2) 彈性率 ❺f合8片各實施例所使用之半固化片,將疊層成形所得 當做彈性率評估用樣本使用。此外,比較例2時,係 =8片_賴膜26之_賴,並將疊層成形所得到之 二做評估用樣本。利用DMA法針對上述樣本檢測彈性率Ra). (1) Peel strength The peeling number (4) of the outer layer circuit 70 (copper plating web 10_) was measured to be 5, and the average enthalpy was taken as the peeling strength. The results are as follows: Table = Extraction (2) Elasticity ❺f A total of 8 prepregs used in the respective examples were obtained, and the laminate was molded and used as a sample for evaluation of the modulus of elasticity. Further, in the case of Comparative Example 2, the film of 8 sheets was used, and the obtained sample was formed into a sample for evaluation. Using the DMA method to detect the elastic modulus for the above samples

Ub C)。結果如表2所示。 (3) 絕緣信賴性 進行絕緣信賴性試驗。首先,在溫度130 C/相對濕度之環境下,對印刷電路板施加直流册, 22 1290816 檢測半固化片或樹脂薄片所形成之絕緣層之試驗前阻抗 値。其次,將該印刷電路板置於溫度13〇°c/相對濕度85% 之環境下,持續施加150小時之直流2〇V後,施加直流20V 來檢測絕緣層之試驗後阻抗値。其次,試驗後阻抗値相對 於試驗前阻抗値之比例為50%以下者判定成「><(」,為5〇〇/0 以上者判定成「〇」,評估樣本數為3,以〇之個數來判定 絕緣信賴性。結果如表2所示。Ub C). The results are shown in Table 2. (3) Insulation reliability Test the insulation reliability. First, a DC book is applied to the printed circuit board in a temperature of 130 C/rel. humidity, and 22 1290816 detects the pre-test impedance 値 of the insulating layer formed by the prepreg or the resin sheet. Next, the printed circuit board was placed in an environment of a temperature of 13 ° C / a relative humidity of 85%, and after applying 150 VDC for 2 hours, a direct current of 20 V was applied to detect the post-test impedance 绝缘 of the insulating layer. Then, after the test, the ratio of the impedance 値 to the impedance 値 before the test is 50% or less, and it is judged as "><(", the value of 5〇〇/0 or more is determined as "〇", and the number of evaluation samples is 3, The insulation reliability was determined by the number of turns. The results are shown in Table 2.

[表2][Table 2]

_例 比較例 1 2 3 4 5 1 2 淸漆編號 1 1 2 3 1 1 1 玻璃布 1116 1078 1078 1078 1078 1078 1078 絕緣層之疊層方法 多段真空冲壓 真空層合 彈性率(25度C) (kgf/mm2) 1189 908 903 973 899 903 522 (Mpa) 11660 8904 8855 9610 8810 8855 5116 剝離強度 (η=5平均値) (kgf/cm) 0.88 0.85 0.86 0.68 0.89 0.59 0.59 (N/cm) 8.6 8.3 8.4 6.7 8.7 5.8 5.8 表面粗細度 (第2粗面化處理後) Rz( β m) 11.9 7.2 9.7 3.9 17.1 2.7 2.6 Ra( β m) 0.54 0.29 0.46 0.19 1.30 0.08 0.07 絕緣信賴性 (試驗時間:2〇〇小時) 〇〇〇 〇〇〇 〇〇〇 〇〇〇 XXX 〇〇〇 Οχχ 由表2之結果可知,與未實施第1粗面化處理之比較例 1、及未實施第1及第2粗面化處理之比較例2相比,實施第1 及第2粗面化處理之實施例1〜5具有高密合性。此外,比較 23 1290816 ㈣’因為丄吏用未含粉碎二氧化石夕之薄片,凹 至半固化片表面,應為密合性差之原因。此外,比㈣f 時,因為未使用纖維狀基材,故剛性亦較差。 實施例4時,因為半固化片未含有第城面化處理時餘 刻液優先溶解之粒子,故师面化處理所紐得之密合性 效果稍低於實齡Π〜3。實關㈣,雖射得到極高之穷 片8所含有之 製至半固化片之凹凸會太深,在本 無法獲得充份之絕緣信賴性。因此,為 挽合性且可破保絕緣信賴性,應配合半固化片之严 決定,至半固化片之凹凸量(表面粗細度)二 X %’因為較容易控制第(粗面化處理時之複製薄 面粗細度、及第2粗面化處理時溶解之粒子之大小,故可: 性對應厚度不同之印刷電路板之製造,: 面具有σ最適當之凹凸而獲得良好信賴性。 片表 待可tit述1依據本發明之配線基板之製造方法,期 且f造密合性及絕緣信賴性之最佳表面狀態, ,電應高::近年來呈現薄型化傾向 24 1290816 【圖式簡單說明】 第一圖(a)〜(e)係本發明之良好實施形態之2段粗面化處 理之概略步驟圖。 第二圖係第1粗面化處理前之基板表面之SEM相片。 第三圖係第1粗面化處理後之基板表面之SEM相片。 弟四圖係弟2粗面化處理後之基板表面之SEM相片。 第五圖係第1粗面化處理所使用之複製薄片之實例之概略 剖面圖。 馨弟/、圖(a)〜(d)係本發明之良好實施形態之印刷電路板之 製造方法之概略步驟圖。 第七圖(a)〜(g)係本發明之良好實施形態之其他印刷電路 板之製造方法之概略步驟圖。 第八圖(a)〜(d)係印刷電路板之傳統製造方法之概略步驟 圖。 _ 【主要元件符號說明】 1 基板 2 電性絕緣性樹脂組成物 3 纖維狀基材 4 内層電路 5 内層基板 6 絕緣層 7 導電層 8 複製薄片 25 無機填料 脫膜劑 薄片材 聚對苯二曱酸乙二醇酯 黏結劑 銘ί白 粒子 樹脂膜 保護膜 半固化片 電解電鍍 貫通孔 孔 耐電鍍抗蝕層 外層電路 通孔電鑛 盲通孔 26_Example Comparative Example 1 2 3 4 5 1 2 淸lacquer No. 1 1 2 3 1 1 1 Glass cloth 1116 1078 1078 1078 1078 1078 1078 Lamination method of insulating layer Multi-stage vacuum stamping vacuum lamination modulus (25 degrees C) ( Kgf/mm2) 1189 908 903 973 899 903 522 (Mpa) 11660 8904 8855 9610 8810 8855 5116 Peel strength (η=5 average 値) (kgf/cm) 0.88 0.85 0.86 0.68 0.89 0.59 0.59 (N/cm) 8.6 8.3 8.4 6.7 8.7 5.8 5.8 Surface thickness (after 2nd roughening treatment) Rz(β m) 11.9 7.2 9.7 3.9 17.1 2.7 2.6 Ra( β m) 0.54 0.29 0.46 0.19 1.30 0.08 0.07 Insulation reliability (test time: 2〇〇 Hour) 〇〇〇〇〇〇〇〇〇〇〇〇 XXX 〇〇〇Οχχ As can be seen from the results of Table 2, Comparative Example 1 in which the first roughening treatment was not performed, and the first and second rough surfaces were not implemented. In Comparative Example 2, Comparative Examples 1 to 5 in which the first and second roughening treatments were carried out had high adhesion. In addition, compare 23 1290816 (4)' because the enamel does not contain pulverized silica dioxide, and the surface is recessed to the surface of the prepreg, which should be the reason for poor adhesion. Further, in the case of (4) f, since the fibrous base material is not used, the rigidity is also inferior. In the case of the fourth embodiment, since the prepreg does not contain particles in which the residual liquid is preferentially dissolved in the first surface treatment, the adhesion effect obtained by the surface treatment is slightly lower than that of the actual age Π3. Actually (4), although the shot is extremely poor, the unevenness of the prepreg contained in the film 8 will be too deep, and the insulation reliability cannot be obtained in this case. Therefore, for the compatibility and the reliability of the insulation can be broken, it should be determined according to the strictness of the prepreg, and the amount of the unevenness (surface thickness) of the prepreg is XX% because it is easier to control (the thickness of the surface of the surface is roughened) And the size of the particles dissolved in the second roughening treatment, so that the printing can be performed on a printed circuit board having different thicknesses: the surface has the most appropriate unevenness of σ, and good reliability is obtained. (1) According to the method for manufacturing a wiring board according to the present invention, the optimum surface state of the adhesion and the reliability of the insulation is high, and the electric power is high: in recent years, the tendency to be thinned is made 24 1290816 [Simple description of the drawing] Figures (a) to (e) are schematic flow diagrams of a two-stage roughening treatment according to a preferred embodiment of the present invention. The second drawing is an SEM photograph of the surface of the substrate before the first roughening treatment. 1 SEM photograph of the surface of the substrate after the roughening treatment. SEM photograph of the surface of the substrate after the roughening treatment of the younger brother. The fifth figure is an outline of an example of the replica sheet used in the first roughening treatment. Sectional view. Xindi /, map ( a) to (d) are schematic process diagrams of a method of manufacturing a printed circuit board according to a preferred embodiment of the present invention. (a) to (g) are other methods of manufacturing a printed circuit board according to a preferred embodiment of the present invention. Fig. 8(a) to (d) are schematic diagrams showing the conventional manufacturing method of a printed circuit board. _ [Main component symbol description] 1 substrate 2 electrically insulating resin composition 3 fibrous substrate 4 Inner layer circuit 5 Inner substrate 6 Insulation layer 7 Conductive layer 8 Replicated sheet 25 Inorganic filler Release agent Sheet material Polyethylene terephthalate adhesive agent Mingί White particle resin film Protective film Prepreg Electrolytic plating Through hole resistance Electroplated resist layer outer circuit through hole electric mine blind through hole 26

Claims (1)

1290816 卜、申請專利範圍: 1、 -種配線基板之製造方法,其特 · *化之前述基二::====:粗 在以前述第2粗面化處理實施粗面化 成導電層之步驟。 土伋之表面形 2、 如中請專利_第丨項之配線基板之製造方法,其 上述基板储f性絕緣靖齡成物 所製成之半SMb>j。 ^狀基材 3、 如申請專利範㈣丨狀配線基板之製造方法,呈 中上述第1粗面化處理具有:實施具有特定表面粗細度之^ 凸面之薄片與基板之—體成形而將前述凹凸轉製至 表面之步驟;及用以從基板除去前述薄片而得到物理ς面 化之基板表面之步驟。 4、 如申請專利範圍第3項之配線基板之製造方法,其 中上述薄片係以將含有無機填料之脫顧塗布於薄 面之方式來製作。 5、 如申請專利範圍第1項之配線基板之製造方法,其 中上述第1及第2粗面化處理之實施上,係使基板之表面粗 細度RzUG點平均粗細度)成為3〜15_,錢以(算術平均 粗細度)成為0.1〜1. 〇//m。 6、 如申請專·圍第1項之配線基板之製造方法,其 27 1290816 中上述基板含有分散於紐絕緣性韻 液可優,材料之粒子,第2粗:二 溶液優先溶解分布於以第1粒面化處理實施粗面化之以 基板之表面附近之前述粒子。 7、 如申請專利範圍物之配線基板之製造方法,其 中用以構成上述粒子之材料係含有丁二稀-丙烯晴共聚物 之架橋弹性體及聚乙稀醇縮⑽(PQlyvinylacetal)樹脂。1290816 卜, the scope of application for patents: 1. The method for manufacturing a wiring board, wherein the base 2::====: rough is roughened into a conductive layer by the second roughening treatment. step. The surface shape of the soil 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 2、 配线 配线 配线 配线 配线 配线 配线 配线A method of manufacturing a braided wiring substrate according to the fourth aspect of the invention, wherein the first roughening treatment is performed by forming a sheet having a convex surface having a specific surface roughness and a substrate. a step of converting the unevenness to the surface; and a step of removing the surface of the substrate from the substrate to obtain a surface of the substrate which is physically textured. 4. The method of producing a wiring board according to the third aspect of the invention, wherein the sheet is produced by applying a coating containing an inorganic filler to a thin surface. 5. The method of manufacturing a wiring board according to the first aspect of the invention, wherein the first and second roughening treatments are performed such that the surface roughness RzUG point average thickness is 3 to 15 mm, The (arithmetic mean thickness) is 0.1 to 1. 〇//m. 6. In the method of manufacturing the wiring board according to the first item, the substrate of the above-mentioned substrate is contained in the layer of 12 1290816, and the particles of the material are dispersed, and the second coarse: the second solution is preferentially dissolved and distributed. The first graining treatment is performed to roughen the particles in the vicinity of the surface of the substrate. 7. A method of producing a wiring board according to the patent application, wherein the material constituting the particles comprises a bridging elastomer of a butyl diene-acrylonitrile copolymer and a PQlyvinylacetal resin. 8、 如申請專鄕目叫之配絲板之製造方法,其 中上述‘電層係以堆料形成於以第2粗面化處理實施粗 面化之基板表面。 9、如申凊專利範圍第丨項之配線基板之製造方法,其 中3有將表面域電路之0層材以前述電路接觸上述基板 之經過第1粗面域理之面之減侧之面之方式接合至上 述基板之步驟。 10種配線基板’係彻含有用以對含有電性絕緣 性樹脂組成物之基板之表面實施物理粗面化之第i粗面化 處理、用以對以前述第1粗面化步驟實施粗面化之前述基板 之表面以㈣液實施化學粗面化之第2粗面化處理、以及在 以第2粗面化處理貝施粗面化之基板之表面形成導電層之 步驟之製造方法所製成,其特徵為: 前述配線基板具有構成前述導電層之材料會叙入以第 1粗面化處理及第2粗面化處理實施粗面化之表面之凹凸之 方式所形成之導·及騎間之界面構造。 11'如中_專_圍第i G項之配線基板,其中上述第工 28 !29〇816 片=化處理具有:實施具有特定表面粗細度之凹凸面之薄 驟?基板之一體成形而將前述凹凸面複製至基板表面之步 及用以從基板除去前述薄片而得到物理粗面化之基板 表面之步驟。 人12、如申請專利範圍第10項之配線基板,其中上述基 、=3有分散於電性絕緣性樹脂組成物中且蝕刻溶液可優先 W 2之材料之粒子,第2粗面化處理係以前述蝕刻溶液優先 、知刀布於以苐1粗面化步驟實施粗面化上述基板之表面 附近之前述粒子。 斤13、如申請專利範圍第10項之配線基板,其中以第i 及第2粗面化處理實施粗面化之基板表面具有Rz(l〇點平均 粗細度)為3〜i5//m且Ra(算術平均粗細度)為〇· 1〜1 之表面粗細度。 · #8. A method of manufacturing a wire board for a specific purpose, wherein the above-mentioned "electric layer is formed by stacking a surface of a substrate which is roughened by a second roughening treatment. 9. The method of manufacturing a wiring board according to the third aspect of the invention, wherein the surface layer of the 0-layer material of the surface domain circuit is in contact with the surface of the substrate through the first rough surface region of the substrate. The step of bonding to the above substrate. The ten types of wiring boards are provided with an i-th roughening treatment for physically roughening the surface of the substrate containing the electrically insulating resin composition, and for performing rough surface by the first roughening step. The second roughening treatment for chemically roughening the surface of the substrate by the (four) liquid, and the manufacturing method for forming the conductive layer on the surface of the substrate roughened by the second roughening treatment In the wiring board, the material constituting the conductive layer is described as a guide and a ride formed by the unevenness of the roughened surface by the first roughening treatment and the second roughening treatment. Interface structure between. 11', in the middle of the wiring board of the i-th item, wherein the above-mentioned work 28:29〇816 piece = chemical treatment has a thin step of performing a concave-convex surface having a specific surface thickness, and the substrate is formed by one body The step of replicating the uneven surface to the surface of the substrate and the step of removing the surface of the substrate to obtain a surface of the substrate which is physically roughened. The wiring board of claim 10, wherein the base and =3 have particles dispersed in the electrically insulating resin composition and the etching solution can preferentially material of W 2 , and the second roughening treatment system The particles are preferentially etched by the etching solution, and the particles in the vicinity of the surface of the substrate are roughened by the ruthenium roughening step. The wiring board of claim 10, wherein the surface of the substrate roughened by the i-th and second roughening treatments has an Rz (average thickness of l〇 points) of 3 to i5//m and Ra (arithmetic mean thickness) is the surface thickness of 〇·1 to 1. · #
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