TWI269380B - Laser marking method for wafer - Google Patents

Laser marking method for wafer Download PDF

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Publication number
TWI269380B
TWI269380B TW094139968A TW94139968A TWI269380B TW I269380 B TWI269380 B TW I269380B TW 094139968 A TW094139968 A TW 094139968A TW 94139968 A TW94139968 A TW 94139968A TW I269380 B TWI269380 B TW I269380B
Authority
TW
Taiwan
Prior art keywords
wafer
marking
frame
film
marking method
Prior art date
Application number
TW094139968A
Other languages
English (en)
Other versions
TW200719404A (en
Inventor
Yu-Pen Tsai
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW094139968A priority Critical patent/TWI269380B/zh
Priority to US11/543,195 priority patent/US20070111346A1/en
Application granted granted Critical
Publication of TWI269380B publication Critical patent/TWI269380B/zh
Publication of TW200719404A publication Critical patent/TW200719404A/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Laser Beam Processing (AREA)
  • Thermal Transfer Or Thermal Recording In General (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Description

1269380 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種晶圓刻印方法，詳言之，係關於一種 利用框架支撐晶圓之刻印方法。 【先前技術】 參考圖1A至圖1D，其顯示習知之晶圓刻印方法之示意 圖。參考圖1A，首先，提供提供一晶圓1〇，該晶圓1〇具有
第一表面ιοί及一第二表面1〇2，複數個凸塊ι〇3設置於 該第一表面ιοί上，一膠層丨丨設置於該第一表面ι〇ι上。參 考圖1B，該晶圓1〇進行一研磨步驟，以薄化該晶圓ι〇。參 考圖1C，將該膠層u貼設於一第一膠膜以下，且投射一雷 射光13於該晶圓10之該第二表面1〇2以進行刻印。參考圖 1D，最後，切割該晶圓10以形成複數個晶片單元14。 在習知之晶圓刻印方法中’由於該第—膠膜以設置於 -框架上，因此無法提供較佳的支撐力，使經薄化後之該 晶圓ίο得到良好的支撐，亦無法改善雷射光13定位不良之 問題，以確保該晶圓Π)在進行刻印時精確性，造成產品之 品質不良。再者，因該晶圓10無桓架之保護，在經薄化後 之该晶圓1〇,容易於搬運至刻印製程之平台 圓10之破裂。因此，有必要接征 要耠{、一種創新且具有進步性之 晶圓刻印方法，以解決上述問題。 【發明内容】 (a； 膠 本發明係關於一種晶圓刻印方 圓4丨万去。该刻印方法包括： 提供一晶圓，該晶圓具有一第_ 名弟表面及一第二表面，一 101594.doc 1269380 層設置於該第一表面上；（b)貼設該膠層於一第一膠膜下， 該第一膠膜係設置於一框架上；及（c)投射一雷射光於該晶 圓之該第二表面以進行刻印。 在本發明中，第一膠膜係設置於一框架上，因此可以提 供較佳的支撐力，使經薄化後之晶圓得到良好的支撐，並 改善雷射光定位不良之問題，以確保晶圓在進行刻印時精 確性，以及提昇產品之品質。再者，因該晶圓經該框架之 保護，使經薄化後之該晶圓，於搬運至刻印製程之平台 時，使該晶圓不與外界碰撞，故可避免該晶圓產生破裂。 【實施方式】 < 參考圖2A至圖2D，其顯示本發明之晶圓刻印方法之示 意圖。參考圖2A，首先，提供提供一晶圓2〇，該晶圓2〇具 有一第一表面201及一第二表面202，複數個凸塊2〇3設置 於該第一表面201上，一膠層21設置於該第一表面2〇ι上， 該膠層21係為一透明材質。參考圖⑶，該晶圓⑽進行一研 磨步驟，以薄化該晶圓2〇。 參考圖2C，將該膠層21貼設於一第一膠膜22下，該第一 膠膜22係設置於一框架23上，該框架23係相對應於該晶圓 2〇之外形，該第一膠膜22係為一透明材質。該框架u係用 以保護該晶BUG以防破裂。參考圖2D，投射—雷射光24於 該晶圓20之該第二表面202以進行刻印。此時，該框架23 可用以作為該雷射光24定位用，該雷射光24係配合相對於 该晶圓2G另-側之-影像裝置（圖未示出）同軸移動，以完 成刻印步驟。在進行刻印之前，更形成至少一定位點於該 10l594.doc 1269380 20 晶圓 21 膠層 22 第一膠膜 23 框架 24 雷射光 25 第二膠膜 26 晶片單元 101 第一表面 102 第二表面 103 凸塊 201 第一表面 202 第二表面 203 凸塊 101594.doc

Claims (1)

1269380 十、申請專利範圍： 種晶圓刻印方法，包括以下步驟： (a) 提供一晶圓，該晶圓 ; 咖β 弟一表面及一第二表 面，一膠層設置於該第一表面上· (b) 貼設該膠層於一第一膠膜下 一 '下，忒弟一膠膜係設置於 一框架上；及 • (c)投射一雷射光於該晶 2 ^ ^ . 邊弟一表面以進行刻印。 •如巧求項1之晶圓刻印方法，1 ^止 貼##曰m = 其中於步驟（b)之後更包括 膠膜上 其中該第一膠膜係為一透 其中該膠層係為一透明材 其中於步驟（c)之前更包括 、。又該晶圓及該框架在一第 3 ·如請求項1之晶圓刻印方法 明材質。 4·如請求項1之晶圓刻印方法 質。 5·如請求項丨之晶圓刻印方法 形成至少一定位點於該晶圓背面 6. =未項1之晶圓刻印方法，其中於步驟⑷中，該雷制 二配合相對於該晶圓另一側之—影像裝置同軸移動， 以元成刻印步驟。 7. =求項1之晶圓刻印方法，其中於步驟⑷之後更包相 “ $切割該晶圓以形成複數個晶片單元。 8. :請求項!之晶圓刻印方法，其中複數個凸塊設置於驾 日日圓之謗第一表面上。 ^月求項1之晶圓刻印方法，其中該框架係相對應於矣 晶圓之外形。 101594.doc 1269380 其中該框架係用以保護謗 其中該框架係用以作為該 ι〇·如請求項1之晶圓刻印方法， 晶圓以防破裂。 η·如請求項1之晶圓刻印方法， 雷射光定位用。 ▼ a ,六t在步驟（a)之後， 括研磨步驟’以薄化該晶圓。 另 13·=Γ項7之晶圓刻印方法，其中在步驟之⑷之後 分離該第-膠膜與該晶圓之步驟。 101594.doc
TW094139968A 2005-11-14 2005-11-14 Laser marking method for wafer TWI269380B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW094139968A TWI269380B (en) 2005-11-14 2005-11-14 Laser marking method for wafer
US11/543,195 US20070111346A1 (en) 2005-11-14 2006-10-05 Laser-marking method for a wafer

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Application Number Priority Date Filing Date Title
TW094139968A TWI269380B (en) 2005-11-14 2005-11-14 Laser marking method for wafer

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TWI269380B true TWI269380B (en) 2006-12-21
TW200719404A TW200719404A (en) 2007-05-16

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI395271B (zh) * 2007-01-31 2013-05-01 Alpha & Omega Semiconductor 一種採用化學鍍製造半導體裝置的方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8916416B2 (en) * 2007-09-25 2014-12-23 Stats Chippac, Ltd. Semiconductor device and method of laser-marking laminate layer formed over eWLB with tape applied to opposite surface
US7829384B2 (en) * 2007-09-25 2010-11-09 Stats Chippac, Ltd. Semiconductor device and method of laser-marking wafers with tape applied to its active surface

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6309943B1 (en) * 2000-04-25 2001-10-30 Amkor Technology, Inc. Precision marking and singulation method
JP2004514285A (ja) * 2000-11-17 2004-05-13 エムコア・コーポレイション 光抽出を改善するためのテーパーづけ側壁を有するレーザ分離ダイ
TWI241674B (en) * 2001-11-30 2005-10-11 Disco Corp Manufacturing method of semiconductor chip
US6652707B2 (en) * 2002-04-29 2003-11-25 Applied Optoelectronics, Inc. Method and apparatus for demounting workpieces from adhesive film
JP4471563B2 (ja) * 2002-10-25 2010-06-02 株式会社ルネサステクノロジ 半導体装置の製造方法
TWI242848B (en) * 2003-03-26 2005-11-01 Advanced Semiconductor Eng Chip scale package and method for marking the same
US6974726B2 (en) * 2003-12-30 2005-12-13 Intel Corporation Silicon wafer with soluble protective coating

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI395271B (zh) * 2007-01-31 2013-05-01 Alpha & Omega Semiconductor 一種採用化學鍍製造半導體裝置的方法

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Publication number Publication date
US20070111346A1 (en) 2007-05-17
TW200719404A (en) 2007-05-16

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