TW533520B - Multi-chip bonding method and apparatus - Google Patents

Multi-chip bonding method and apparatus Download PDF

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Publication number
TW533520B
TW533520B TW089124040A TW89124040A TW533520B TW 533520 B TW533520 B TW 533520B TW 089124040 A TW089124040 A TW 089124040A TW 89124040 A TW89124040 A TW 89124040A TW 533520 B TW533520 B TW 533520B
Authority
TW
Taiwan
Prior art keywords
substrate
wafer ring
bonding
wafer
electronic component
Prior art date
Application number
TW089124040A
Other languages
English (en)
Chinese (zh)
Inventor
Tsutomu Mimata
Osamu Kakutani
Original Assignee
Shinkawa Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinkawa Kk filed Critical Shinkawa Kk
Application granted granted Critical
Publication of TW533520B publication Critical patent/TW533520B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04Apparatus for manufacture or treatment
    • H10P72/0446Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/907Continuous processing

Landscapes

  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
TW089124040A 1999-12-24 2000-11-14 Multi-chip bonding method and apparatus TW533520B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP36616399A JP4128319B2 (ja) 1999-12-24 1999-12-24 マルチチップボンディング方法及び装置

Publications (1)

Publication Number Publication Date
TW533520B true TW533520B (en) 2003-05-21

Family

ID=18486081

Family Applications (1)

Application Number Title Priority Date Filing Date
TW089124040A TW533520B (en) 1999-12-24 2000-11-14 Multi-chip bonding method and apparatus

Country Status (4)

Country Link
US (1) US6383844B2 (https=)
JP (1) JP4128319B2 (https=)
KR (1) KR100400106B1 (https=)
TW (1) TW533520B (https=)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3667241B2 (ja) * 2001-03-09 2005-07-06 松下電器産業株式会社 ボンディング方法および装置
JP4800524B2 (ja) * 2001-09-10 2011-10-26 ルネサスエレクトロニクス株式会社 半導体装置の製造方法、及び、製造装置
JP4390503B2 (ja) * 2003-08-27 2009-12-24 パナソニック株式会社 部品実装装置及び部品実装方法
US7244636B2 (en) * 2005-10-19 2007-07-17 Texas Instruments Incorporated Semiconductor assembly for improved device warpage and solder ball coplanarity
EP1941536B8 (de) * 2005-10-26 2019-06-19 Kulicke and Soffa (Switzerland) Management GmbH Verfahren und vorrichtung zum ablegen von elektronischen bauteilen, insbesondere halbleiterchips, auf einem substrat
JP4714026B2 (ja) * 2006-01-10 2011-06-29 株式会社東芝 電子部品実装装置、電子部品実装方法及び電子部品装置
US7677431B2 (en) * 2006-10-19 2010-03-16 Asm Technology Singapore Pte Ltd. Electronic device handler for a bonding apparatus
KR100787968B1 (ko) 2007-02-13 2007-12-24 세광테크 주식회사 칩공급부가 구비된 cog 장치
EP2299486B1 (de) * 2009-09-18 2015-02-18 EV Group E. Thallner GmbH Verfahren zum Bonden von Chips auf Wafer
US8546802B2 (en) * 2011-11-07 2013-10-01 Taiwan Semiconductor Manufacturing Company, Ltd. Pick-and-place tool for packaging process
US9105760B2 (en) 2011-11-07 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Pick-and-place tool for packaging process
JP5959948B2 (ja) * 2012-06-13 2016-08-02 キヤノンマシナリー株式会社 ウエハリング交換装置およびチップ実装装置
JP5959949B2 (ja) * 2012-06-13 2016-08-02 キヤノンマシナリー株式会社 チップ実装装置
KR101422401B1 (ko) * 2013-04-03 2014-07-22 세메스 주식회사 발광 소자 칩 본딩 장치
TWI607587B (zh) * 2016-09-13 2017-12-01 台灣琭旦股份有限公司 固晶穩固製程
EP4681866A3 (en) * 2017-04-04 2026-04-29 Kulicke and Soffa Industries, Inc. Ultrasonic welding system and method of operating an ultrasonic welding system
CN109638142A (zh) * 2019-01-22 2019-04-16 先进光电器材(深圳)有限公司 晶环装置
CN118318289A (zh) * 2021-11-30 2024-07-09 邦德科技股份有限公司 晶片周部剥离装置、晶片供应装置、晶片供应系统、晶片接合系统、捡拾装置、晶片周部剥离方法、晶片供应方法、晶片接合方法及捡拾方法
CN115714101B (zh) * 2022-11-09 2023-11-14 长园半导体设备(珠海)有限公司 上料装置及切换方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5528397A (en) * 1991-12-03 1996-06-18 Kopin Corporation Single crystal silicon transistors for display panels
US5273622A (en) * 1991-01-28 1993-12-28 Sarcos Group System for continuous fabrication of micro-structures and thin film semiconductor devices on elongate substrates
JP2666788B2 (ja) * 1995-10-19 1997-10-22 日本電気株式会社 チップサイズ半導体装置の製造方法
JP3504543B2 (ja) * 1999-03-03 2004-03-08 株式会社日立製作所 半導体素子の分離方法およびその装置並びに半導体素子の搭載方法
US6312974B1 (en) * 2000-10-26 2001-11-06 Industrial Technology Research Institute Simultaneous bumping/bonding process utilizing edge-type conductive pads and device fabricated

Also Published As

Publication number Publication date
KR100400106B1 (ko) 2003-09-29
KR20010062479A (ko) 2001-07-07
US20010005602A1 (en) 2001-06-28
JP4128319B2 (ja) 2008-07-30
US6383844B2 (en) 2002-05-07
JP2001185565A (ja) 2001-07-06

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