TW486667B - Memory reference instructions for micro engine used in multithreaded parallel processor architecture - Google Patents

Memory reference instructions for micro engine used in multithreaded parallel processor architecture Download PDF

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Publication number
TW486667B
TW486667B TW089117910A TW89117910A TW486667B TW 486667 B TW486667 B TW 486667B TW 089117910 A TW089117910 A TW 089117910A TW 89117910 A TW89117910 A TW 89117910A TW 486667 B TW486667 B TW 486667B
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Taiwan
Prior art keywords
memory reference
parallel processor
processor architecture
engine used
micro engine
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TW089117910A
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English (en)
Inventor
Gilbert Wolrich
Matthew J Adiletta
William Wheeler
Debra Bernstein
Donald Hooper
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058—Conditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Image Processing (AREA)
  • Stored Programmes (AREA)
  • Harvester Elements (AREA)
  • Control Of Transmission Device (AREA)
  • Document Processing Apparatus (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Fittings On The Vehicle Exterior For Carrying Loads, And Devices For Holding Or Mounting Articles (AREA)

Description

486667 炎 _案號89117910_外年月</曰 修正_ 六、申請專利範圍 2 7.如申請專利範圍第1項所述之指令，其中該記憶體 是同步動態隨機存取記憶體（SDRAM)。 2 8.如申請專利範圍第1項所述之指令，其中該記憶體 是靜態隨機存取記憶體（SRAM )。 2 9.如申請專利範圍第1項所述之指令，其中該記憶體 是便條式記憶體。 3 0. —種運作處理器的方法，包括： 發佈命令至在執行於微程式引擎中的執行緒之間共享 的記憶體，每一個執行緒具有關聯的内容；以及 當該命令執行時，停止發佈該命令的該執行緒的該内 j 容之動作。 3 1.如申請專利範圍第3 0項所述之方法，其中該命令 包括： 設定在長字組中的使用者指定位元。 3 2.如申請專利範圍第3 0項所述之方法，其中該命令 包括： 清除在長字組中的使用者指定位元。 3 3.如申請專利範圍第3 0項所述之方法，其中該命令
包括： U
提供在該記憶體中的位址而影響改變。 U 3 4.如申請專利範圍第3 3項所述之方法，其中該命令 包括： 鎖住該記憶體。 3 5.如申請專利範圍第3 4項所述之方法，其中該命令
1057-3418-PFl.ptc 第43頁 486667 疹正 _案號 89117910 六、申請專利範圍 進一步地包括： 從該位址讀取至關聯於該微程式引擎的移轉暫存器。 3 6.如申請專利範圍第3 3項所述之方法，進一步地包 括： 解除鎖住該記憶體；以及 從關聯於該微程式引擎的移轉暫存器寫入至該位址。
1057-3418-PFl.ptc 第44頁
TW089117910A 1999-09-01 2000-10-18 Memory reference instructions for micro engine used in multithreaded parallel processor architecture TW486667B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15196199P 1999-09-01 1999-09-01

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TW486667B true TW486667B (en) 2002-05-11

Family

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Family Applications (11)

Application Number Title Priority Date Filing Date
TW089117903A TW559729B (en) 1999-09-01 2000-09-01 Instruction for multithreaded parallel processor
TW089117904A TW475148B (en) 1999-09-01 2000-10-18 Branch instruction for processor architecture
TW089117900A TW486666B (en) 1999-09-01 2000-10-18 Register set used in multithreaded parallel processor architecture
TW089117902A TW571239B (en) 1999-09-01 2000-10-18 Branch instruction for multithreaded processor
TW089117911A TW548584B (en) 1999-09-01 2000-10-18 Fast write instruction for micro engine used in multithreaded parallel processor architecture
TW089117906A TWI221251B (en) 1999-09-01 2000-10-18 Branch instruction for processor
TW089117905A TW569133B (en) 1999-09-01 2000-10-18 Branch instruction for processor
TW089117910A TW486667B (en) 1999-09-01 2000-10-18 Memory reference instructions for micro engine used in multithreaded parallel processor architecture
TW089117901A TWI220732B (en) 1999-09-01 2000-10-18 Local register instruction for micro engine used in multithreaded parallel processor architecture
TW089117912A TW546585B (en) 1999-09-01 2000-10-18 Method of operating a processor and computer program product
TW089117907A TW594562B (en) 1999-09-01 2000-10-18 Branch instruction for processor

Family Applications Before (7)

Application Number Title Priority Date Filing Date
TW089117903A TW559729B (en) 1999-09-01 2000-09-01 Instruction for multithreaded parallel processor
TW089117904A TW475148B (en) 1999-09-01 2000-10-18 Branch instruction for processor architecture
TW089117900A TW486666B (en) 1999-09-01 2000-10-18 Register set used in multithreaded parallel processor architecture
TW089117902A TW571239B (en) 1999-09-01 2000-10-18 Branch instruction for multithreaded processor
TW089117911A TW548584B (en) 1999-09-01 2000-10-18 Fast write instruction for micro engine used in multithreaded parallel processor architecture
TW089117906A TWI221251B (en) 1999-09-01 2000-10-18 Branch instruction for processor
TW089117905A TW569133B (en) 1999-09-01 2000-10-18 Branch instruction for processor

Family Applications After (3)

Application Number Title Priority Date Filing Date
TW089117901A TWI220732B (en) 1999-09-01 2000-10-18 Local register instruction for micro engine used in multithreaded parallel processor architecture
TW089117912A TW546585B (en) 1999-09-01 2000-10-18 Method of operating a processor and computer program product
TW089117907A TW594562B (en) 1999-09-01 2000-10-18 Branch instruction for processor

Country Status (10)

Country Link
US (1) US7421572B1 (zh)
EP (7) EP1236092A4 (zh)
CN (7) CN1184562C (zh)
AT (2) ATE475930T1 (zh)
AU (11) AU7340700A (zh)
CA (7) CA2386562A1 (zh)
DE (2) DE60044752D1 (zh)
HK (8) HK1046049A1 (zh)
TW (11) TW559729B (zh)
WO (8) WO2001016713A1 (zh)

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