SE0403128D0 - A method for a processor, and a processor - Google Patents

A method for a processor, and a processor

Info

Publication number
SE0403128D0
SE0403128D0 SE0403128A SE0403128A SE0403128D0 SE 0403128 D0 SE0403128 D0 SE 0403128D0 SE 0403128 A SE0403128 A SE 0403128A SE 0403128 A SE0403128 A SE 0403128A SE 0403128 D0 SE0403128 D0 SE 0403128D0
Authority
SE
Sweden
Prior art keywords
processor
Prior art date
Application number
SE0403128A
Other languages
English (en)
Inventor
Thomas Boden
Jakob Carlstroem
Original Assignee
Xelerated Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xelerated Ab filed Critical Xelerated Ab
Priority to SE0403128A priority Critical patent/SE0403128D0/sv
Publication of SE0403128D0 publication Critical patent/SE0403128D0/sv
Priority to TW94132516A priority patent/TWI394078B/zh
Priority to CNB2005800445729A priority patent/CN100570551C/zh
Priority to PCT/SE2005/001969 priority patent/WO2006068595A1/en
Priority to US11/722,470 priority patent/US8250231B2/en
Priority to US13/585,871 priority patent/US8977774B2/en

Links

SE0403128A 2004-12-22 2004-12-22 A method for a processor, and a processor SE0403128D0 (sv)

Priority Applications (6)

Application Number Priority Date Filing Date Title
SE0403128A SE0403128D0 (sv) 2004-12-22 2004-12-22 A method for a processor, and a processor
TW94132516A TWI394078B (zh) 2004-12-22 2005-09-20 用於一處理器之方法及一處理器
CNB2005800445729A CN100570551C (zh) 2004-12-22 2005-12-20 用于降低流水线处理器中缓冲容量的方法
PCT/SE2005/001969 WO2006068595A1 (en) 2004-12-22 2005-12-20 A method for reducing buffer capacity in a pipeline processor
US11/722,470 US8250231B2 (en) 2004-12-22 2005-12-20 Method for reducing buffer capacity in a pipeline processor
US13/585,871 US8977774B2 (en) 2004-12-22 2012-08-15 Method for reducing buffer capacity in a pipeline processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE0403128A SE0403128D0 (sv) 2004-12-22 2004-12-22 A method for a processor, and a processor

Publications (1)

Publication Number Publication Date
SE0403128D0 true SE0403128D0 (sv) 2004-12-22

Family

ID=34075257

Family Applications (1)

Application Number Title Priority Date Filing Date
SE0403128A SE0403128D0 (sv) 2004-12-22 2004-12-22 A method for a processor, and a processor

Country Status (3)

Country Link
CN (1) CN100570551C (sv)
SE (1) SE0403128D0 (sv)
TW (1) TWI394078B (sv)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105474168B (zh) 2014-06-30 2018-03-09 华为技术有限公司 网络装置执行的数据处理方法和相关设备
CN108628277B (zh) * 2018-08-16 2020-07-24 珠海格力智能装备有限公司 工作站的分配处理方法及装置、系统

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1021143C (zh) * 1985-10-19 1993-06-09 霍尼韦尔布尔公司 多处理机公用的流水线超高速缓冲存储器
JPH11272627A (ja) * 1998-03-23 1999-10-08 Nec Corp パイプライン型マルチプロセッサシステム
AU7099000A (en) * 1999-09-01 2001-03-26 Intel Corporation Branch instruction for processor
US6757249B1 (en) * 1999-10-14 2004-06-29 Nokia Inc. Method and apparatus for output rate regulation and control associated with a packet pipeline
US7155570B1 (en) * 2000-09-29 2006-12-26 Intel Corporation FIFO write/LIFO read trace buffer with software and hardware loop compression
KR100800958B1 (ko) * 2001-10-04 2008-02-04 주식회사 케이티 토큰 버켓을 이용한 트래픽 플로우 제어 방법

Also Published As

Publication number Publication date
CN101088065A (zh) 2007-12-12
CN100570551C (zh) 2009-12-16
TW200632741A (en) 2006-09-16
TWI394078B (zh) 2013-04-21

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