DE602005021239D1 - Prozessor - Google Patents

Prozessor

Info

Publication number
DE602005021239D1
DE602005021239D1 DE602005021239T DE602005021239T DE602005021239D1 DE 602005021239 D1 DE602005021239 D1 DE 602005021239D1 DE 602005021239 T DE602005021239 T DE 602005021239T DE 602005021239 T DE602005021239 T DE 602005021239T DE 602005021239 D1 DE602005021239 D1 DE 602005021239D1
Authority
DE
Germany
Prior art keywords
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005021239T
Other languages
English (en)
Inventor
Kazushi Kurata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Publication of DE602005021239D1 publication Critical patent/DE602005021239D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
DE602005021239T 2004-09-17 2005-06-01 Prozessor Active DE602005021239D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004272096 2004-09-17
PCT/JP2005/010046 WO2006030564A1 (ja) 2004-09-17 2005-06-01 プロセッサ

Publications (1)

Publication Number Publication Date
DE602005021239D1 true DE602005021239D1 (de) 2010-06-24

Family

ID=36059825

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005021239T Active DE602005021239D1 (de) 2004-09-17 2005-06-01 Prozessor

Country Status (6)

Country Link
US (1) US8042116B2 (de)
EP (1) EP1811375B1 (de)
JP (1) JP4170364B2 (de)
CN (1) CN100440153C (de)
DE (1) DE602005021239D1 (de)
WO (1) WO2006030564A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1868094B1 (de) * 2006-06-12 2016-07-13 Samsung Electronics Co., Ltd. Multitasking-verfahren und -vorrichtung für ein rekonfigurierbares array
US8694999B2 (en) * 2006-12-07 2014-04-08 Wind River Systems, Inc. Cooperative scheduling of multiple partitions in a single time window
JP5061671B2 (ja) * 2007-03-15 2012-10-31 富士通株式会社 演算プログラム、分散処理プログラム、分散処理システムおよび演算処理方法
US8407715B2 (en) * 2007-04-30 2013-03-26 National Tsing Hua University Live range sensitive context switch procedure comprising a plurality of register sets associated with usage frequencies and live set information of tasks
JP5433676B2 (ja) * 2009-02-24 2014-03-05 パナソニック株式会社 プロセッサ装置、マルチスレッドプロセッサ装置
US10303575B2 (en) * 2017-01-10 2019-05-28 International Business Machines Corporation Time-slice-instrumentation facility
CN109947548B (zh) * 2019-03-15 2020-11-20 美智光电科技股份有限公司 分配时间片的方法和装置及控制任务执行的方法和装置

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59146387A (ja) 1983-02-10 1984-08-22 Fujitsu Ltd マルチプロセスにおけるスタツク制御方式
JPH02148223A (ja) * 1988-11-30 1990-06-07 Toshiba Corp レジスタ退避復活装置
GB2234613B (en) * 1989-08-03 1993-07-07 Sun Microsystems Inc Method and apparatus for switching context of state elements in a microprocessor
KR960001273B1 (ko) * 1991-04-30 1996-01-25 가부시키가이샤 도시바 단일칩 마이크로컴퓨터
JPH0830562A (ja) 1994-07-19 1996-02-02 Nec Corp マルチプロセッサシステム
US5857102A (en) * 1995-03-14 1999-01-05 Sun Microsystems, Inc. System and method for determining and manipulating configuration information of servers in a distributed object environment
JPH096633A (ja) * 1995-06-07 1997-01-10 Internatl Business Mach Corp <Ibm> データ処理システムに於ける高性能多重論理経路の動作用の方法とシステム
JPH1011301A (ja) 1996-06-25 1998-01-16 Masaharu Imai マルチタスク処理装置及びマルチタスク処理制御方法
US5933627A (en) * 1996-07-01 1999-08-03 Sun Microsystems Thread switch on blocked load or store using instruction thread field
JPH1139171A (ja) 1997-07-18 1999-02-12 Masaharu Imai マルチタスク処理装置、マルチタスク処理制御方法及び制御プログラム記憶媒体
US6697935B1 (en) * 1997-10-23 2004-02-24 International Business Machines Corporation Method and apparatus for selecting thread switch events in a multithreaded processor
US6408325B1 (en) * 1998-05-06 2002-06-18 Sun Microsystems, Inc. Context switching technique for processors with large register files
US6266781B1 (en) * 1998-07-20 2001-07-24 Academia Sinica Method and apparatus for providing failure detection and recovery with predetermined replication style for distributed applications in a network
US7748005B2 (en) * 2000-01-28 2010-06-29 Hewlett-Packard Development Company, L.P. System and method for allocating a plurality of resources between a plurality of computing domains
US6931641B1 (en) * 2000-04-04 2005-08-16 International Business Machines Corporation Controller for multiple instruction thread processors
US6684342B1 (en) 2000-06-22 2004-01-27 Ubicom, Inc. Apparatus and method of dynamic and deterministic changes in clock frequency for lower power consumption while maintaining fast interrupt handling
JP2002132517A (ja) 2000-10-18 2002-05-10 Canon Inc 電子機器、カメラおよび視線入力装置
US7516191B2 (en) * 2001-03-26 2009-04-07 Salesforce.Com, Inc. System and method for invocation of services
US7000100B2 (en) * 2001-05-31 2006-02-14 Hewlett-Packard Development Company, L.P. Application-level software watchdog timer
US7136991B2 (en) * 2001-11-20 2006-11-14 Henry G Glenn Microprocessor including random number generator supporting operating system-independent multitasking operation
JP3813930B2 (ja) 2002-01-09 2006-08-23 松下電器産業株式会社 プロセッサ及びプログラム実行方法
US7340740B2 (en) 2003-04-22 2008-03-04 International Business Machines Corporation Cooperatively multitasking in an interrupt free computing environment
JP2005301791A (ja) * 2004-04-14 2005-10-27 Nec Corp 移動通信端末および移動通信端末のアプリケーション起動制御方法

Also Published As

Publication number Publication date
CN100440153C (zh) 2008-12-03
EP1811375B1 (de) 2010-05-12
CN101027642A (zh) 2007-08-29
WO2006030564A1 (ja) 2006-03-23
US20080256542A1 (en) 2008-10-16
EP1811375A1 (de) 2007-07-25
JPWO2006030564A1 (ja) 2008-05-08
JP4170364B2 (ja) 2008-10-22
US8042116B2 (en) 2011-10-18
EP1811375A4 (de) 2009-01-07

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Legal Events

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8364 No opposition during term of opposition