TW480737B - Solar cell and method of manufacture thereof - Google Patents

Solar cell and method of manufacture thereof Download PDF

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TW480737B
TW480737B TW089125455A TW89125455A TW480737B TW 480737 B TW480737 B TW 480737B TW 089125455 A TW089125455 A TW 089125455A TW 89125455 A TW89125455 A TW 89125455A TW 480737 B TW480737 B TW 480737B
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Taiwan
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semiconductor layer
insulating film
solar cell
convex portion
layer
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TW089125455A
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Chinese (zh)
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Hiroyuki Ohtsuka
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Shinetsu Handotai Kk
Shinetsu Chemical Co
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells

Abstract

A solar cell (100) includes a semiconductor substrate (1) with irregularities on its principal surface covered with an insulating layer (3) such that it covers some of the projections of the irregularities, that is, uncovered areas (5) are formed on the principal surface. An output electrode (7) is connected directly, or through a conducting layer, with tops (25) of projections (15) in the exposed semiconductor areas (5). The exposed semiconductor areas (5) is formed by applying insulating film (3) to cover projections (15) on the principal surface of the semiconductor substrate (1), applying etch resist (4) to cover the insulating film (3) in the areas except the peaks (25) of the projections (15), and etching the insulating film (3) to expose the peaks (25) of the projections (15).

Description

480737 A7 ___ B7 五、發明說明（/ ) 〔技術領域〕 本發明係關於光電轉換效率高、且能以低成本來製作 出之太陽能電池及其製造方法。 〔背景技術〕 太陽能電池，是能將光能轉變成電力的半導體元件， 有p - η接合形、pin形、宵特基形等，而以p — n接合形的 應用最廣泛。若以基板材料來將太陽能電池分類，則可大 致區分成矽結晶系太陽能電池、非晶質矽系太陽能電池、 化合物半導體系太陽能電池等3種。矽結晶系太陽能電池 ’又可再分成單結晶系太陽能電池和多結晶系太陽能電池 。這些太陽能電池中，能量轉換效率最高的是化合物半導 體系太陽能電池，但因化合物半導體系太陽能電池，要製 作其材料之化合物半導體非常困難，基於太陽能電池基板 的製造成本考量，有難以普及的問題，而使其用途受到限 制。另一方面，轉換效率僅次於化合物半導體太陽能電池 者，係矽單結晶系太陽能電池，由於太陽能電池用的矽單 結晶基板較容易製造，因此其成爲一般普及之太陽能電池 的主力。 太陽能電池的輸出特性，一般係將圖18所示的輸出電 流電壓曲線，藉由使用太陽模擬器的測定來作評價。該曲 線上，將輸出電流Ip和輸出電壓Vp的乘積Ip · Vp爲最 大之點Pm稱作最大輸出Pm，將該Pm除以入射太陽能電 池的總光能（SXI : S爲元件面積，I爲照射的光強度)所得 的値： 3 本紙張足度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) φ裝 丨線. 經濟部智慧財產局員工消費合作社印製 五、發明說明（ A7 B7 77 E { Pm/(SXI)} XlOO(〇/0) ·.·⑴ 疋我成太陽sg電池的轉換效率々。從圖18可看出，爲提高 轉換效率77，將短路電流Isc(m流電壓曲線± v=〇時的輸 出電流値)或開路電壓Voc(電流電壓曲線上1=〇時的輸出電 壓値伽大’以及麵出電流物曲_爲髓趨近方形的 形狀乃是顏的。X ’輸出電流電壓曲線之方形的程度，480737 A7 ___ B7 V. Description of the Invention (/) [Technical Field] The present invention relates to a solar cell that has high photoelectric conversion efficiency and can be manufactured at low cost, and a method for manufacturing the same. [Background Art] Solar cells are semiconductor elements that can convert light energy into electricity. There are p-η junction, pin, and Schottky, and the most widely used is p-n junction. When the solar cells are classified by the substrate material, they can be roughly divided into three types: silicon crystalline solar cells, amorphous silicon solar cells, and compound semiconductor solar cells. Silicon crystalline solar cells ′ can be subdivided into single crystalline solar cells and polycrystalline solar cells. Among these solar cells, the compound with the highest energy conversion efficiency is a compound semiconductor-based solar cell. However, since the compound semiconductor-based solar cell is very difficult to make a compound semiconductor of the material, it is difficult to popularize it based on the manufacturing cost of the solar cell substrate. Its use is limited. On the other hand, the conversion efficiency is second only to compound semiconductor solar cells. It is a silicon single crystal solar cell. Since the silicon single crystal substrate for solar cells is easier to manufacture, it has become the main force of solar cells in general. The output characteristics of a solar cell are generally evaluated by measuring the output current voltage curve shown in Fig. 18 using a solar simulator. On this curve, the point where the product Ip · Vp of the output current Ip and the output voltage Vp is the largest is called the maximum output Pm, and this Pm is divided by the total light energy of the incident solar cell (SXI: S is the element area and I is The intensity of the light emitted): 3 This paper is fully compliant with China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) Printed by the Intellectual Property Bureau's Consumer Cooperatives V. Invention Description (A7 B7 77 E {Pm / (SXI)} X100 (0/0) ··· ⑴ 疋 I become the conversion efficiency of solar sg batteries々. You can see from Figure 18 In order to improve the conversion efficiency, 77, the short-circuit current Isc (the output current when the m-current voltage curve ± v = 値) or the open-circuit voltage Voc (the output voltage when the current-voltage curve is 1 〇 値 Gamma 'and the surface voltage The current curve is the shape of the square shape of the marrow. X 'The degree of squareness of the output current-voltage curve,

般藉以 FF & 經濟部智慧財產局員工消費合作社印製 ^-_JxVpm/(IscXV〇c) ...(2) 所定義的子賴價，該FF麵觀丨_電流霄 壓曲線越趨醜想的方形，_代麵㈣率”越高。 例如’雜晶歡陽能電池中，爲防止輸出取出用的 顏電極和砂層的直接接觸部之電電洞的再結合翻 闻開路電壓Voc，係採用在矽層袠面形成si〇2等絕緣膜的 構造(所謂MIS接觸或接觸鈍化）。然而，若在矽層整個_ 面都用上述般的絕緣膜被覆，所發生之光電流將因隧穿穷 應而必須通過該絕緣膜，而將降低光電流收集率，將變捐 無法充分提昇轉換效率。 爲防止這個情形所採行的方法，是在絕緣膜的一部分 設置小型接觸窗，在此處形成金屬電極，以將作爲再結合 場所來作用之金屬電極和矽層的直接接觸部限制於微小區 域，藉以提昇光電流收集率。這時，所面臨的問題是如何 在絕緣膜上形成接觸窗。例如，實驗室內可考慮的方法， 是使用光阻劑等，藉由蝕刻絕緣膜來形成'接觸窗。然而， 由於該方法利用到光微影(photo lithography)技術，故相當 本紙張A度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) :裝 · •線- 480737 A7 __B7 五、發明說明（B ) 耗費工時和成本，基於太陽能電池之量產觀點並不符實際 〇 (請先閱讀背面之注意事項再填寫本頁) 於是，日本專利特開平8 - 33571 1號公報中提案一不 使用光微影技術之接觸窗形成方法。具體而言，係藉由網 版印刷導電性糊料來在絕緣膜上形成輸出取出用金屬電極 的圖案，接著加以燒成。糊料內所含的金屬和玻璃的燒料 (frit)會受熱熔融’並突破絕緣膜而到達射極層，藉以形成 接觸窗。該手法一般稱爲衝破（fire through)，由於能簡單 地形成接觸窗，故被廣泛地利用於單結晶或多結晶太陽能 電池的製作。 經濟部智慧財產局員工消費合作社印製 然而，依據衝破方式之太陽能電池製作方法，表面η 型層之射極層的摻質濃度須設成較高。此乃基於，當射極 層的摻質濃度低時，衝破所形成之金屬和矽的直接接觸部 之接觸電阻無法充分降低，接觸電阻損失將變大，而造成 所取出的電力變小之故。然而，若利用擴散來提高射極層 的摻質濃度，將析出半導體矽和摻質的化合物，在表面形 成許多缺陷位準，而使表面再結合速度變大。若變成這種 狀態，太陽能電池的短波長感度會變低，而產生取出電流 變小的問題。 另一方面，爲提昇太陽能電池的轉換效率；7，儘量減 小輸出取出用金屬電極的形成寬度，以謀求遮蔽損失 (shadowing loss)的減低也是相當重要的。然而，在衝破方 式下，由於電極是藉網版印刷來形成，要將電極寬縮到極 小在原理上會有困難，結果爲減低遮蔽損失，不得不加寬 5 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 B7 五、發明說明（夺） (請先閱讀背面之注意事項再填寫本頁) 複數條電極的排列間隔。若加寬電極的排列間隔，在電流 取出時，薄射極層內之橫方向通電距離變長，射極電阻損 失變大，而造成轉換效率7?減低。基於這些理由，要採用 衝破方法來製作出轉換效率7?良好的太陽能電池、例如77 超過20%之太陽能電池，被認爲是相當的困難。 本發明的課題，係提供一轉換效率高且能以低成本來 製造出之太陽能電池、及其製造方法。 〔發明之揭示〕 爲解決上述課題，本發明的太陽能電池之第一構成， 係在半導體基板的主表面形成凹凸部，並用絕緣膜被覆該 主表面；其特徵在於： 在主表面形成未被絕緣膜被覆之半導體層露出區域(包 含凹凸部的至少部分凸部的頂部），在該半導體層露出區域 內之凸部頂部的頂端高度位置，係比該半導體層露出區域 的外周緣之絕緣膜的最大高度位置爲高，且在半導體層露 出區域內的凸部之頂部上，以直接或透過其他導電層來間 接接觸的方式形成輸出取出用電極。 經濟部智慧財產局員工消費合作社印製 本說明書中之半導體基板的主表面，係代表半導體基 板的厚度方向上之兩面（表、裏面）之至少一面。因此，凹 凸部可僅形成於基板的一主表面，或形成於兩面上。又， 本說明書中之半導體層露出區域，其槪念當然包含絕緣膜 完全除去的情形，但也包含殘存著通道電流能流過的厚度 (3nm以下）的絕緣膜的情形。 上述第一構成的太陽能電池，是在半導體基板的主表 6 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製 480737 A7 B7 五、發明說明（女） 面形成凹凸部。如此般之凹凸部形成，主要是基於防止反 射損失的目的，而在以往的矽單結晶太陽能電池也採用著 。然而，本發明中之上述凹凸部，不僅基於防止反射損失 的觀點，將其特有的形態利用在半導體層露出區域(作爲輸 出取出用電極和半導體層的接觸窗來作用）的形成上，乃是 其特徵所在。具體而言，如圖19A所例示般，將該半導體 層露出區域5以包含凸部15的頂部25的方式來形成，且 使該凸部15的頂端高度位置，比半導體層露出區域5的外 周緣之絕緣膜3的最大高度位置爲高。又，在半導體層露 出區域5內的凸部15之頂部25上，以直接(或透過其他導 電層而間接地)接觸之方式來形成輸出取出用電極7。 例如，以往的太陽能電池中，光微影或衝破所形成之 接觸窗’如圖19B所示般，半導體層露出區域5是採形成 接觸窗的底面之形式，故露出區域5內的半導體層2比周 圍的絕緣膜3上緣更突出一事，是絕不可能發生的。基於 這點可知，本發明的第一太陽能電池構造，和以往的太陽 能電池構造乃是截然不同。又，藉由採用這種構造所帶來 的好處’是用以下所示的本發明之太陽能電池製造方法就 能極簡單地形成出。 亦即’該方法之特徵爲包含以下步驟： 在半導體基板的主表面形成凹凸部； 在凹凸部之凸部頂部以外區域，將絕緣膜用蝕刻保護 膜被覆； 藉蝕刻來除去凸部頂部的絕緣膜，以形成未被絕緣膜 7 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) · 線_ 480737 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（έ ) 被覆之半導體層露出區域(包含部分凸部的頂部）； 在半導體層露出區域的凸部之頂部上，以直接或透過 其他導電層之間接的方式，來形成輸出取出用電極。 本發明的太陽能電池之第二構成，係依據上述製法的 觀點來抓住本發明的太陽能電池之特徵而成，係在半導體 基板的主表面形成凹凸部，並用絕緣膜被覆該主表面，在 主表面形成未被絕緣膜被覆之半導體層露出區域(包含凹凸 部的至少部分凸部的頂部），且在半導體層露出區域內的凸 部之頂部上，以直接或透過其他導電層來間接接觸的方式 形成輸出取出用電極；其特徵在於： 半導體層露出區域，係將半導體基板的主表面，以包 含凹凸部的形式被覆絕緣膜，並將凸部的頂部以外區域之 絕緣膜用蝕刻保護膜被覆，之後藉蝕刻來除去凸部頂部的 絕緣膜，藉以形成出。 依據上述方法，對圖4A所示之半導體基板1的主表 面，如圖4B所示般形成蝕刻保護膜4，其係被覆住除該主 表面上所形成之凸部15的頂部25以外的區域，換言之， 將凸部15掩埋到其高度的一半，而僅讓其頂部突出。又如 圖4C所示般，之後施以蝕刻，以僅選擇性地除去從蝕刻 保護膜4突出之凸部15的頂部25的絕緣膜3。其結果， ΠΓ-χΐ 即以包含凸部15的頂部25之形式來形成該半導體層露& 區域5。如圖4D所示般，該凸部15的頂端高度位置，_ 半導體層露出區域5外周緣的絕緣膜3之最大高度位置If 爲高。 8 (請先閱讀背面之注意事項再填寫本頁)In general, printed by the FF & Intellectual Property Bureau's Consumer Cooperatives of the Ministry of Economic Affairs ^ -_ JxVpm / (IscXV〇c) ... (2) as defined by the sub-price, the FF surface 丨 _ the current pressure curve becomes uglier The higher the square shape you want, the higher the "generation rate." For example, in the "hybrid crystal Huanyang battery", in order to prevent the combination of the electrode and the hole of the sand layer in the direct contact of the output electrode, the open circuit voltage Voc is heard. It adopts a structure in which an insulating film such as SiO2 is formed on the silicon surface (so-called MIS contact or contact passivation). However, if the entire surface of the silicon layer is covered with the above-mentioned insulating film, the photocurrent generated will be caused by the tunnel. It is necessary to pass through the insulating film when it is worn out, which will reduce the photocurrent collection rate, and it will not fully improve the conversion efficiency. The method adopted to prevent this situation is to install a small contact window on a part of the insulating film, here Metal electrodes are formed everywhere to limit the direct contact between the metal electrode acting as a recombination site and the silicon layer to a small area, thereby improving the photocurrent collection rate. At this time, the problem is how to form a contact window on the insulating film .example For example, a method that can be considered in the laboratory is to use a photoresist, etc. to form a 'contact window' by etching an insulating film. However, this method uses photo lithography technology, so it is equivalent to A degree of paper Applicable to China National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling out this page): Installation · • Line-480737 A7 __B7 V. Description of the invention (B) Consumes man-hours and costs Based on the viewpoint of mass production of solar cells, it is not realistic. (Please read the precautions on the back before filling in this page.) Therefore, in Japanese Patent Laid-Open No. 8-33571 No. 1 proposes a contact window formation without using photolithography technology. Method. Specifically, a conductive paste is screen-printed to form a pattern of a metal electrode for output extraction on an insulating film, followed by firing. The metal and glass contained in the paste are frit. It will be melted by heat and break through the insulating film to reach the emitter layer, thereby forming a contact window. This method is generally called fire through. Since it can simply form a contact window, it is widely used for single crystals. Production of polycrystalline solar cells. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. However, according to the method of making solar cells in a bursting manner, the dopant concentration of the emitter layer on the surface η-type layer must be set to a high value. When the dopant concentration of the emitter layer is low, the contact resistance of the direct contact between the formed metal and the silicon can not be sufficiently reduced, the contact resistance loss will increase, and the power taken out will be small. However, if Diffusion is used to increase the dopant concentration of the emitter layer. Semiconductor silicon and dopant compounds will be precipitated, and many defect levels will be formed on the surface, which will increase the surface recombination speed. If this state is changed, the short wavelength of the solar cell Sensitivity becomes low, and there is a problem that the extraction current becomes small. On the other hand, in order to improve the conversion efficiency of the solar cell; 7, it is also important to reduce the formation width of the metal electrode for output extraction as much as possible in order to reduce the shadowing loss. However, in the punching method, since the electrodes are formed by screen printing, it will be difficult in principle to reduce the electrode width to a minimum. As a result, to reduce the shielding loss, it is necessary to widen 5 paper standards to apply Chinese national standards ( CNS) A4 specification (210 X 297 mm) 480737 A7 B7 V. Description of the invention (read) (Please read the precautions on the back before filling this page) The arrangement interval of multiple electrodes. If the arrangement interval of the electrodes is widened, when the current is taken out, the lateral conduction distance in the thin emitter layer becomes longer, the emitter resistance loss becomes larger, and the conversion efficiency is reduced by 7 ?. For these reasons, it is considered to be quite difficult to adopt a breakthrough method to produce a solar cell with a good conversion efficiency of 7 ?, such as a solar cell with more than 77%. An object of the present invention is to provide a solar cell which has high conversion efficiency and can be manufactured at low cost, and a method for manufacturing the same. [Disclosure of the Invention] In order to solve the above-mentioned problems, the first configuration of the solar cell of the present invention is to form an uneven portion on a main surface of a semiconductor substrate, and cover the main surface with an insulating film; The exposed area of the semiconductor layer covered by the film (the top of at least a part of the convex portion including the uneven portion) is higher than the height of the top of the convex portion in the exposed area of the semiconductor layer, which is higher than that of the insulating film at the outer periphery of the exposed area of the semiconductor layer The maximum height position is high, and an output extraction electrode is formed on the top of the convex portion in the exposed region of the semiconductor layer, either directly or indirectly through other conductive layers. Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives. The main surface of the semiconductor substrate in this manual represents at least one of the two sides (table, back) in the thickness direction of the semiconductor substrate. Therefore, the concave-convex portion may be formed on only one main surface of the substrate or on both surfaces. It should be noted that the exposed region of the semiconductor layer in this specification includes a case where the insulating film is completely removed, but also a case where an insulating film having a thickness (3 nm or less) through which a channel current can flow remains. The above-mentioned solar cell of the first composition is on the main sheet of the semiconductor substrate. 6 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm). Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 480737 A7 B7 5. DESCRIPTION OF THE INVENTION The (female) surface forms unevenness. The formation of such uneven portions is mainly for the purpose of preventing reflection loss, and it has also been used in conventional silicon single crystal solar cells. However, the above-mentioned uneven portion in the present invention is not only based on the viewpoint of preventing reflection loss, but also uses its unique form to form the exposed area of the semiconductor layer (acting as a contact window between the output extraction electrode and the semiconductor layer). Its characteristics. Specifically, as illustrated in FIG. 19A, the semiconductor layer exposed region 5 is formed so as to include the top portion 25 of the convex portion 15, and the height of the top end of the convex portion 15 is set higher than the outer periphery of the semiconductor layer exposed region 5. The maximum height position of the edge insulating film 3 is high. In addition, the output extraction electrode 7 is formed on the top portion 25 of the convex portion 15 in the semiconductor layer exposed region 5 so as to be in direct contact (or indirectly through another conductive layer). For example, in a conventional solar cell, the contact window formed by photolithography or bursting is shown in FIG. 19B. The exposed region 5 of the semiconductor layer is in the form of the bottom surface of the contact window. Therefore, the semiconductor layer 2 in the exposed region 5 is exposed. It is impossible for the edge of the insulating film 3 to protrude more than that. Based on this, it can be seen that the first solar cell structure of the present invention is completely different from the conventional solar cell structure. In addition, the advantage brought by adopting this structure is extremely simple to be formed by the solar cell manufacturing method of the present invention shown below. That is, the method is characterized in that it includes the following steps: forming a concave-convex portion on the main surface of the semiconductor substrate; covering the insulating film with an etching protection film in a region other than the top of the convex portion of the concave-convex portion; and removing the insulation at the top of the convex portion by etching. Film to form a non-insulating film 7 This paper is sized to the Chinese National Standard (CNS) A4 (210 X 297 mm) (please read the precautions on the back before filling this page) · Wire _ 480737 A7 B7 Ministry of Economy Wisdom Printed by the Consumers' Cooperative of the Property Bureau V. Description of the Invention (hand) Covered semiconductor layer exposed area (including part of the top of the convex part); on the top of the convex part of the exposed area of the semiconductor layer, directly or through other conductive layers Method to form an output extraction electrode. The second structure of the solar cell of the present invention is based on the characteristics of the solar cell of the present invention in accordance with the viewpoint of the above-mentioned manufacturing method. The main surface of the semiconductor substrate is formed with uneven portions, and the main surface is covered with an insulating film. The surface of the semiconductor layer exposed area (the top of at least a part of the convex portion including the uneven portion) is formed on the surface, and the top of the convex portion in the semiconductor layer exposed area is directly or indirectly contacted through another conductive layer. The output take-out electrode is formed in a manner that is characterized in that: the exposed area of the semiconductor layer covers the main surface of the semiconductor substrate with an insulating film including concave-convex portions, and covers the insulating film in areas other than the top of the convex portion with an etching protection film. Then, the insulating film on the top of the convex portion is removed by etching to form a film. According to the above method, an etching protection film 4 is formed on the main surface of the semiconductor substrate 1 shown in FIG. 4A as shown in FIG. 4B, which covers an area other than the top 25 of the convex portion 15 formed on the main surface. In other words, the convex portion 15 is buried to half its height, and only the top portion thereof is protruded. As shown in FIG. 4C, etching is subsequently performed to selectively remove only the insulating film 3 on the top 25 of the convex portion 15 protruding from the etching protection film 4. As a result, ΠΓ-χΐ forms the semiconductor layer dew & region 5 as a top portion 25 including the convex portion 15. As shown in FIG. 4D, the height position of the top end of the convex portion 15 and the maximum height position If of the insulating film 3 at the outer periphery of the semiconductor layer exposed region 5 are high. 8 (Please read the notes on the back before filling this page)

訂： 線· 本紙張尺度適用中國國家標準（CNS)A4規格（210x297^17 經濟部智慧財產局員工消費合作社印製 480737 A7 B7 五、發明說明（]) 鈾刻保護膜4，可使用不具感光性之汎用高分子耐蝕 劑，爲形成上述被覆狀態，只要適當設定蝕刻保護膜4的 形成厚度即可，一旦形成該被覆狀態，例如只要將基板浸 在適當的蝕刻液內即可簡單地形成半導體層露出區域5。 因此，麻煩且耗費工時之光微影技術變得完全不需要，當 然，由於衝破也變得不需要，就算提高基板表面的摻質濃 度仍能獲得良好的電阻式接觸。藉此，可提昇太陽能電池 的曲線因子。又，由於能降低表面的摻質濃度，故能增大 太陽能電池的短波長感度，而提昇短路電流。如此般，即 可實現出轉換效率高之高性能的太陽能電池。 其次，本發明的太陽能電池之第三構成，係將半導體 基板的主表面用絕緣膜被覆者，其特徵在於： 在主表面上形成未被絕緣膜被覆之半導體層露出區域 ，並形成將半導體層露出區域和絕緣膜一起被覆之透明導 電層，在該透明導電層上形成輸出取出用電極。 依據該構成，係將作爲接觸窗來作用的半導體層露出 區域形成於絕緣膜，又形成將半導體層露出區域和絕緣膜 一起被覆住的透明導電層。未設置該透明導電層時，如圖 13A所例示般，半導體基板1側所產生的電流，由於沿橫 方向流過電阻率較高的基板表層部(例如射極層)2後，再從 輸出取出用電極7取出，故串聯電阻大，易產生損失。然 而，依據本發明的第三構成之太陽能電池，如圖13B所例 示般，來自半導體層露出區域5的電流，沿橫方向流過導 電率較高(即電阻率較低)的透明導電層6後，再從輸出取 9 (請先閱讀背面之注意事項再填寫本頁) •—裝 線· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 B7 五、發明說明（没 出用電取出。因此，將能大幅減輕沿橫方向流過電流 失。例如，圖13A中，到輸出取出用電極7爲 全部都會成爲基板表層部2內的橫方向導通 時之電丨[ 止的距 路。但 κ 一、 ΦΛ :理Order: Line · This paper size applies the Chinese National Standard (CNS) A4 specification (210x297 ^ 17 printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 480737 A7 B7 V. Description of the invention (]) Uranium engraved protective film 4, can be used without light In order to form the above-mentioned coating state, the polymer corrosion inhibitor for general use only needs to appropriately set the thickness of the formation of the etching protection film 4. Once the coating state is formed, for example, a semiconductor can be simply formed by immersing the substrate in an appropriate etching solution The layer exposes the region 5. Therefore, the troublesome and labor-intensive photolithography technique is completely unnecessary, and of course, it is also unnecessary due to the burst. Even if the dopant concentration on the substrate surface is increased, a good resistive contact can be obtained. This can improve the curve factor of the solar cell. In addition, because the surface dopant concentration can be reduced, the short-wavelength sensitivity of the solar cell can be increased, and the short-circuit current can be increased. In this way, a high conversion efficiency can be achieved Performance solar cell Secondly, the third configuration of the solar cell of the present invention is that the main surface of the semiconductor substrate is insulated The film-coated person is characterized in that an exposed area of the semiconductor layer that is not covered by the insulating film is formed on the main surface, and a transparent conductive layer that covers the exposed area of the semiconductor layer and the insulating film together is formed, and an output is formed on the transparent conductive layer. According to this configuration, an exposed region of the semiconductor layer that functions as a contact window is formed on the insulating film, and a transparent conductive layer is formed to cover the exposed region of the semiconductor layer and the insulating film together. When the transparent conductive layer is not provided, As shown in FIG. 13A, the current generated on the semiconductor substrate 1 side is connected in series because the substrate surface layer portion (for example, the emitter layer) 2 having a higher resistivity flows in the lateral direction, and then is taken out from the output extraction electrode 7. The electric resistance is large and loss is easy to occur. However, as shown in FIG. 13B, the solar cell according to the third configuration of the present invention has a higher electrical conductivity in the lateral direction of the current from the exposed region 5 of the semiconductor layer (i.e. Low) after the transparent conductive layer 6, then take 9 from the output (please read the precautions on the back before filling in this page) • —installation line • This paper size is applicable National Standard (CNS) A4 specification (210 X 297 mm) 480737 A7 B7 V. Description of the invention (without electricity used to take it out. Therefore, the current loss flowing in the horizontal direction can be greatly reduced. For example, in Figure 13A, the The output take-out electrodes 7 are all distances when the substrate surface layer portion 2 is turned on in the lateral direction. [Κ], ΦΛ: Principle

經濟部智慧財產局員工消費合作社印製 ΠΒ中，不管有無導出運又出用電極7的存在， |林專 由於電流只要從最近的半導體層}區域5流向透明導電 層6即可，故其橫方向導通長，相較於圖13Α的橫方 I jr： ] 向導通長度LP1呈大幅地縮短I生运I，就其他效果而言，由 於形成的是透明導電層，故透明導電層本身所造成之遮蔽 損失將幾乎不致產生。因此，能謀求太陽能電池的短部電 流和轉換效率的提昇。 特別是，當用汎用的網版印刷來形成輸出取出用電極 時，由於輸出取出用電極7的寬度變大，爲減輕遮蔽損失 ，將必須加寬其形成間隔。如圖13A所示般，當未設置透 明導電層時，雖會有橫方向電流所致之串聯電阻增大的問 題，但依據上述本發明之太陽能電池的第三構成，如圖 13B所示般，由於透明導電層6是作爲橫方向導通路來作 用，故能急劇減輕該問題的影響。又，若串聯電阻增大， 就算要加大輸出取出用電極的形成間隔仍會產生一定的界 限，相對於此，依據本發明的第三構成之太陽能電池，就 算將透明導電層6上所設的輸出取出用電極7、7之形成間 隔設爲相當大，串聯電阻也不會變太高，結果將能進一步 減少遮蔽損失。 又，本發明，由於在基板表層部（例如射極層）沒有讓 電流沿橫方向流過的必要，即使其薄片電阻高，例如形成 (請先閱讀背面之注意事項再填寫本頁) * -裝 . 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明說明（？） η型射極層的情形將薄片電阻提高到比ι〇〇Ω高很多的値， 也沒有問題。亦即，可連一步降低基板表層部之摻質濃度 。藉此’進一步降低表面再結合速度將變得可得，而能提 昇轉換效率。 又，上述本發明之太陽能電池的第三構成，可以和前 述第一構成和第二構成作組合。這時之輸出取出用電極7 、7 ’如圖13Β所示般，可形成在散布於基板主表面的各 處之凸部15所對應的位置。另一方面，第三構成，也能獨 立於第一或第二構成來實施。圖7Ε中，在基板1的主表 面上並未形成凸部15，在絕緣層3上則藉光微影等來形成 半導體層露出部35。 其次，本發明的太陽能電池之第四構成，係將半導體 基板的主表面用絕緣膜被覆者，其特徵在於： 在主表面上形成複數個未被絕緣膜被覆之半導體層露 出區域，在該等半導體層露出區域的部分區域，係以直接 接觸半導體層的方式來形成輸出取出用電極，未形成輸出 取出用電極之其他的半導體層露出區域，則用透明的輔助 絕緣膜來被覆。 在半導體層露出區域中，以直接接觸半導體層的方式 來形成輸出取出用電極之太陽能電池構成，例如前述般利 用半導體基板主表面的凹凸輪廓，可以說是採隨機的方式 來形成半導體層露出區域，當形成輸出取出用電極時，並 不一定所有的半導體層露出區域都能當作和輸出取出用電 極的接觸窗來利用，而有位在偏離輸出取出用電極形成區 11 (請先閱讀背面之注意事項再填寫本頁) -售裝 •線· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製 480737 A7 B7 五、發明說明（/。） 域的半導體層露出區域殘留的情形。上述第四構成中’將 未當作接觸窗來利用之殘留的半導體層露出區域’藉透明 輔助絕緣層的被覆能將半導體層露出區域鈍化，而能有效 的防止因來自半導體層露出區域之污染附著於半導體層等 所造成之漏電流等的產生。又，由於輔助絕緣層晏採透明 的構成，因該輔助絕緣層所帶來之遮蔽損失將不易產生。 又，該輔助絕緣層，若採將上述殘留的半導體層露出區域 、絕緣膜、輸出取出用電極一起被覆住的形式，其形成較 容易，而能減少製造成本。 上述本發明的太陽能電池之第四構成，可以和前述第 一或第二構成作組合。例如，圖7F中，半導體層露出區域 5形成於凸部15的頂部25，輸出取出用電極7在半導體層 露出區域5是和半導體層2直接接觸。另一方面，第4構 成也能獨立於第一或第二構成來實施。圖7G所示的例子 ’在基板1的主表面並未形成凸部15，在絕緣層3則藉光 微影等來形成半導體層露出部35。不管是那個構成中’輔 助絕緣層10都是採將殘留的半導體層露出區域5’、絕緣膜 3、輸出取出用電極7 —起被覆的形式。 〔圖式之簡單說明〕 圖1A係顯示本發明的太陽能電池之第一例的截面構 造之示意圖。 圖1B係顯示本發明的太陽能電池之第二例的截面構 造之示意圖。 圖2A係顯示形成於半導體基板之凹凸部的形態之第 12 (請先閱讀背面之注意事項再填寫本頁)Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs ΠΒ, regardless of the presence or absence of the export electrode 7 | Lin Zhuan Since the current only needs to flow from the nearest semiconductor layer} region 5 to the transparent conductive layer 6, its horizontal Directional conduction is longer, compared to the horizontal Ijr of FIG. 13A:] The conduction length LP1 is greatly shortened by I. For other effects, since the transparent conductive layer is formed, the transparent conductive layer itself causes it. The shielding loss will hardly occur. Therefore, the short-circuit current and conversion efficiency of the solar cell can be improved. In particular, when the output take-out electrode is formed by general screen printing, since the width of the output take-out electrode 7 becomes large, it is necessary to widen the formation interval in order to reduce the shielding loss. As shown in FIG. 13A, when the transparent conductive layer is not provided, although there is a problem that the series resistance increases due to the current in the lateral direction, the third structure of the solar cell according to the present invention is as shown in FIG. 13B. Since the transparent conductive layer 6 functions as a lateral conduction path, the influence of this problem can be reduced sharply. In addition, if the series resistance is increased, even if the formation interval of the output extraction electrode is increased, a certain limit will still be generated. In contrast, according to the third configuration of the solar cell of the present invention, even if the transparent conductive layer 6 is provided The formation interval of the output take-out electrodes 7 and 7 is set to be relatively large, and the series resistance will not become too high. As a result, the shielding loss can be further reduced. In addition, in the present invention, it is not necessary to allow a current to flow in a lateral direction in the surface layer portion of the substrate (for example, the emitter layer), even if the sheet resistance is high, such as forming (please read the precautions on the back before filling in this page) *- The size of this paper applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 480737 Α7 Β7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (?) The resistance increased to 提高, which is much higher than ωΩ, and there was no problem. That is, the dopant concentration of the surface layer portion of the substrate can be further reduced. By this, further reducing the surface recombination speed will become available, and the conversion efficiency can be improved. The third configuration of the solar cell of the present invention may be combined with the first configuration and the second configuration described above. As shown in FIG. 13B, the output take-out electrodes 7 and 7 'at this time may be formed at positions corresponding to the convex portions 15 scattered at various places on the main surface of the substrate. On the other hand, the third configuration can be implemented independently of the first or second configuration. In FIG. 7E, the convex portion 15 is not formed on the main surface of the substrate 1, and the semiconductor layer exposed portion 35 is formed on the insulating layer 3 by light lithography or the like. Next, the fourth configuration of the solar cell of the present invention is a person who covers the main surface of a semiconductor substrate with an insulating film, and is characterized in that a plurality of exposed areas of the semiconductor layer that are not covered by the insulating film are formed on the main surface. A part of the exposed area of the semiconductor layer is formed by directly contacting the semiconductor layer to form the output extraction electrode. Other semiconductor layer exposed areas where the output extraction electrode is not formed are covered with a transparent auxiliary insulating film. In the exposed area of the semiconductor layer, a solar cell structure is formed in which the output extraction electrode is directly contacted with the semiconductor layer. For example, as described above, the uneven surface of the main surface of the semiconductor substrate is used to form the exposed area of the semiconductor layer in a random manner. When the output extraction electrode is formed, not all exposed areas of the semiconductor layer can be used as a contact window with the output extraction electrode, but there is a deviation from the output extraction electrode formation area 11 (please read the back first Please pay attention to this page and fill in this page again)-Sale, installation, line, and paper size: Applicable to China National Standard (CNS) A4 (210 X 297 mm) Printed by the Intellectual Property Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs 480737 A7 B7 (/.) The exposed area of the semiconductor layer of the domain remains. In the above-mentioned fourth configuration, the "exposed region of the semiconductor layer not used as a contact window" can passivate the exposed region of the semiconductor layer by covering the transparent auxiliary insulating layer, and can effectively prevent contamination from the exposed region of the semiconductor layer. Generation of leakage current caused by adhesion to the semiconductor layer and the like. In addition, due to the transparent structure of the auxiliary insulating layer, the shielding loss caused by the auxiliary insulating layer will not easily occur. In addition, if the auxiliary insulating layer is formed by covering the remaining semiconductor layer exposed area, the insulating film, and the output extraction electrode together, the auxiliary insulating layer can be easily formed, and the manufacturing cost can be reduced. The fourth structure of the solar cell of the present invention described above may be combined with the first or second structure described above. For example, in FIG. 7F, the semiconductor layer exposed region 5 is formed on the top 25 of the convex portion 15, and the output extraction electrode 7 is in direct contact with the semiconductor layer 2 in the semiconductor layer exposed region 5. On the other hand, the fourth configuration can be implemented independently of the first or second configuration. In the example shown in FIG. 7G, the convex portion 15 is not formed on the main surface of the substrate 1, and the semiconductor layer exposed portion 35 is formed in the insulating layer 3 by light lithography or the like. Regardless of the configuration, the 'auxiliary insulating layer 10' is formed by covering the exposed semiconductor layer 5 ', the insulating film 3, and the output extraction electrode 7 together. [Brief Description of Drawings] Fig. 1A is a schematic view showing a cross-sectional structure of a first example of a solar cell of the present invention. Fig. 1B is a schematic view showing a cross-sectional structure of a second example of the solar cell of the present invention. Figure 2A shows the 12th form of the unevenness formed on the semiconductor substrate (please read the precautions on the back before filling this page)

本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（Η ) 一例的立體圖。 圖2B係顯示形成於半導體基板之凹凸部的形態之第 二例的立體圖。 圖2C係顯示形成於半導體基板之凹凸部的形態之第 三例的立體圖。 圖3係顯示實驗例的太陽能電池之製程的流程圖。 圖4A係顯示本發明的半導體層露出區域之形成方法 的步驟說明圖。 圖4B係接續於圖4A之步驟說明圖。 圖4C係接續於圖4B之步驟說明圖。 圖4D係接續於圖4C之步驟說明圖。 圖5係顯示實驗例2所用的太陽能電池之截面構造的 示意圖。 圖6係擴大顯示實驗例3所用之太陽能電池的主要部 分之立體圖。 圖7A係顯示本發明的太陽能電池之主要部分截面構 造的第一例之示意圖。 圖7B係顯示本發明的太陽能電池之主要部分截面構 造的第二例之示意圖。 圖7C係顯示本發明的太陽能電池之主要部分截面構 造的第三例之示意圖。 圖7D係顯示本發明的太陽能電池之主要部分截面構 造的第四例之示意圖。 圖7E係顯示本發明的太陽能電池之主要部分截面構 13 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁)This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 480737 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. A three-dimensional view of an example of the invention (Η). Fig. 2B is a perspective view showing a second example of the form of the uneven portion formed on the semiconductor substrate. Fig. 2C is a perspective view showing a third example of the form of the uneven portion formed on the semiconductor substrate. FIG. 3 is a flowchart showing a manufacturing process of a solar cell according to an experimental example. Fig. 4A is an explanatory view showing a step of a method for forming an exposed region of a semiconductor layer according to the present invention. FIG. 4B is an explanatory diagram of the steps subsequent to FIG. 4A. FIG. 4C is an explanatory diagram of the steps subsequent to FIG. 4B. FIG. 4D is an explanatory diagram of steps subsequent to FIG. 4C. FIG. 5 is a schematic view showing a cross-sectional structure of a solar cell used in Experimental Example 2. FIG. Fig. 6 is an enlarged perspective view of a main part of a solar cell used in Experimental Example 3. Fig. 7A is a schematic view showing a first example of a cross-sectional structure of a main part of a solar cell of the present invention. Fig. 7B is a schematic view showing a second example of a cross-sectional structure of a main part of a solar cell of the present invention. Fig. 7C is a schematic view showing a third example of the cross-sectional structure of the main part of the solar cell of the present invention. Fig. 7D is a schematic view showing a fourth example of a cross-sectional structure of a main part of a solar cell of the present invention. Fig. 7E shows the cross-section structure of the main part of the solar cell of the present invention. 13 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling this page)

480737 A7 B7 五、發明說明（α) 造的第五例之示意圖。 圖7F係顯示本發明的太陽能電池之主要部分截面構 造的第六例之示意圖。 圖7G係顯示本發明的太陽能電池之主要部分截面構 造的第七例之示意圖。 圖8A係顯示使用塗佈液來分段增厚以形成鈾刻保護 膜的例子之步驟說明圖。 圖8B係接續於圖8A之步驟說明圖。 圖8C係接續於圖8B之步驟說明圖。 圖8D係接續於圖8C之步驟說明圖。 圖9A係塗佈液粘度和蝕刻保護膜的形成狀態的關係 之說明圖。 圖9B係接續於圖9A之說明圖。 圖9C係接續於圖9B之說明圖。 圖9D係接續於圖9C之說明圖。 圖10A係顯示蝕刻保護膜的形成狀態、和半導體層露 出部的形成狀態的關係之一例的截面示意圖。 經濟部智慧財產局員工消費合作社印裂 --------------裝—— (請先閱讀背面之注意事項再填寫本頁) •線· 圖10B係顯示蝕刻保護膜的形成狀態、和半導體層露 出部的形成狀態的關係之另一例的截面示意圖。 圖11A係顯示組裝有透明導電層之本發明的太陽能電 池之製程的第一例之截面示意圖。 圖11B係顯示組裝有透明導電層之本發明的太陽能電 池之製程的第二例之截面示意圖。 圖lie係顯示組裝有透明導電層之本發明的太陽能電 14 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 B7 五、發明說明（ο ) '池之製程的第三例之截面示意圖。 裝--- (請先閱讀背面之注意事項再填寫本頁) 圖12係顯示組裝有透明導電層之本發明的太暘能電 池之輸出取出用電極的形成態樣的變形例之截面示意圖。 圖13A係顯示因透明導電層之有無所造成之流過表層 部的電流路徑不同的說明圖。 圖13B係接續於圖13A的說明圖。 圖14係顯示實驗例1中各太陽能電池的電流電壓特 性。 圖15係顯示實驗例1中內部量子效率和波長的關係 〇 圖16係利用ρ-η接合之太陽能電池的原理說明圖。 圖Π係示意地顯示在受光面側之輸出取出用電極的 形成形態之一例的立體圖。 圖18係太陽能電池的電流電壓曲線之說明圖。 參 圖19Α係將本發明和習知方法之半導體層露出部的形 成形態的不同點作對比之示意圖。 圖19Β係接續於圖19Α的說明圖。 〔胃實施本發明之最佳形態〕 以下，使用圖面來說明本發明之相關實施形態。又’ 爲說明實施形態之各圖面中，對具有相同機能者係賦予相 同符1號，而省略重複的說明。 圖1A係示意地顯示本發明的太陽能電池之一實施形 態之截面圖。該太陽能電池100，係在矽單結晶基板1(以 下簡稱基板1，本實施形態採P型)的第一主表面側形成雜 15 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（/(A) 質的擴散層2(本實施形態採η型），而構成p - η接合部。 如該擴散層2般在半導體基板的表面附近新形成的層，在 本發明中總稱爲半導體層2。半導體層2的表面，係依序 形成有絕緣膜(鈍化膜)3、透明導電層6及輸出取出用電極 7。 在此，在基板1的第一主表面上形成凹凸部，絕緣膜 3是以被覆該凹凸部的方式來形成出。又，以包含凹凸部 中的多數凸部15的部分凸部的頂部25的形式，來形成未 被絕緣膜3被覆的半導體層露出區域5。如圖19Α之擴大 顯示般，該半導體層露出區域5內之凸部15頂部25的頂 端高度位置，是比半導體層露出區域5的外周緣之絕緣膜 3的最大高度位置(即絕緣膜3的內周緣11之最大高度位 置)來得高。又，透明導電層6，在半導體層露出區域5內 的凸部15之頂部25，.是和半導體層2直接接觸，其上方 所形成之輸出取出用電極7，則透過透明導電層6而和半 導體層2形成所謂間接接觸的形式。 半導體層露出區域5，在該半導體層露出區域5形成 用的基板1之主表面(在此爲第一主表面）上，以合計面積 率1°/。以下來形成即可。半導體層露出區域5係作爲和透明 導電層5的接觸窗來作用，由於該位置之表面再結合速度 變得非常大，藉由將上述合計面積定爲1%以下，可有效地 降低表面再結合速度。藉此可提昇開路電壓及轉換效率。 另一方面，該形成面積率最低必須確保在0·001°/〇左右，若 無法確保，因接點附近的電流集中將造成電阻增加，而將 16 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐) 一~ (請先閱讀背面之注意事項再填寫本頁) :裝 · .線_ 經濟部智慧財產局員工消費合作社印製 480737 A7 B7 五、發明說明（/r ) 無法達成充分的轉換效率提昇。 基板1的構成材料之單結晶矽’由於在波長 400〜llOOnm的區域具有大到6.00〜3.50的折射率，故太陽 光線入射時的反射損失會造成問題。上述凹凸部，主要是 爲防止太陽能電池受光面之第一主表面的反射而形成者’ 如圖2A所示般，可採外面爲（111)面之多數角錐狀突起55 所構成的無規紋理（texture)構造。這種紋理構造，能使用 聯胺水溶液或氫氧化鈉等的蝕刻液而藉非等向性蝕刻來形 成矽單結晶之（100)面。半導體層露出區域5，能以包含角 錐狀突起55頂端部的方式來形成出。 又，除此外，如圖2B所示般，也能採用將V槽以一 定間隔來排列的形態(槽內面，例如是矽單結晶之互呈交叉 的（111)面）。這種V槽，能使用光微影，例如用稀釋NaOH 水溶液藉非等向性鈾刻來形成出。該形態下，鄰接的V槽 間所包夾之三角屋頂狀形態的肋部56爲凸部，其稜線部則 成爲頂部。半導體層露出區域5，係以例如僅包含局部稜 線的方式來形成出。本形態中，由於槽的形態一致，故輸 出取出用電極能形成有規則的形狀，而能更有效謀求串聯 損失之降低。又，若使用光微影，如圖2C所示般，也能 使圖2B之肋狀部56形成格子狀交叉形態之格子狀肋57。 換言之，係將角錐狀凹部排列成格子狀，而形成所謂倒角 錐凹凸部。藉此，可更加有效的抑制表面反射。 又，爲獲得充分的反射效果，且，若考慮到以僅露出 頂部的形式來實施蝕刻保護膜4被覆步驟的容易性，凸部 17 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱^ ----------------- (請先閱讀背面之注意事項再填寫本頁) . 丨線· 480737 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明（/㈠ 15之谷部到頂部的最大高度宜爲0.1//m〜30//m。 絕緣膜3可使用氧化物系或氮化物系者。在此，基板 1爲矽單結晶基板，絕緣膜3係在既定環境氣氛下經熱處 理所形成之矽的氧化物或氮化膜(例如CVD法所形成出）。 藉此，即可把絕緣膜3當作表面再結合速度小的鈍化膜來 使用。 又，絕緣膜3上之半導體層露出區域5的形成方法， 係如圖4所說明般。例如把對氫氟酸等的蝕刻具有充分的 耐鈾性之局分子材料、例如酸醒淸漆系樹脂等當作耐纟虫材 料’而製作出塗佈液。又，塗佈液的粘度可使用適當的溶 媒來調整。如圖8A所示般，係將該塗佈液以公知的方法 、例如旋塗法或噴塗法等來塗佈。如此般，在相鄰凸部15 、15間所形成的凹部16，將積存塗佈液而形成塗佈層24 。接著讓溶媒蒸發、乾燥，如圖8B所示般，塗佈層24會 成爲耐蝕層4,，而變成將凹部16的底部附近作局部塡平的 形狀。 接著，如圖8C及圖8D所示般，藉由重複如此般塗佈 層24的形成和乾燥，來逐步增加耐蝕層4,的厚度。又，當 到達使凸部15的頂部25以所需的高度來露出的狀態時， 停止耐蝕層4,之更進一步的形成，如圖4C所示般，把其 當作最終蝕刻保護膜4來使用。在此狀態下，將基板的第 一主表面側浸漬於含氫氟酸之蝕刻液中，只要將被覆著凸 部15的頂部25之絕緣膜(例如氧化矽膜)溶解除去，即可 形成半導體層露出區域5。完成蝕刻時，如圖4D所示，將 18 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 x 297公釐） 訂---------線 f請先閱讀背面之注意事項再填寫本頁) 480737 A7 B7 五、發明說明（π ) 蝕刻保護膜4用丙酮或MEK(甲基乙基酮)等的有機溶劑來 除去。 蝕刻保護膜4形成時所用的塗佈液，必須將粘度調整 成適當値(例如0.04〜0.1N · s/m2)。若塗佈液的粘度過大， 如圖9A所示般，對想從塗佈層24的液面露出之凸部15 的頂部25，因表面張力易使塗佈液以環繞的形式來殘留， 在乾燥後，如圖9B所示般，凸部15的頂部25將殘留過 多的蝕刻保護膜4a，而對蝕刻造成妨礙。相對於此，使用 粘度經適當調整後的塗佈液時，如圖9C所示般，凸部15 的頂部25將自液面以最佳狀態來露出。這時，即使在乾燥 後稍有蝕刻保護膜4a殘留於頂部25，如圖9D所示般，該 殘留膜將成爲薄且多孔質者、或呈島狀，而能確實地形成 絕緣膜3至少在局部露出的狀態。這時，蝕刻液將從露出 部滲入，而將殘留有蝕刻保護膜4a的部分之絕緣膜3同時 除去。又，如此般，若將凸部15頂部之蝕刻保護膜4a的 殘留量減少，如圖7C所示般，將可使構成半導體層露出 區域5外周緣之絕緣膜3的內周緣部上面11(對應於蝕刻 保護膜4a的膜表面位置)變得平坦。藉此，可減少絕緣膜3 的殘留，而形成將形成面積的偏差壓低之半導體層露出區 域5 〇 又，只要能以完全圍繞某凸部15周圍的形式來被覆 蝕刻保護膜4，如圖7B或圖7C所例示般，凸部15的基端 側外周面將被絕緣膜3被覆，該凸部15的頂端部將形成比 絕緣膜3的上緣11更突出，而形成半導體層露出區域5。 19 裝·-- (請先閱讀背面之注意事項再填寫本頁) · -I線. 經濟部智慧財產局員X-消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 B7 五、發明說明（β) 然而’並非所有的凸部15的咼度都完全一致，例如圖1〇A 所示般，若有比周圍的凸部15之高度爲小之凸部15,存在 時’有時其等將完全埋沒於鈾刻保護膜4中。這時，這些 凸部15’頂部25之絕緣膜3當然無法除去。圖7D也例示 出形成有絕緣膜無法除去的凸部15’。這起凸部151，只要 其程度不致防礙和輸出取出用電極7的接觸，就算:稍、有*开多 成亦無妨。 另一方面，蝕刻保護膜4，雖以均一充塡於所有的凹 部內爲理想，例如採用無規紋理構造的情形等，有時也會 形成外部呈開放的凹部，例如圖10B所示般之塗佈液不易 積存的凹部16’。這時，由於這種凹部16’或與其相鄰的凸 部35上無法形成完全的蝕刻保護膜4，有時在半導體層露 出區域5內會有其整個絕緣膜3都被除去的凸部35之存在 〇 又，如圖11A所示般，爲了將形成面積的偏差小之半 導體層露出區域5 —致地形成出，如圖8D所示般，宜將 蝕刻保護膜4的膜面高度位置調整成大致一定。 又，透明導電層6，可例如以氧化錫（Sn02)或氧化銦 (Ιη203)等的導電性氧化物被膜來構成。具體而言，摻雜銻 (Sb)之氧化錫膜（所謂奈塞(nesa)膜）或摻雜錫（Sn)之氧化銦 膜(所謂ITO膜)爲高導電率，故適用於本發明。其中因奈 塞膜的導電率高，故針對太陽能電池的串聯電阻減少特別 有利。另一方面，ITO膜雖比起奈塞膜其導電率稍差，但 較便宜。除上述奈塞膜和ITO膜以外，例如可將Cd2Sn04 20 (請先閱讀背面之注意事項再填寫本頁)480737 A7 B7 V. Schematic diagram of the fifth example of the invention (α). Fig. 7F is a schematic view showing a sixth example of a cross-sectional structure of a main part of a solar cell of the present invention. Fig. 7G is a schematic view showing a seventh example of a cross-sectional structure of a main part of a solar cell of the present invention. Fig. 8A is an explanatory diagram showing an example of an example in which a coating liquid is used for stepwise thickening to form a uranium-etched protective film. FIG. 8B is an explanatory diagram of steps subsequent to FIG. 8A. FIG. 8C is an explanatory diagram of a step subsequent to FIG. 8B. FIG. 8D is an explanatory diagram of steps subsequent to FIG. 8C. Fig. 9A is an explanatory diagram showing the relationship between the viscosity of the coating liquid and the formation state of the etching protection film. FIG. 9B is an explanatory diagram continued from FIG. 9A. FIG. 9C is an explanatory diagram continued from FIG. 9B. FIG. 9D is an explanatory diagram continued from FIG. 9C. Fig. 10A is a schematic cross-sectional view showing an example of the relationship between the formation state of the etching protection film and the formation state of the exposed portion of the semiconductor layer. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs -------------- Installation-(Please read the precautions on the back before filling out this page) • Line · Figure 10B shows the etching protection film Another schematic cross-sectional view of another example of the relationship between the formation state of the semiconductor layer and the formation state of the exposed portion of the semiconductor layer. Fig. 11A is a schematic cross-sectional view showing a first example of a manufacturing process of a solar cell of the present invention in which a transparent conductive layer is assembled. Fig. 11B is a schematic cross-sectional view showing a second example of the manufacturing process of the solar cell of the present invention in which a transparent conductive layer is assembled. Figure lie shows the solar power of the present invention assembled with a transparent conductive layer. 14 The paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) 480737 A7 B7 V. Description of the invention (ο) Schematic cross-section of three cases. Assembly --- (Please read the precautions on the back before filling out this page) Figure 12 is a schematic cross-sectional view showing a modified example of the output extraction electrode of the Tai Chi battery of the present invention assembled with a transparent conductive layer. Fig. 13A is an explanatory diagram showing different current paths flowing through the surface layer portion due to the presence or absence of a transparent conductive layer. FIG. 13B is an explanatory diagram continued from FIG. 13A. FIG. 14 shows the current-voltage characteristics of each solar cell in Experimental Example 1. FIG. Fig. 15 is a diagram showing the relationship between the internal quantum efficiency and the wavelength in Experimental Example 1. Fig. 16 is a schematic explanatory diagram of a solar cell using ρ-η junction. Fig. II is a perspective view schematically showing an example of a formation form of an output extraction electrode on the light receiving surface side. FIG. 18 is an explanatory diagram of a current-voltage curve of a solar cell. Refer to FIG. 19A, which is a schematic diagram for comparing the differences in the formation forms of the exposed portions of the semiconductor layer between the present invention and the conventional method. FIG. 19B is an explanatory diagram continued from FIG. 19A. [Best Mode for Carrying Out the Invention by the Stomach] Hereinafter, a related embodiment of the present invention will be described using drawings. In addition, in each of the drawings for explaining the embodiment, those having the same function are given the same sign No. 1, and repeated description is omitted. Fig. 1A is a cross-sectional view schematically showing an embodiment of a solar cell of the present invention. The solar cell 100 is formed on the first main surface side of a silicon single crystal substrate 1 (hereinafter referred to as the substrate 1 in this embodiment, P type). The paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297). (Mm) 480737 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (/ (A) Quality diffusion layer 2 (n-type in this embodiment) constitutes a p-η junction. If the diffusion The layer 2 is a layer newly formed near the surface of the semiconductor substrate, and is collectively referred to as a semiconductor layer 2 in the present invention. The surface of the semiconductor layer 2 is sequentially formed with an insulating film (passivation film) 3, a transparent conductive layer 6, and an output take-out. An electrode 7. Here, a concave-convex portion is formed on the first main surface of the substrate 1, and an insulating film 3 is formed so as to cover the concave-convex portion. In addition, a portion including most of the convex portions 15 of the concave-convex portion is convex. In the form of the top portion 25 of the semiconductor layer, the exposed region 5 of the semiconductor layer not covered by the insulating film 3 is formed. As shown in the enlarged display of FIG. Semiconductor layer exposed area 5 The maximum height position of the outer peripheral edge of the insulating film 3 (that is, the maximum height position of the inner peripheral edge 11 of the insulating film 3) is high. Also, the transparent conductive layer 6, the top 25 of the convex portion 15 in the semiconductor layer exposed area 5, It is in direct contact with the semiconductor layer 2 and the output extraction electrode 7 formed on the semiconductor layer 2 passes through the transparent conductive layer 6 to form a so-called indirect contact with the semiconductor layer 2. The semiconductor layer is exposed in the region 5 and the semiconductor layer is exposed in the region 5 The main surface (here, the first main surface) of the substrate 1 for forming may be formed at a total area ratio of 1 ° / ° or less. The exposed region 5 of the semiconductor layer functions as a contact window with the transparent conductive layer 5. Because the surface recombination speed at this position becomes very large, by setting the total area above 1%, the surface recombination speed can be effectively reduced. This can improve the open circuit voltage and conversion efficiency. On the other hand, the The minimum formation area ratio must be ensured at about 0.001 ° / 〇. If it cannot be ensured, the current concentration near the contact will cause an increase in resistance, and the 16 paper standards will be applicable to the Chinese national standard (CNS ) A4 specification (210 X 297 mm) I ~ (Please read the precautions on the back before filling out this page): Packing ·. Line _ Printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economic Affairs 480737 A7 B7 V. Invention Description (/ r) A sufficient conversion efficiency improvement cannot be achieved. Since the single crystal silicon 'of the substrate 1 has a refractive index as large as 6.00 to 3.50 in a region of a wavelength of 400 to 110 nm, reflection loss at the time of incident sunlight may cause a problem. The concave-convex portions are mainly formed to prevent reflection of the first main surface of the solar cell light-receiving surface. As shown in FIG. 2A, a random texture composed of a large number of pyramidal protrusions 55 having a (111) surface on the outside can be used (Texture) construction. This texture structure can form an (100) plane of a silicon single crystal by anisotropic etching using an etchant such as an aqueous solution of hydrazine or sodium hydroxide. The semiconductor layer exposed region 5 can be formed so as to include a tip portion of the pyramidal protrusion 55. In addition to this, as shown in FIG. 2B, the V grooves may be arranged at a certain interval (the inner surface of the grooves is, for example, the (111) planes of silicon single crystals crossing each other). Such a V-groove can be formed using photolithography, for example, by anisotropic uranium etching using a dilute NaOH aqueous solution. In this form, the ribs 56 of the triangular roof-like form enclosed by the adjacent V-grooves are convex parts, and the ridge line parts become the tops. The semiconductor layer exposed region 5 is formed, for example, so as to include only local edge lines. In this embodiment, since the shapes of the grooves are the same, the output extraction electrode can be formed in a regular shape, and the reduction in series loss can be more effectively achieved. In addition, if photolithography is used, as shown in Fig. 2C, the rib-shaped portion 56 of Fig. 2B can also be formed into a lattice-shaped rib 57 in a lattice-shaped cross shape. In other words, the pyramid-shaped concave portions are arranged in a grid pattern to form so-called chamfered-convex concave-convex portions. Thereby, surface reflection can be suppressed more effectively. In addition, in order to obtain a sufficient reflection effect, and considering the ease of performing the coating step of the etching protection film 4 by exposing only the top portion, the convex portion 17 is in accordance with the Chinese National Standard (CNS) A4 specification (210 X 297 Public Love ^ ----------------- (Please read the precautions on the back before filling out this page). 丨 Line · 480737 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 V. Description of the invention (/ ㈠ The maximum height from the valley part to the top of 15 should be 0.1 // m ~ 30 // m. The insulating film 3 can be an oxide or nitride system. Here, the substrate 1 is a silicon wafer Crystal substrate and insulating film 3 are oxides or nitrides of silicon (for example, formed by the CVD method) formed by heat treatment under a predetermined ambient atmosphere. With this, the insulating film 3 can be used as a surface with a low recombination speed. In addition, the method for forming the exposed region 5 of the semiconductor layer on the insulating film 3 is as described in Fig. 4. For example, a local molecular material having sufficient uranium resistance to the etching of hydrofluoric acid and the like, For example, acid-coated lacquer-based resins are used as tapeworm-resistant materials to produce coating solutions. The viscosity of the coating liquid can be adjusted using an appropriate solvent. As shown in FIG. 8A, the coating liquid is applied by a known method such as a spin coating method or a spray coating method. The recessed portion 16 formed between the portions 15 and 15 will store the coating liquid to form a coating layer 24. Then, the solvent is evaporated and dried. As shown in FIG. 8B, the coating layer 24 will become a corrosion resistant layer 4, and become The vicinity of the bottom of the recessed portion 16 is partially flattened. Next, as shown in FIG. 8C and FIG. 8D, the thickness of the corrosion-resistant layer 4 is gradually increased by repeating the formation and drying of the coating layer 24 in this manner. When the state where the top 25 of the convex portion 15 is exposed at a desired height is reached, the further formation of the corrosion-resistant layer 4 is stopped, as shown in FIG. 4C, and it is used as the final etching protection film 4 In this state, the first main surface side of the substrate is immersed in an etching solution containing hydrofluoric acid, and the insulating film (for example, a silicon oxide film) covering the top 25 of the convex portion 15 can be formed by dissolving and removing it. The semiconductor layer is exposed to area 5. When the etching is completed, as shown in FIG. Applicable to China National Standard (CNS) A4 specifications (21 × 297 mm) Order --------- Line f, please read the precautions on the back before filling this page) 480737 A7 B7 V. Description of the invention ( π) The etching protection film 4 is removed with an organic solvent such as acetone or MEK (methyl ethyl ketone). The coating liquid used when the etching protection film 4 is formed must be adjusted to a suitable viscosity (for example, 0.04 to 0.1 N · s / m2). If the viscosity of the coating liquid is too large, as shown in FIG. 9A, the top portion 25 of the convex portion 15 that is to be exposed from the liquid surface of the coating layer 24 is likely to be surrounded by the coating liquid due to surface tension. It remains in the form. After drying, as shown in FIG. 9B, the top 25 of the convex portion 15 will leave too much etching protection film 4 a, which will hinder the etching. On the other hand, when a coating liquid having an appropriately adjusted viscosity is used, as shown in FIG. 9C, the top portion 25 of the convex portion 15 is exposed from the liquid surface in an optimal state. At this time, even if the etching protection film 4a remains on the top 25 slightly after drying, as shown in FIG. 9D, the residual film becomes thin and porous, or has an island shape, and the insulating film 3 can be reliably formed at least at Partially exposed state. At this time, the etching solution will infiltrate from the exposed portion and simultaneously remove the insulating film 3 in the portion where the etching protection film 4a remains. In this way, if the remaining amount of the etching protection film 4a on the top of the convex portion 15 is reduced, as shown in FIG. 7C, the upper surface 11 of the inner peripheral edge portion of the insulating film 3 constituting the outer peripheral edge of the semiconductor layer exposed area 5 can be made. The position of the film surface corresponding to the etching protection film 4a) becomes flat. Thereby, the residue of the insulating film 3 can be reduced, and the exposed area of the semiconductor layer 5 that reduces the deviation of the formation area can be formed. As long as the etching protection film 4 can be covered completely around a certain convex portion 15, as shown in FIG. 7B Or as illustrated in FIG. 7C, the outer peripheral surface of the base end side of the convex portion 15 will be covered with the insulating film 3, and the top portion of the convex portion 15 will be formed to protrude more than the upper edge 11 of the insulating film 3 to form the semiconductor layer exposed area 5. . 19 Packs ... (Please read the notes on the back before filling this page) · -I line. Printed by X-Consumer Cooperatives, member of the Intellectual Property Bureau of the Ministry of Economic Affairs, this paper applies Chinese National Standard (CNS) A4 (210 X 297) (Mm) 480737 A7 B7 V. Description of the invention (β) However, 'not all the convexities of the convex portions 15 are exactly the same, for example, as shown in FIG. 10A, if there is a height smaller than the height of the surrounding convex portions 15 is smaller than When the convex portion 15 is present, sometimes it may be completely buried in the uranium-etched protective film 4. At this time, of course, the insulating film 3 on the top 25 of these convex portions 15 'cannot be removed. Fig. 7D also illustrates the formation of a convex portion 15 'which cannot be removed by the insulating film. As long as the raised portion 151 does not interfere with the contact with the output-removing electrode 7 to a sufficient degree, it is not necessary to have a slight opening or a large opening. On the other hand, although the etching protection film 4 is preferably filled uniformly in all the recesses, for example, when a random texture structure is used, recesses may be formed to open on the outside, as shown in FIG. 10B. The recessed portion 16 'where the coating liquid does not easily accumulate. At this time, since the complete etching protection film 4 cannot be formed on the concave portion 16 ′ or the adjacent convex portion 35, there may be one of the convex portions 35 in which the entire insulating film 3 is removed in the exposed region 5 of the semiconductor layer. In addition, as shown in FIG. 11A, in order to uniformly form the exposed area 5 of the semiconductor layer with a small formation area variation, as shown in FIG. 8D, the position of the film surface height of the etching protection film 4 should be adjusted to It's almost certain. The transparent conductive layer 6 may be formed of a conductive oxide film such as tin oxide (Sn02) or indium oxide (Ine203). Specifically, antimony (Sb) doped tin oxide film (so-called nesa film) or tin (Sn) doped indium oxide film (so-called ITO film) has high conductivity, and is suitable for the present invention. Among them, since the conductivity of the nanofilm is high, it is particularly advantageous to reduce the series resistance of the solar cell. On the other hand, the ITO film is less expensive than the Nessell film, but it is less expensive. In addition to the above-mentioned Neissel film and ITO film, for example, Cd2Sn04 20 (please read the precautions on the back before filling this page)

JaT· -丨線 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 B7 經濟部智慧財產局員工消費合作杜印製 五、發明說明（I?) 、Zn2Sn04、Mgln204、摻雜釔（Y)之 CdSb206、摻雜錫之 Galn03等當作透明導電層6的材質來使用。 這些導電性氧化物被膜，能藉氣相成膜法、例如化學 蒸鍍法(CVD)、或濺鍍和真空蒸鍍等的物理蒸鍍法(PVD)來 形成出，使用溶膠法等其他方法來形成亦可。如圖11B所 示般，透明導電層6係以將半導體層露出區域5和絕緣膜 3 —起被覆的方式來形成，如圖7D或圖11C所示般，在 該透明導電層6上形成輸出取出用電極7。這些圖中，輸 出取出用電極7雖均以重疊於半導體層露出區域5的位置 關係來形成出，但由於透明導電層6的導電率高，如圖12 所示般，輸出取出用電極7的形成位置稍偏離半導體層露 出區域5的位置亦無妨。 基於將太陽能電池100的串聯電阻減少的觀點，宜將 透明導電層6的電阻率調整爲5XHT5〜3Χ1(Γ4Ω · cm左 右。例如，濺鍍所製作出的ITO膜之電阻率値，例如可成 爲1ΧΗΓ4〜2·8Χ10_4Ω · cm。另一方面，CVD法所製作出 之奈塞膜，例如可得出IX 1(Γ4Ω · cm以下之低電阻率的 膜。 又，上述透明導電層6，可採用和構成基板1的矽單 結晶之折射率不同者，而同時具備反射防止膜的功能。在 使其具備反射防止膜的功能時，透明導電層6的構成材料 之折射率以1.5〜2·5爲適當。例如，奈塞膜的情形，折射 率爲2.0左右，當其厚度爲40〜70//m時，可獲得顯著的反 射防止效果。又，和透明導電層6 —起，或取代透明導電 21 (請先閱讀背面之注意事項再填寫本頁) :裝 訂： .線· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 B7 五、發明說明（穴） 層6，而另外形成反射防止膜亦可。例如只要在透明導電 層6上形成MgF2膜等之折射率比透明導電層6爲低的膜 ，可更加降低反射率，而進一步提高生成電流密度。 輸出取出用電極7,係使用含銀粉等的金屬粉之糊料 ，藉網版印刷等公知的厚膜印刷法來在透明導電層6上印 刷所要的電極圖案，再進行燒成而形成出。又，藉由使用 熱硬化型糊料，即可用更低溫來形成輸出取出用電極7。 如圖17所示般，由於基板1的第一主表面側成爲太陽能電 池的受光面，輸出取出用電極7，爲提昇光往p-n接合部 48之入射效率，例如可採用的構成，係具備：爲降低內部 電阻而以適當間隔來形成之粗的匯流條狀電極，從該匯流 條狀電極以既定間隔呈梳型分支出之指狀電極。然而，當 透明導電層6的導電率十分高時，可省略指狀電極，或在 形成指狀電極時能將其形成間隔設爲較寬。 又，上述般之使用網版印刷時，輸出取出用電極7(匯 流條電極或指狀電極)之形成寬度變寬。這時，如圖1A或 圖7D所示般，輸出取出用電極7是形成橫跨半導體層露 出區域5和周圍的絕緣層3。藉由網版印刷，由於以這種 特有形態來形成之輸出取出用電極7的寬度寬，爲降低遮 蔽損失，將必須加寬複數條電極的排列間隔。然而，不同 於以往之衝破方式所製造出之太陽能電池，本構成由於形 成透明導電層6，故電阻損失小，而能提昇轉換效率77。 回到圖1，在基板1的第二主表面上，形成爲防止裏 面反射之凹凸部，並將絕緣膜3以被覆該等凹凸部的方式 22 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 裝--- (請先閱讀背面之注意事項再填寫本頁) . 線· 經濟部智慧財產局員工消費合作f±印製 480737 A7 B7 五、發明說明) (請先閱讀背面之注意事項再填寫本頁) 來形成出。又，在凸部15的頂部形成半導體層露出部5。 然而，由於該第二主表面側並不成爲受光面，故將其全面 都用輸出取出用電極8來被覆。又，爲謀求太陽能電池單 元的輕量化而降低基板1厚度時，爲防止在第二主表面側 的電極8之少數載子的再結合·消滅，如圖1B所示般， 可在該第二主表面側形成和基板1爲相同導電型且爲更高 濃度的高濃度擴散層9(所謂BSF(back surface field)層）。 以下說明圖1之太陽能電池1〇〇的作用。太陽能電池 1〇〇，如圖16所示般，受到光照射，若吸收具有禁帶寬以 上的能量之光子，在p型區域和η型區域會因光致激發而 生成少數載子的電子和電洞，並分別朝接合部擴散。在接 合部，因電偶層的形成將生成內部電場(所謂「build-in電 場」’作爲少數載子來擴散後之電子和電洞，基於該內部 電場，將分別被拉進η型區域(電子)和p型區域(電洞)而彼 此分離，並成爲多數載子。其結果，ρ型區域和η型區域 將分別帶正、負帶，在各部所設的電極(圖1之7、8)間產 生太陽能電池的電動勢ΔΕ。 經濟部智慧財產局員工消費合作社印製 此處，用絕緣膜來純化基板表面時，若以衝破方式來 形成接觸窗，半導體層2，此處爲表面η型層之射面層的 摻質濃度若不設在3X102()crrr3(換算成薄片電阻爲400Ω/ □)以下，衝破所形成之電極接觸部的電阻將無法降得夠低 、例如0·01Ωοιη2左右。亦即，在衝破方式下，爲減輕接 觸阻抗損失，必然一定要提高半導體層2的摻質濃度。又 ，網版印刷所形成的輸出取出用電極7的寬度再細也必須 23 本紐尺度適用中國國家標準（CNS)A4規格（210 X 297公爱) ' " 480737 A7 B7 五、發明說明（β) 確保100//m以上，又爲使遮蔽損失成爲5%前後，必須使 電極間距成爲2〜3mm。 然而，依據圖1之太陽能電池100的構成，能不使用 衝破方式，而以單純的蝕刻來簡單形成出接觸窗之半導體 層露出區域5。因此，當然能將半導體層2的摻質濃度設 成比3Χ102()(：πΓ3(換算成薄片電阻爲400Ω/Ο)更小的値。 又如圖13B所示般，由於使用透明導電層6，相較於未使 用透明導電層6之圖13A的情形，在半導體層2內，電流 將沒有長距離沿橫方向流過的必要。例如，作爲透明導電 層6是使用奈塞膜或ITO膜的情形，只要具備能作爲反射 防止膜來利用的厚度（40〜70 // m)，其薄片電阻可降到 10〜25 Ω/□左右。藉此，透明導電層6上所設之輸出取出 用電極7，相較於習知者(2〜3mm)，即使變成2倍其串聯電 阻也不會增加太多，故能大幅減輕遮蔽損失。 又，上述實施形態中，是用蝕刻來形成凹凸部，但利 用機械加工來形成凹凸部亦可。例如，如圖2B所示般之 槽形態者，能藉切削加工來簡單地形成出。例如邊將複數 個沿軸線方向排列的轉動刃以吃入基板表面既定深度的方 式來轉動，邊將基板和轉動刃相對移動於槽形成方向，即 可將複數列的槽部一起形成。 又，本發明中，當串聯電阻沒有大量增加之虞時，如 圖7A〜圖7C或圖5所示般，可省去透明導電層6，而在半 導體層露出區域5上讓輸出取出用電極7和半導體層2直 接接觸。這時，如圖7F所示般，可將未形成輸出取出用電 24 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 x 297公釐） (請先閱讀背面之注意事項再填寫本頁) . _ -線_ 經濟部智慧財產局員工消費合作社印製 480737 A7 B7 五、發明說明（乃） 極7之殘留的半導體層露出區域5’用輔助絕緣層1〇被覆。 該圖的例子之輔助絕緣層是在形成輸出取出用電極7 後，將上述殘留的半導體層露出區域5’、絕緣膜3、輸出 取出用電極7 —起被覆而形成者。輔助絕緣層1〇的材質’ 可採用氮化砂、氧化砂等的無機系絕緣膜。追時’藉由適 度調整輔助絕緣層10的厚度’可使其同時具備反射防止膜 的機能。 (實驗例） 以下，說明爲確認本發明的效果所進行的實驗結果。 (實驗例1) 將圖1A所示的太陽能電池，依照圖3所示的步驟來 製作出。首先，準備出從矽單結晶鑄塊切出之剛切片（as sliced)狀態的p型結晶矽基板1(電阻率2Ω · cm(摻質濃度 7.2Xl018cnT3)之硼摻雜品）。又，基板1厚度爲300/zm。 該基板1，用氫氧化鈉水溶液(濃度質量40%)施以化學蝕刻 來除去切割所造成的損傷層後，浸入添加異丙醇之氫氧化 鈉水溶液(氫氧化鈉濃度：3質量％)，施加濕蝕刻，以在基 板1兩主面形成圖2A所示之無規紋理形態的凹凸部。 經濟部智慧財產局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) -線. 將完成凹凸形成之基板1洗淨後，藉由進行磷的熱擄 散，以在第一主表面形成薄片電阻200Ω/□之η型擴散層 2(磷擴散層）。接著，將基板表面所生成的磷玻璃蝕刻除去 後，進行氧化，以在兩主面形成厚度約5nm之二氧化矽膜 (絕緣膜3)。接著，依據旋壓(spin on)法，邊將塗佈液依序 弄乾邊塗佈於兩面，即能以圖4所示般之凸部15頂部25 25 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 _ _ B7 五、發明說明（ 突出的方式來形成以酚醛淸漆系樹脂爲主體之蝕刻保護膜 4。接著浸漬於濃度10質量％的氫氟酸水溶液中，僅鈾去 頂部25之絕緣膜3，而形成半導體層露出部5。然後，將 基板浸漬於丙酮中，以將蝕刻保護膜4溶解並除去。 接著，在基板1的第一主表面上，利用常壓CVD法 來堆積摻質有Sb之二氧化錫膜(透明導電層6)。該透明導 電層6的膜厚，爲兼作爲反射防止膜係形成60nm。其次， 在基板1的第一主表面，藉由使用銀糊料之網版印刷法， 在表面上形成如圖17所示形態的輸出取出用電極7的圖案 ，又使用鋁糊料而在第二主表面的全面上形成輸出取出用 電極8的圖案。之後，於溫度400°C進行氫退火，如此即 完成太陽能電池1〇〇(實施例品1)。 又，在上述磷擴散步驟時，除同時在表面擴散磷、在 裏面擴散硼之外，係使用和上述同樣的步驟而製作出圖1B 所示般之裏面設有高濃度p型擴散層9(BSF層)之太陽能電 池101的樣品(實施例品2)。另一方面，使用和上述相同的 基板1，利用以往的衝破技術來製作出太陽能電池（比較例 品）。又，比較例品上未形成透明電極6。各太陽能電池， 係如下述般進行性能評價試驗。亦即，組裝成具有10cm 見方的受光面積之太陽能電池單元，使用太陽模擬器(光強 度：lkW/m2，頻譜：AM1.5格洛巴），測定溫度25°C下的 電流電壓特性。其結果顯示於圖14。表1係顯示這些太陽 能電池的太陽能電池諸特性。圖15係顯示這些太陽能電池 的內部量子效率。 26 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) i. —線' 經濟部智慧財產局員工消費合作社印製 480737 A7 B7 五、發明說明（^) 表 \ 開放電壓 (V) 短路電流密度 (mA/cm2) 轉換效率 (%) 曲線因子 實施例品1 (無 BSF) 0.655 39.1 19.4 0.769 實施例品2 (有 BSF) 0.665 39.3 20.1 0.769 比較例品 0.581 32.4 14.3 0.760 (請先閱讀背面之注意事項再填寫本頁) 實施例品1及實施例品2中，係將半導體表層部2之 射極層的薄片電阻設定成200Ω/□。另一方面，使用衝破 方式之比較例品，薄片電阻爲40〜50Ω/□。又，如表1所 示般，相較於比較例品，實施例品1及實施例品2不致減 少曲線因子。這可考慮成，因實施例品1及實施例品2之 透明導電層的薄片電阻低，而使抑制接觸電阻的增加受到 抑制。 經濟部智慧財產局員工消費合作社印製 相較於比較品的情形，實施例品1及實施例品2之開 路電壓大幅提昇。這可考慮成，射極層的摻質濃度降低， 而使表面再結合速度降低，又根據半導體層露出區域5可 限制接觸窗面積的結果。又使用實施例品1及實施例品2 之基板1，基於掃描式電子顯微鏡(SEM)之表面觀察，係確 認出半導體層露出區域5在第一主表面的合計面積率爲大 致 10/〇 〇 相較於比較品的情形，實施例品1及實施例品2之短 路電流亦增加。這可考慮成，遮蔽損失的減低和短波長感 27 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 經濟部智慧財產局員工消費合作社印製 Α7 Β7 五、發明說明（外） 度增加所帶來的效果。比較品中，電流在射極層內沿橫方 向流過，本實施例則流過透明導電層6內。透明導電層6 之薄片電阻約10Ω/□，相較於比較例品，就算電極間距例 如加寬2倍也能維持同一程度的電阻損失。因此’可將遮 蔽損失減半，而有助於短路電流的大幅增加。又如圖15所 示般，實施例品1及實施例品2之短波長感度也增加。此 乃基於，如上述所說明般之射極層的摻質濃度變低，而使 表面再結合速度減低之故。 又，實施例品1及實施例品2，藉由分別增加開路電 壓、短路電流、曲線因子，可獲得20%左右的轉換效率。 特別是，在裏面側導入有BSF層之實施例品2，可獲得轉 換效率超過20%之太陽能電池。 又，本實施例之太陽能電池，雖是在裏面全面形成電 極，但和表面同樣地，在裏面側形成透明導電層和梳形電 極，以使光能從裏面側入射般之構造亦可。又，雖形成 200Ω/□之η型擴散層，但只要是比100Ω/□爲高的低， 即可增大短波長感度而提昇太陽能電池特性。又，在製程 中，本實施例雖利用氧化膜（二氧化矽膜）作爲絕緣膜，但 使用氮化矽膜亦可。又，擴散層之形成雖採用熱擴散法， 但只要能形成本發明的構造’不管是離子植入法、旋壓法 等的各種手法皆可。 (實驗例2) 將圖5所示構造的太陽能電池103如下述般製作出。 首先，準備CZ法所製作出之ρ型結晶矽基板1(厚度250 // 28 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------裝--- (請先閱讀背面之注意事項再填寫本頁) 訂·. -線_ 經濟部智慧財產局員工消費合作社印製 480737 A7 B7 五、發明說明（w) m，電阻率〇·5Ω · cm之鎵摻雜品），和實驗例1同樣地蝕 刻除去損傷層後，在基板兩面形成無規紋理面。之後，塗 佈含有P2〇5之塗佈劑’以850°C進行熱擴散，以在表面形 成薄片電阻約100Ω/□之η型擴散層2。 接著，以800°C進行高溫氧化，然後以和實驗例1同 樣的方法形成半導體層露出區域5。之後’和實驗例1同 樣地在第一及第二主表面上分別形成輸出取出用電極7、8 。接著，藉電漿CVD來形成氮化矽膜(兼作反射防止膜之 輔助絕緣膜1〇)，如此即完成太陽能電池1〇3(實施例品3) 。這時，將基板溫度設定於400°C，在膜堆積後，進行和 實驗例1同樣的氫退火處理。對該實施例品3，進行和實 驗例1同樣的性能評價試驗。結果顯示於表2。 表2 \ 開放電壓 (V) 短路電流密度 (mA/cm2) 轉換效率 (%) 曲線因子 實施例品3 0.681 37.1 19.6 0.776 從表2可看出，相較於前述的實施例品1及2，實施 例品3的短路電流減少，但開路電壓增加。短路電流減少 的原因可考慮成，電極寬、電極間距係和習知方式者沒什 麼不同。換言之，相較於表1所示之實施例品1及2，因 其遮蔽面積增加所造成。另一方面，開路電流增加的理由 可考慮成，將基板電阻率從2.0Ω · cm降到0.5Ω · cm所 造成。一般若降低基板電阻率，反向飽和電流密度會減少 ，而造成開路電壓增加。然而，當P型基板之電阻率爲2.0 29 (請先閱讀背面之注意事項再填寫本頁)Printed by JaT ·-丨 The Intellectual Property Bureau of the Ministry of Economic Affairs's Consumer Cooperatives This paper is printed in accordance with the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 480737 A7 B7 DESCRIPTION OF THE INVENTION (I?), Zn2Sn04, Mgln204, CdSb206 doped with yttrium (Y), Galn03 doped with tin, and the like are used as the material of the transparent conductive layer 6. These conductive oxide films can be formed by a vapor-phase film formation method such as a chemical vapor deposition method (CVD) or a physical vapor deposition method (PVD) such as sputtering and vacuum evaporation, and other methods such as a sol method It can be formed. As shown in FIG. 11B, the transparent conductive layer 6 is formed by covering the exposed area 5 of the semiconductor layer and the insulating film 3. As shown in FIG. 7D or FIG. 11C, an output is formed on the transparent conductive layer 6. Take out the electrode 7. In these figures, although the output extraction electrode 7 is formed in a positional relationship that overlaps the exposed area 5 of the semiconductor layer, the transparent conductive layer 6 has high conductivity, as shown in FIG. 12. The formation position may be slightly deviated from the position of the semiconductor layer exposed region 5. From the viewpoint of reducing the series resistance of the solar cell 100, the resistivity of the transparent conductive layer 6 should be adjusted to about 5 × HT5 to 3 × 1 (Γ4Ω · cm. For example, the resistivity 値 of the ITO film produced by sputtering can be, for example, 1 × ΗΓ4 ～ 2 × 8 × 10_4Ω · cm. On the other hand, for example, a nasal plug film produced by CVD method can obtain a film with a low resistivity of IX 1 (Γ4Ω · cm or less). The transparent conductive layer 6 may be used. It has a refractive index different from that of the silicon single crystal constituting the substrate 1, and also has the function of an antireflection film. When the function of the antireflection film is provided, the refractive index of the constituent material of the transparent conductive layer 6 is 1.5 to 2.5. It is appropriate. For example, in the case of a Neisser film, the refractive index is about 2.0, and when its thickness is 40 to 70 // m, a significant antireflection effect can be obtained. In addition, it can be used together with the transparent conductive layer 6 or instead of transparent Conductive 21 (Please read the precautions on the back before filling out this page): Binding:. Thread · This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 480737 A7 B7 V. Description of invention (holes) Layer 6 while another is formed An anti-reflection film is also possible. For example, if a film having a refractive index lower than that of the transparent conductive layer 6 such as a MgF2 film is formed on the transparent conductive layer 6, the reflectance can be further reduced, and the generated current density can be further increased. The output extraction electrode 7, A paste containing metal powder such as silver powder is used to print a desired electrode pattern on the transparent conductive layer 6 by a known thick film printing method such as screen printing, followed by firing to form the electrode pattern. The hardening paste enables the output extraction electrode 7 to be formed at a lower temperature. As shown in FIG. 17, since the first main surface side of the substrate 1 becomes the light receiving surface of the solar cell, the output extraction electrode 7 The incident efficiency of the pn junction 48 is, for example, a structure that can be adopted. It has thick bus bar electrodes formed at appropriate intervals to reduce internal resistance, and branched from the bus bar electrodes at a predetermined interval in a comb shape. Finger electrodes. However, when the conductivity of the transparent conductive layer 6 is very high, the finger electrodes can be omitted, or the formation interval can be made wider when the finger electrodes are formed. Also, as described above, When screen printing is used, the formation width of the output extraction electrode 7 (bus bar electrode or finger electrode) is widened. At this time, as shown in FIG. 1A or FIG. 7D, the output extraction electrode 7 is formed to be exposed across the semiconductor layer. Region 5 and the surrounding insulating layer 3. By screen printing, since the output extraction electrode 7 formed in this unique form is wide, in order to reduce the shielding loss, it is necessary to widen the arrangement interval of the plurality of electrodes. However, Unlike the conventional solar cells manufactured by the conventional method, this structure has a small resistance loss due to the formation of the transparent conductive layer 6, and can improve the conversion efficiency 77. Returning to FIG. 1, on the second main surface of the substrate 1, It is formed to prevent the concave and convex part of the inner reflection, and the insulating film 3 is used to cover the concave and convex part. 22 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm). --- (Please read first Note on the back page, please fill in this page). Consumers ’cooperation with the Intellectual Property Bureau of the Ministry of Economic Affairs f ± printed 480737 A7 B7 V. Invention Description) (Please read the note on the back page before filling out this page) to formA semiconductor layer exposed portion 5 is formed on the top of the convex portion 15. However, since this second main surface side does not become a light-receiving surface, it is entirely covered with the output extraction electrode 8. When the thickness of the substrate 1 is reduced in order to reduce the weight of the solar cell, in order to prevent the recombination and elimination of minority carriers of the electrode 8 on the second main surface side, as shown in FIG. On the main surface side, a high-concentration diffusion layer 9 (so-called BSF (back surface field) layer) having the same conductivity type as the substrate 1 and a higher concentration is formed. The function of the solar cell 100 in FIG. 1 will be described below. As shown in FIG. 16, the solar cell 100 is irradiated with light. If it absorbs photons with energy above the forbidden bandwidth, it will generate electrons and electricity of minority carriers in the p-type region and η-type region due to photoexcitation. Holes and spread toward the joints. At the junction, an internal electric field is generated due to the formation of the galvanic layer (the so-called "build-in electric field" 'is diffused as a minority carrier. The electrons and holes are diffused. Based on the internal electric field, they are pulled into the n-type region ( Electrons) and p-type regions (holes) are separated from each other and become majority carriers. As a result, the ρ-type region and the η-type region will have positive and negative bands, respectively, and the electrodes provided in each part (Fig. 1-7, 8) The electromotive force ΔΕ generated by the solar cell is printed here by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. When using an insulating film to purify the surface of the substrate, if the contact window is formed in a burst manner, the semiconductor layer 2 is here the surface η If the dopant concentration of the surface layer of the mold layer is not set below 3X102 () crrr3 (converted to a sheet resistance of 400Ω / □), the resistance of the electrode contact portion formed by the break cannot be reduced sufficiently, for example, 0 · 01Ωοιη2 That is, in the punching method, in order to reduce the contact resistance loss, it is necessary to increase the dopant concentration of the semiconductor layer 2. In addition, the width of the output extraction electrode 7 formed by screen printing must be as thin as 23 inches. Be applicable National Standard (CNS) A4 specification (210 X 297 public love) '" 480737 A7 B7 V. Description of the invention (β) To ensure 100 // m or more, and in order to make the shielding loss 5%, the electrode spacing must be 2 ~ 3mm. However, according to the structure of the solar cell 100 of FIG. 1, the exposed region 5 of the semiconductor layer of the contact window can be simply formed by simple etching without using a punching method. Therefore, of course, the semiconductor layer 2 can be doped. The mass concentration is set to be smaller than 3 × 102 () (: πΓ3 (converted to a sheet resistance of 400Ω / 0)). As shown in FIG. 13B, since the transparent conductive layer 6 is used, compared with the case where the transparent conductive layer 6 is not used, In the case of FIG. 13A, it is not necessary for a current to flow in a long distance in the semiconductor layer 2. For example, when the transparent conductive layer 6 is a nanocell film or an ITO film, as long as it is provided as an anti-reflection film The thickness used (40 ~ 70 // m), the sheet resistance can be reduced to about 10 ~ 25 Ω / □. With this, the output take-out electrode 7 provided on the transparent conductive layer 6 is compared with the conventional one (2 ~ 3mm), even if doubled, its series resistance will not increase If it is added too much, the masking loss can be greatly reduced. In the above embodiment, the uneven portion is formed by etching, but the uneven portion may be formed by machining. For example, if the groove shape is as shown in FIG. 2B, It can be simply formed by cutting. For example, while rotating a plurality of rotating blades arranged along the axis direction to rotate into a predetermined depth on the surface of the substrate, while moving the substrate and the rotating blade relative to the groove formation direction, the plurality can be changed. The grooves of the rows are formed together. In the present invention, when the series resistance does not increase significantly, as shown in FIG. 7A to FIG. 7C or FIG. 5, the transparent conductive layer 6 can be omitted and the semiconductor layer can be exposed. The electrode 5 for output extraction is in direct contact with the semiconductor layer 2. At this time, as shown in Figure 7F, the unused output power can be removed. 24 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (21 × 297 mm). (Please read the precautions on the back before filling this page. )-_-Line _ Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 480737 A7 B7 V. Description of the invention (Yes) The remaining semiconductor layer exposed area 5 ′ of the electrode 7 is covered with an auxiliary insulating layer 10. The auxiliary insulating layer in the example shown in the figure is formed by covering the remaining semiconductor layer exposed region 5 ', the insulating film 3, and the output taking-out electrode 7 after forming the output taking-out electrode 7. As the material of the auxiliary insulating layer 10, an inorganic insulating film such as nitrided sand or oxidized sand can be used. In time-lapse, 'by appropriately adjusting the thickness of the auxiliary insulating layer 10', the anti-reflection film function can be provided at the same time. (Experimental Example) Hereinafter, the results of experiments performed to confirm the effects of the present invention will be described. (Experimental example 1) A solar cell shown in Fig. 1A was produced by following the steps shown in Fig. 3. First, a boron doped product of p-type crystalline silicon substrate 1 (resistivity 2 Ω · cm (dopant concentration 7.2Xl018cnT3)) in a freshly sliced (as sliced) state cut from a silicon single crystal ingot was prepared. The substrate 1 has a thickness of 300 / zm. This substrate 1 was chemically etched with an aqueous sodium hydroxide solution (concentration mass of 40%) to remove the damaged layer caused by cutting, and then immersed in an aqueous sodium hydroxide solution (sodium hydroxide concentration: 3% by mass) added with isopropanol. Wet etching is applied to form irregularities with irregular textures as shown in FIG. 2A on both main surfaces of the substrate 1. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling in this page)-line. After cleaning the substrate 1 after the bump formation, clean the substrate 1 by dissipating phosphorus to disperse it in the first place. An n-type diffusion layer 2 (phosphorus diffusion layer) with a sheet resistance of 200 Ω / □ is formed on the main surface. Next, the phosphor glass formed on the substrate surface is etched and removed, and then oxidized to form a silicon dioxide film (insulating film 3) having a thickness of about 5 nm on both main surfaces. Then, according to the spin on method, the coating liquid is applied to both sides while sequentially drying the coating solution, so that the convex portion as shown in Fig. 4 can be formed on the top 15 25 25 This paper size applies the Chinese national standard (CNS ) A4 specification (210 X 297 mm) 480737 A7 _ _ B7 V. Description of the invention (prominent way to form an etch protection film 4 mainly composed of a phenolic lacquer-based resin. Then immerse it in hydrofluoric acid at a concentration of 10% by mass In the aqueous solution, only the uranium is removed from the insulating film 3 on the top 25 to form a semiconductor layer exposed portion 5. Then, the substrate is immersed in acetone to dissolve and remove the etching protection film 4. Next, on the first main surface of the substrate 1 Then, a Sb-doped tin dioxide film (transparent conductive layer 6) was deposited by a normal pressure CVD method. The thickness of the transparent conductive layer 6 is 60 nm, which also serves as an anti-reflection film system. Second, on the substrate 1 On the first main surface, a screen printing method using a silver paste was used to form a pattern of the output take-out electrode 7 in the form shown in FIG. 17 on the surface, and an aluminum paste was used on the entire surface of the second main surface. A pattern of the output extraction electrode 8 is formed. At 100 ° C, hydrogen annealing is performed to complete the solar cell 100 (Example 1). In the above phosphorus diffusion step, except that phosphorus is diffused on the surface and boron is diffused at the same time, it is used as described above. 1B, a sample (Example 2) of a solar cell 101 provided with a high-concentration p-type diffusion layer 9 (BSF layer) inside as shown in Fig. 1B is used. On the other hand, the same substrate 1 as described above is used. A solar cell (comparative example) was produced using a conventional punching technique. The transparent electrode 6 was not formed on the comparative example. Each solar cell was subjected to a performance evaluation test as follows. That is, the solar cell was assembled into a 10 cm square The solar cell with a light-receiving area was measured with a solar simulator (light intensity: lkW / m2, spectrum: AM1.5 globa) at a temperature of 25 ° C. The results are shown in Figure 14. Table 1 Shows the solar cell characteristics of these solar cells. Figure 15 shows the internal quantum efficiency of these solar cells. 26 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (please first Read the notes on the back and fill in this page) i. —Line 'Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 480737 A7 B7 V. Description of the invention (^) Table \ Open voltage (V) Short-circuit current density (mA / cm2) Conversion efficiency (%) Curve factor Example product 1 (without BSF) 0.655 39.1 19.4 0.769 Example product 2 (with BSF) 0.665 39.3 20.1 0.769 Comparative example product 0.581 32.4 14.3 0.760 (Please read the precautions on the back before filling this page ) In Example 1 and Example 2, the sheet resistance of the emitter layer of the semiconductor surface layer portion 2 was set to 200 Ω / □. On the other hand, the comparative example using the punch method has a sheet resistance of 40 to 50 Ω / □. In addition, as shown in Table 1, the product of Example 1 and the product of Example 2 did not decrease the curve factor compared with the product of Comparative Example. This is considered to be because the sheet resistance of the transparent conductive layer of Example 1 and Example 2 was low, and the increase in the contact resistance was suppressed. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Compared with the case of the comparative product, the open circuit voltage of the example product 1 and the example product 2 has increased significantly. This can be considered as the result that the dopant concentration of the emitter layer is reduced, the surface recombination speed is reduced, and the result is that the contact window area can be limited according to the exposed area 5 of the semiconductor layer. The substrates 1 of Example 1 and Example 2 were also used. Based on surface observation of a scanning electron microscope (SEM), it was confirmed that the total area ratio of the semiconductor layer exposed region 5 on the first main surface was approximately 10 / 〇〇. Compared with the case of the comparative product, the short-circuit current of Example Product 1 and Example Product 2 also increased. This can be considered as: reduction of masking loss and short-wavelength sensation 27 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 480737 Printed by the Intellectual Property Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs A7 B7 V. Description of the invention The effect of (external) degree increase. In the comparative product, a current flows in the emitter layer in the lateral direction, and in this embodiment, the current flows in the transparent conductive layer 6. The sheet resistance of the transparent conductive layer 6 is about 10 Ω / □. Compared with the comparative example, even if the electrode pitch is doubled, for example, the same resistance loss can be maintained. Therefore 'can halve the shielding loss and contribute to a substantial increase in short-circuit current. As shown in FIG. 15, the short-wavelength sensitivity of Example 1 and Example 2 also increased. This is based on the fact that the dopant concentration of the emitter layer is reduced as described above, and the surface recombination speed is reduced. In addition, in Example 1 and Example 2, by increasing the open circuit voltage, short circuit current, and curve factor, respectively, a conversion efficiency of about 20% can be obtained. In particular, in Example 2 in which a BSF layer was introduced on the back side, a solar cell having a conversion efficiency exceeding 20% can be obtained. In addition, although the solar cell of this embodiment is formed with electrodes on the inside, like the surface, a transparent conductive layer and a comb-shaped electrode are formed on the inside side so that light can be incident from the inside side. In addition, although an n-type diffusion layer of 200 Ω / □ is formed, as long as it is lower than 100 Ω / □, the short-wavelength sensitivity can be increased to improve the characteristics of the solar cell. In the manufacturing process, although an oxide film (silicon dioxide film) is used as the insulating film in this embodiment, a silicon nitride film may be used. In addition, although the diffusion layer is formed by a thermal diffusion method, any method such as an ion implantation method and a spin method may be used as long as the structure of the present invention can be formed. (Experimental example 2) A solar cell 103 having a structure shown in FIG. 5 was produced as follows. First, prepare the ρ-type crystalline silicon substrate 1 (thickness 250 // 28) produced by the CZ method. This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ---------- ---- Equipment --- (Please read the notes on the back before filling out this page) Order ·. -Line _ Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 480737 A7 B7 V. Description of the invention (w) m, resistance A gallium-doped product having a rate of 0.5 Ω · cm) was removed by etching in the same manner as in Experimental Example 1, and then random textured surfaces were formed on both sides of the substrate. Thereafter, a coating agent 'containing P205 was applied to perform thermal diffusion at 850 ° C to form an n-type diffusion layer 2 having a sheet resistance of about 100 Ω / □ on the surface. Next, high-temperature oxidation was performed at 800 ° C, and then a semiconductor layer exposed region 5 was formed in the same manner as in Experimental Example 1. Thereafter, in the same manner as in Experimental Example 1, output extraction electrodes 7, 8 were formed on the first and second main surfaces, respectively. Next, a silicon nitride film (an auxiliary insulating film 10 also serving as an anti-reflection film) is formed by plasma CVD. Thus, a solar cell 10 (Example 3) is completed. At this time, the substrate temperature was set to 400 ° C, and after the film was deposited, the same hydrogen annealing treatment as in Experimental Example 1 was performed. With respect to this Example 3, the same performance evaluation test as in Experimental Example 1 was performed. The results are shown in Table 2. Table 2 \ Opening voltage (V) Short-circuit current density (mA / cm2) Conversion efficiency (%) Curve factor Example product 3 0.681 37.1 19.6 0.776 As can be seen from Table 2, compared with the foregoing example products 1 and 2, The short-circuit current of Example 3 was reduced, but the open-circuit voltage was increased. The reason for the reduction of the short-circuit current can be considered as the electrode width, the electrode spacing and the conventional method are not different. In other words, compared with Examples 1 and 2 shown in Table 1, it is caused by an increase in the shielding area. On the other hand, the reason for the increase in the open circuit current can be considered to be caused by reducing the substrate resistivity from 2.0Ω · cm to 0.5Ω · cm. Generally, if the substrate resistivity is reduced, the reverse saturation current density will decrease and the open circuit voltage will increase. However, when the resistivity of the P-type substrate is 2.0 29 (please read the precautions on the back before filling this page)

本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 _ B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（y) Ω · cm左右時，將有必要檢討光劣化的問題。光劣化所指 的現象，是對太陽能電池單元照射強光將產生太陽能電池 基板的使用壽命減短，而變得無法獲得充分的轉換效率。 爲調查是否有該光劣化，將使用上述摻雜鎵之CZ矽 單結晶基板所製作出之太陽能電池、以及、除使用通常的 摻雜硼之CZ矽單結晶基板(電阻率0.5Ω · cm)外係使用完 全相同的方法來製作出之太陽能電池，於25°C、在上述太 陽模擬器下持續照射擬太陽光，以調查電流電壓特性和光 照射時間的相關性。其結果，若將摻雜硼之基板所製作出 之太陽能電池用擬太陽光照射10小時，則看出有1成左右 的轉換效率劣化。相對於此，使用摻雜鎵之基板的太陽能 電池，雖有若干轉換效率的劣化，但看不出來有相當於劣 化之特性變化。如此般，藉由利用摻雜鎵基板能避免光劣 化的問題，而改善開路電壓和轉換效率。又，本實施例中 ，雖利用CZ法製作出之摻雜鎵p型基板，但將晶格間氧 濃度設爲數ppm以下的MCZ基板、FZ基板也能避免光劣 化問題。又，使用η型基板，使用硼等來形成p型射極層 ，亦能避免光劣化問題。 (實驗例3) 將圖6所示的太陽能電池104如下述般製作出(又，圖 6中爲避免煩雜，並未描繪出凹凸部和反射防止膜，而僅 顯示表面附近的部分）。首先，準備出CZ法所製作出之ρ 型單結晶矽基板1(厚250#m，電阻率2Ω · cm之硼摻雜 品），使用切割機(dicer)，在第一主表面上，以2mm間隔 30 (請先閱讀背面之注意事項再填寫本頁) :裝 . 線· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 480737 A7 _ _ _ B7 五、發明說明（4) 來形成截面呈三角形之肋狀凸部45、45(凸部45、45間之 區域可視爲凹部），這時，從基板1的第一主表面到各凸部 45、45頂部爲止的高度爲約30//m。 接著，化學蝕刻除去損傷層後，在兩主表面形成高度 5#m左右的無規紋理構造（凹凸部）。之後，和實驗例2進 行同樣的熱擴散，以在表面形成薄片電阻約100Ω/匚]之η 型擴散層2，接著進行熱氧化，以形成絕緣膜3之氧化膜 。又，在第二主表面側，藉和實驗例1同樣的方法來形成 蝕刻保護膜，另一方面，在第一主表面上，將橡膠系樹脂 構成的耐氫氟酸規格的印刷耐蝕劑，用網版印刷塗佈成厚 度20/zm，以形成蝕刻保護膜。藉此，使得最初藉切割機 所形成的凸部45、45之頂部25沿稜線方向周期性地突出 印刷耐蝕劑表面。 將耐蝕劑乾燥後，將基板1浸漬於1〇質量％之氫氟酸 水溶液，以在凸部45、45的頂部25形成半導體層露出部 5。接著，用溶媒洗去耐蝕劑後，藉網版印刷法，在第一主 表面上用銀糊料來形成圖6所示之輸出取出用電極7圖案 ，在第二主表面上用鋁糊料來全面形成輸出取出用電極8 的圖案。這時，第一主表面側的輸出取出用電極7，雖有 必要以和凸部45、45頂部之半導體層露出部5重疊的形式 來作對準，但相對於接點寬，由於電極7寬爲半導體層露 出部5寬之10倍左右，故能進行較粗糙的對準。接著，藉 常壓CVD以60nm膜厚來形成反射防止膜之Ti〇2膜(未圖 示），如此即完成太陽能電池1〇4(實施例品4)。 31 本^張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱) ' """"" (請先閱讀背面之注意事項再填寫本頁) 訂—. •線· 經濟部智慧財產局員工消費合作社印製 480737 A7 _B7_ 五、發明說明（？。） 以和實驗例1同樣的方式來進行實施例品4的性能評 價之結果，其開路電壓爲0.667V、短路電流密度爲 36.9mA/cm2、曲線因子0.770、轉換效率19·0%，而獲得比 以往的網版印刷/衝破方式更佳的特性。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 2 3 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 480737 A7 _ B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of invention (y) Ω · cm, it will be necessary to review The problem of light degradation. The phenomenon referred to by photodeterioration is that the solar cell is irradiated with strong light, which shortens the service life of the solar cell substrate and makes it impossible to obtain sufficient conversion efficiency. In order to investigate whether there is such light degradation, a solar cell produced using the above-mentioned gallium-doped CZ silicon single crystal substrate and a conventional boron-doped CZ silicon single crystal substrate (resistivity 0.5Ω · cm) are used. The external system uses the exact same method to produce a solar cell. The pseudo-sunlight is continuously irradiated at 25 ° C under the solar simulator to investigate the correlation between the current-voltage characteristics and the light irradiation time. As a result, when a solar cell produced by a boron-doped substrate was irradiated with pseudo-sunlight for 10 hours, it was found that the conversion efficiency was deteriorated by about 10%. On the other hand, although a solar cell using a gallium-doped substrate has some deterioration in conversion efficiency, it does not show a change in characteristics equivalent to the deterioration. As such, by using a doped gallium substrate, the problem of light degradation can be avoided, and the open circuit voltage and conversion efficiency can be improved. In this embodiment, although a doped gallium p-type substrate produced by the CZ method, the MCZ substrate and the FZ substrate with inter-lattice oxygen concentration of several ppm or less can also avoid the problem of photodeterioration. In addition, using an n-type substrate and using boron or the like to form a p-type emitter layer can also avoid the problem of light degradation. (Experimental example 3) The solar cell 104 shown in FIG. 6 was produced as follows (in addition, in order to avoid confusion, the uneven portion and the antireflection film are not shown in FIG. 6 and only the portion near the surface is shown). First, a p-type single crystal silicon substrate 1 (a boron doped product with a thickness of 250 # m and a resistivity of 2Ω · cm) prepared by the CZ method was prepared, and a dicer was used on the first main surface to 2mm interval 30 (Please read the precautions on the back before filling this page): Packing. Thread · This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 480737 A7 _ _ _ B7 V. Description of the invention (4) The rib-shaped convex portions 45 and 45 having a triangular cross-section are formed (the area between the convex portions 45 and 45 can be regarded as a concave portion). At this time, from the first main surface of the substrate 1 to the top of each convex portion 45 and 45 The height is about 30 // m. Next, after the damaged layer was removed by chemical etching, a random texture structure (concavo-convex portion) having a height of about 5 #m was formed on both main surfaces. Thereafter, the same thermal diffusion was performed as in Experimental Example 2 to form an η-type diffusion layer 2 with a sheet resistance of about 100 Ω / 匚] on the surface, followed by thermal oxidation to form an oxide film of the insulating film 3. On the second main surface side, an etching protection film was formed by the same method as in Experimental Example 1. On the other hand, on the first main surface, a hydrofluoric acid-resistant printing corrosion inhibitor made of a rubber-based resin was used. It was screen-printed to a thickness of 20 / zm to form an etching protection film. Thereby, the tops 25 of the convex portions 45, 45 formed by the cutting machine at first are periodically protruded along the ridge line direction to print the surface of the corrosion resist. After the corrosion inhibitor is dried, the substrate 1 is immersed in a 10% by mass aqueous solution of hydrofluoric acid to form a semiconductor layer exposed portion 5 on the top portions 25 of the convex portions 45 and 45. Next, after the corrosion inhibitor was washed away with a solvent, a silver paste was used on the first main surface to form a pattern of the output-receiving electrode 7 shown in FIG. 6 by screen printing, and an aluminum paste was used on the second main surface. The entire pattern of the output extraction electrode 8 is formed. At this time, although the output extraction electrode 7 on the first main surface side needs to be aligned with the semiconductor layer exposed portion 5 on the top of the convex portions 45 and 45, the electrode 7 width is The exposed portion 5 of the semiconductor layer is about 10 times as wide, so that rough alignment can be performed. Next, a Ti02 film (not shown) of an antireflection film was formed by a normal-pressure CVD to a thickness of 60nm, and thus a solar cell 104 (Example 4) was completed. 31 This standard is applicable to China National Standard (CNS) A4 specification (210 X 297 public love) '" " " " " (Please read the precautions on the back before filling this page) Order —. • Line · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 480737 A7 _B7_ V. Description of the Invention (?.) The performance evaluation result of Example 4 was performed in the same manner as Experimental Example 1. The open circuit voltage was 0.667V and short circuit The current density is 36.9 mA / cm2, the curve factor is 0.770, and the conversion efficiency is 19.0%, and it has better characteristics than the conventional screen printing / punching method. (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 2 3 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

480737 A8 B8 _s__ 六、申請專利範圍 (請先閱讀背面之注意事項再填寫本頁) 1、 一種太陽能電池，係在半導體基板的主表面形成 凹凸部，並用絕緣膜被覆該主表面；其特徵在於： 在主表面形成未被絕緣膜被覆之半導體層露出區域(包 含凹凸部的至少部分凸部的頂部），在該半導體層露出區域 內之凸部頂部的頂端高度位置，係比該半導體層露出區域 的外周緣之絕緣膜的最大高度位置爲高，且在半導體層露 出區域內的凸部之頂部上，以直接或透過其他導電層來間 接接觸的方式形成輸出取出用電極。 2、 如申請專利範圍第1項之太陽能電池，其中，前 述凸部之基端部外周面被前述絕緣膜所被覆，該凸部之頂 端部比絕緣膜的上緣更突出。 3、 如申請專利範圍第1或第2項之太陽能電池，其 中，構成前述半導體層露出區域的外周緣之絕緣膜的內周 緣部上面係形成平坦狀。 4、 如申請專利範圍第1或第2項之太陽能電池，其 中前述其他導電層，係將半導體層露出區域和絕緣膜一起 被覆之透明導電層，並在該透明導電層上形成輸出取出用 電極。 經濟部智慧財產局員工消費合作社印製 5、 一種太陽能電池，係將半導體基板的主表面用絕 緣膜被覆者，其特徵在於： 在主表面上形成未被絕緣膜被覆之半導體層露出區域 ，並形成將半導體層露出區域和絕緣膜一起被覆之透明導 電層，在該透明導電層上形成輸出取出用電極。 6、 如申請專利範圍第1或第2項之太陽能電池，其 1 ______ 本紙張尺度適用中國國家標準（CNS ) A4規格（210X29^37 480737 8 8 8 8 ABCD 六、申請專利範圍 (請先閱讀背面之注意事項再填寫本頁) 中’在主表面上形成複數個前述半導體層露出區域，在該 等半導體層露出區域的部分區域，係以直接接觸半導體層 的方式來形成輸出取出用電極，未形成輸出取出用電極之 殘留的半導體層露出區域，則用透明的輔助絕緣層來被覆 〇 7、 一種太陽能電池，係將半導體基板的主表面用絕 緣膜被覆者，其特徵在於： 在主表面上形成複數個未被絕緣膜被覆之半導體層露 出區域，在該等半導體層露出區域的部分區域，係以直接 接觸半導體層的方式來形成輸出取出甩電極，未形成輸出 取出用電極之殘留的半導體層露出區域，則用透明的輔助 絕緣層來被覆。 8、 如申請專利範圍第6項之太陽能電池，其中前述 輔助絕緣層，係將殘留的半導體層露出區域、絕緣膜、和 輸出取出用電極一起被覆。 9、 如申請專利範圍第7項之太陽能電池，其中前述 輔助絕緣層，係將殘留的半導體層露出區域、絕緣膜、和 輸出取出用電極一起被覆。 經濟部智慧財產局員工消費合作社印製 10、 如申請專利範圍第1或第2項之太陽能電池，其 中，前述半導體層露出區域，係以包含凹凸部的形式用絕 緣膜被覆半導體基板的主表面，且在凸部頂部以外區域將 絕緣膜用蝕刻保護膜被覆，之後藉蝕刻來除去凸部頂部的 絕緣膜，如此般而形成出。 11、 一種太陽能電池，係在半導體基板的主表面形成 _2 _______ 本紙張尺度適用中國國家摞準（CNS)A4^格（210x297公釐） 480737 A8 B8 C8 D8 ______ 六、申請專利範圍 凹凸部’並用絕緣膜被覆該主表面，在主表面形成未被絕 緣膜被覆之半導體層露出區域(包含凹凸部的至少部分凸部 的頂部），且在半導體層露出區域內的凸部之頂部上，以直 接或透過其他導電層來間接接觸的方式形成輸出取出用電 極，其特徵在於： 前述半導體層露出區域，係以包含凹凸部的形式用絕 緣膜被覆半導體基板的主表面，且在凸部頂部以外區域將 絕緣膜用蝕刻保護膜被覆，之後藉蝕刻來除去凸部頂部的 絕緣膜，如此般而形成出。 12 '如申請專利範圍第2或第11項之太陽能電池， 其中前述凹凸部，係由紋理、V槽、倒角錐之任一者所構 成。 13、 如申請專利範圍第1、2、5、7或第11項之太陽 能電池，其中前述半導體層露出區域，在形成有該半導體 層露出區域的主表面上，其合計面積率爲1%以下。 14、 如申請專利範圍第1、2、5、7或第11項之太陽 能電池，其中前述輸出取出用電極，係以橫跨半導體層露 出區域和周圍的絕緣膜之形式來形成出。 經濟部智慧財產局員工消費合作社印製 (請先閲讀背面之注意事項再填寫本頁) 線 15、 一種太陽能電池之製造方法，其特徵爲包含以下 步驟： 在半導體基板的主表面形成凹凸部； 在凹凸部之凸部頂部以外區域，將絕緣膜用蝕刻保護 膜被覆； 藉蝕刻來除去凸部頂部的絕緣膜，以形成未被絕緣膜 3 _^_ 本紙張尺度適用中國國家嫖準（CNS ) A4規格（2丨〇><297公釐） 480737 A8 B8 C8 D8 _ 六、申請專利範圍 被覆之半導體層露出區域(包含部分凸部的頂部）； 在半導體層露出區域的凸部之頂部上，以直接或透過 其他導電層之間接接觸的方式，來形成輸出取出用電極。 16、 如申請專利範圍第15項之太陽能電池之製造方 法，其中，係包含用蝕刻來形成前述凹凸部的步驟。 17、 如申請專利範圍第15或第16項之太陽能電池之 製造方法，其中，係包含用機械加工來形成前述凹凸部之 步驟。 18、 如申請專利範圍第15或第16項之太陽能電池之 製造方法，其係包含：在前述主表面形成複數個半導體層 露出區域之步驟； 在該等半導體層露出區域的部分區域，以直接接觸半 導體層的方式來形成輸出取出用電極之步驟； 將未形成輸出取出用電極之殘留的半導體層露出區域 ，用輔助絕緣層被覆之步驟。 19、 如申請專利範圍第18項之太陽能電池之製造方 法’其中前述輔助絕緣層，係將殘留的半導體層露出區域 、絕緣膜、輸出取出用電極一起被覆。 (請先閱讀背面之注意事項再填寫本頁) ^^1. ,νά 經濟部智慧財產局員工消費合作社印製 4 本紙張尺度適用中國國家g ( CNS ) A4規格（210X297公爱Γ480737 A8 B8 _s__ VI. Scope of patent application (please read the precautions on the back before filling in this page) 1. A solar cell is formed on the main surface of a semiconductor substrate with an uneven portion, and the main surface is covered with an insulating film; it is characterized by : Forming an exposed region of the semiconductor layer not covered by the insulating film (the top of at least a part of the convex portion including the uneven portion) on the main surface, and at the top height position of the top of the convex portion in the exposed region of the semiconductor layer, the semiconductor layer is exposed The maximum height position of the insulating film on the outer periphery of the region is high, and an output extraction electrode is formed on the top of the convex portion in the exposed region of the semiconductor layer, directly or indirectly through other conductive layers. 2. For example, the solar cell of the scope of application for a patent, wherein the outer peripheral surface of the base end portion of the aforementioned convex portion is covered by the aforementioned insulating film, and the top end portion of the convex portion is more prominent than the upper edge of the insulating film. 3. For the solar cell according to item 1 or 2 of the scope of patent application, the upper surface of the inner peripheral portion of the insulating film constituting the outer peripheral edge of the exposed region of the semiconductor layer is flat. 4. For the solar cell of the first or second scope of the patent application, wherein the other conductive layer is a transparent conductive layer that covers the exposed area of the semiconductor layer and the insulating film together, and an output extraction electrode is formed on the transparent conductive layer. . Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. A solar cell that covers the main surface of a semiconductor substrate with an insulating film, which is characterized in that an exposed area of the semiconductor layer not covered by the insulating film is formed on the main surface, and A transparent conductive layer is formed to cover the exposed area of the semiconductor layer together with the insulating film, and an output extraction electrode is formed on the transparent conductive layer. 6. If you apply for a solar cell in the scope of patent application item 1 or 2, 1 ______ This paper size is applicable to Chinese National Standard (CNS) A4 specification (210X29 ^ 37 480737 8 8 8 8 ABCD) 6. Scope of patent application (please read first Note on the back side, please fill in this page again) in 'Form a plurality of exposed areas of the semiconductor layer on the main surface, and in some of these exposed areas of the semiconductor layer, the output extraction electrodes are formed by directly contacting the semiconductor layer, The exposed area of the semiconductor layer where the output extraction electrode is not formed is covered with a transparent auxiliary insulating layer. A solar cell that covers the main surface of a semiconductor substrate with an insulating film is characterized in that: A plurality of exposed areas of the semiconductor layer not covered by the insulating film are formed thereon. In some areas of the exposed areas of the semiconductor layer, the output take-out electrode is formed by directly contacting the semiconductor layer. The exposed area of the semiconductor layer is covered with a transparent auxiliary insulating layer. The solar cell according to the sixth item of the invention, wherein the auxiliary insulating layer covers the exposed area of the semiconductor layer, the insulating film, and the output extraction electrode together. 9. The solar cell according to the seventh item of the patent application, wherein the aforementioned Auxiliary insulation layer is to cover the exposed area of the semiconductor layer, the insulation film, and the electrodes for output extraction. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 10, such as solar cells for the first or second scope of patent application, Wherein, the exposed region of the semiconductor layer covers the main surface of the semiconductor substrate with an insulating film in a form including an uneven portion, and the insulating film is covered with an etching protection film in an area other than the top of the convex portion, and then the top of the convex portion is removed by etching. The insulation film is formed like this. 11. A solar cell is formed on the main surface of a semiconductor substrate_2 _______ This paper size is applicable to China National Standard (CNS) A4 ^ (210x297 mm) 480737 A8 B8 C8 D8 ______ VI. Patent Application Convex and Concavities' and covering the main surface with an insulating film, The exposed area of the semiconductor layer (including the top of at least part of the convex portion including the uneven portion) on the surface is not covered by the insulating film, and on the top of the convex portion in the exposed area of the semiconductor layer, it is directly or indirectly contacted through another conductive layer. The output extraction electrode is characterized in that the exposed region of the semiconductor layer covers the main surface of the semiconductor substrate with an insulating film in the form of an uneven portion, and the insulating film is covered with an etching protection film in a region other than the top of the convex portion. Afterwards, the insulating film on the top of the convex portion is removed by etching, and it is formed like this. 12 'Such as a solar cell in the scope of patent application No. 2 or 11, wherein the aforementioned concave-convex portion is made of any of texture, V-groove, and chamfered cone. Constituted by one. 13. For a solar cell with the scope of patent application Nos. 1, 2, 5, 7, or 11, wherein the exposed area of the semiconductor layer, the total area ratio of the exposed area of the semiconductor layer is 1% or less . 14. For the solar cell of claim 1, 2, 5, 7, or 11 in which the aforementioned output extraction electrode is formed in the form of an insulating film across the exposed area of the semiconductor layer and the surroundings. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling out this page) Line 15. A method for manufacturing a solar cell, which is characterized by the following steps: forming a bump on the main surface of a semiconductor substrate; The insulating film is covered with an etching protection film in the area other than the top of the convex portion of the concave and convex portion; the insulating film on the top of the convex portion is removed by etching to form an uninsulated film 3 _ ^ _ This paper standard is applicable to China National Standards (CNS ) A4 specification (2 丨 〇 < 297 mm) 480737 A8 B8 C8 D8 _ VI. Exposed area of the semiconductor layer covered by the patent application (including the top of part of the convex portion); In the convex portion of the exposed area of the semiconductor layer On the top, an output extraction electrode is formed directly or through contact between other conductive layers. 16. The method for manufacturing a solar cell according to item 15 of the scope of patent application, further comprising the step of forming the uneven portion by etching. 17. The method for manufacturing a solar cell according to claim 15 or 16, which includes a step of forming the uneven portion by machining. 18. The manufacturing method of a solar cell, such as the scope of application of the patent No. 15 or 16, includes the steps of: forming a plurality of exposed areas of the semiconductor layer on the aforementioned main surface; A step of forming an output take-out electrode by contacting the semiconductor layer; a step of exposing the remaining semiconductor layer where the output take-out electrode is not formed, and covering it with an auxiliary insulating layer. 19. The manufacturing method of a solar cell according to item 18 of the scope of the application for patent, wherein the auxiliary insulating layer is to cover the exposed area of the remaining semiconductor layer, the insulating film, and the output extraction electrode together. (Please read the notes on the back before filling in this page) ^^ 1., Νά Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 4 This paper size is applicable to Chinese national g (CNS) A4 specifications (210X297 public love Γ)
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