WO2011074280A1 - Photovoltaic device and method for preparation thereof - Google Patents

Photovoltaic device and method for preparation thereof Download PDF

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Publication number
WO2011074280A1
WO2011074280A1 PCT/JP2010/058288 JP2010058288W WO2011074280A1 WO 2011074280 A1 WO2011074280 A1 WO 2011074280A1 JP 2010058288 W JP2010058288 W JP 2010058288W WO 2011074280 A1 WO2011074280 A1 WO 2011074280A1
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Prior art keywords
electrode
back surface
semiconductor substrate
opening
film
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PCT/JP2010/058288
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French (fr)
Japanese (ja)
Inventor
剛彦 佐藤
秀一 檜座
雅 酒井
松野　繁
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三菱電機株式会社
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Publication of WO2011074280A1 publication Critical patent/WO2011074280A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/054—Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means
    • H01L31/056—Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means the light-reflecting means being of the back surface reflector [BSR] type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/52—PV systems with concentrators
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a photovoltaic device and a method for manufacturing the same, and more particularly to a photovoltaic device having a back surface passivation structure capable of improving efficiency in a crystalline silicon-based photovoltaic device and a method for manufacturing the same. is there.
  • a currently manufactured solar cell using a polycrystalline silicon substrate has a p-type polycrystalline silicon substrate formed with a p-type polycrystalline silicon substrate having a surface texture, an n-type diffusion layer, and an antireflection film that increase the light absorption rate.
  • a comb-shaped silver (Ag) electrode (light-receiving surface-side electrode) is formed on the light-receiving surface side of the polycrystalline silicon substrate, and an aluminum (Al) electrode (back-surface electrode) is formed on the non-light-receiving surface side using screen printing, followed by firing. It is manufactured by the manufacturing process of.
  • baking has the effect of volatilizing and baking the electrode paste components of the silver (Ag) electrode and aluminum (Al) electrode printed by screen printing.
  • firing is a process in which a comb-shaped silver (Ag) electrode breaks through the antireflection film on the light-receiving surface side and connects to the n-type impurity diffusion layer, and an aluminum (Al) electrode on the non-light-receiving surface side A part of the p-type polycrystalline silicon substrate side diffuses into the p-type polycrystalline silicon substrate to form a back surface field layer (BSF).
  • a comb-shaped silver (Ag) electrode breaks through the antireflection film on the light-receiving surface side and connects to the n-type impurity diffusion layer
  • Al aluminum
  • This BFS layer applies an electric field to the back surface of the p-type polycrystalline silicon substrate to provide a barrier against minority carriers, thereby driving off minority carriers from the vicinity of the aluminum (Al) electrode and recombining carriers near the aluminum (Al) electrode. It is provided for the purpose of obtaining a high open circuit voltage by suppressing.
  • a contact portion between the back electrode and the substrate is formed as a point for the purpose of further suppressing carrier recombination on the back surface side of the substrate, and a region other than the contact portion on the back surface of the substrate is formed.
  • a substrate back surface is passivated by covering with an insulating film (back surface passivation film) having a function (passivation effect) for repairing defects on the substrate surface (see, for example, Patent Document 1, Patent Document 2, and Non-Patent Document 1). ).
  • Patent Document 1 and Non-Patent Document 1 after forming a diffusion bonding layer and an antireflection film on the light receiving surface side of the substrate, a back surface passivation film is formed, and a part of the back surface passivation film is used as an electrode contact portion. Is opened by laser, etc., electrodes such as aluminum (Al) are formed on the back surface by screen printing, etc., electrodes are formed on the light-receiving surface side, and finally the electrodes on the front and back are baked collectively. The method of doing is described.
  • Al aluminum
  • the passivation effect may be reduced.
  • the aluminum (Al) electrode formed on the passivation film is in the form of particles, and there is a problem that long wavelength light reaching the back surface cannot be effectively reflected and is absorbed there.
  • the present invention has been made in view of the above, and an object thereof is to obtain a photovoltaic device having good solar cell characteristics and a method for manufacturing the photovoltaic device.
  • a photovoltaic device includes a first conductivity type semiconductor substrate having an impurity diffusion layer in which a second conductivity type impurity element is diffused on one side.
  • the openings have a substantially rectangular shape in the in-plane direction of the back surface of the semiconductor substrate, and a plurality of the openings are arranged in substantially parallel rows in the short direction of the openings.
  • the second electrode is embedded in the opening. Rarely presenting a substantially rectangular shape substantially equal to the opening, a plurality of the second electrodes are arranged in a substantially parallel row in the short direction of the second electrode, and the second in one row in the short direction of the second electrode.
  • the inter-electrode pitch which is the distance between the center position of the electrode and the center position of the second electrode in the adjacent row, is in the range of 1.5 mm to 3.0 mm, and the width of the second electrode in the short direction is 20 ⁇ m to It is characterized by being in the range of 200 ⁇ m.
  • FIG. 1-1 is a cross-sectional view of relevant parts for explaining the cross-sectional structure of the solar battery cell according to the first embodiment of the present invention.
  • FIG. 1-2 is a top view of the solar cell according to the first embodiment of the present invention as viewed from the light receiving surface side.
  • FIG. 1-3 is a bottom view of the solar battery cell according to Embodiment 1 of the present invention as viewed from the side opposite to the light receiving surface (back surface side).
  • 1-4 is an essential part cross-sectional view showing an enlarged back surface structure of the solar battery cell according to the first embodiment of the present invention.
  • FIG. FIG. 2 is a flowchart for explaining the manufacturing process of the solar battery cell according to the first embodiment of the present invention.
  • FIGS. 3-1 is a cross-sectional view for explaining a manufacturing step for the solar battery cell according to the first embodiment of the present invention.
  • FIG. 3-2 is a cross-sectional view for explaining a manufacturing step for the solar battery cell according to the first embodiment of the present invention.
  • FIGS. 3-3 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention.
  • FIGS. FIGS. 3-4 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention.
  • FIGS. FIGS. 3-5 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention.
  • FIGS. FIG. 4 is a characteristic diagram showing voltage-current characteristics of the solar battery cell according to the example of the present invention.
  • FIG. 5 is a characteristic diagram showing the relationship between the laser irradiation position and the extraction current in the solar cell of the example having an interelectrode pitch of 2 mm.
  • FIG. 6 is a characteristic diagram showing the relationship between the laser irradiation position and the extraction current in the solar battery cell of the example having an interelectrode pitch of 1 mm.
  • the inventors opened the back surface passivation film on the back surface of the solar cell by forming and firing the electrodes by local screen printing with a size that covers the openings on the back surface in various shapes and patterns.
  • the solar cell provided was formed and the solar cell characteristics were examined.
  • the pattern of the opening and the electrode shape by screen printing on the opening greatly affect the solar cell characteristics.
  • a small point contact portion having an outer diameter of about several tens of nanometers is formed and screen printing and firing of the back electrode are performed, the electrode formed during firing Part of the alloy layer is pulled out with the thermal contraction of the electrode when the temperature is lowered after firing, voids are generated, and the electrical connection of the opening is broken.
  • a solar battery cell that has both a suppression of increase in series resistance and a passivation effect in forming a passivation structure by screen printing and firing through an opening, and has better solar battery characteristics than a conventional structure.
  • FIG. FIGS. 1-1 to 1-4 are diagrams showing a configuration of a solar cell that is a photovoltaic device according to the present embodiment
  • FIG. 1-1 is a diagram for explaining a cross-sectional structure of the solar cell.
  • 1-2 is a top view of the solar cell viewed from the light receiving surface side
  • FIG. 1-3 is a bottom view of the solar cell viewed from the side opposite to the light receiving surface (back side)
  • FIG. 1-1 is a cross-sectional view of an essential part taken along line AA in FIG. 1-2.
  • the solar cell according to the present embodiment is a solar cell substrate having a photoelectric conversion function and having a pn junction, and An antireflection film 4 made of a silicon nitride film (SiN film) which is an insulating film formed on the light receiving surface side (surface) and prevents reflection of incident light on the light receiving surface, and a light receiving surface side of the semiconductor substrate 1 On the surface (front surface), the light receiving surface side electrode 5 which is the first electrode formed in conduction with the semiconductor substrate 1 and the silicon nitride film (SiN) formed on the surface (back surface) opposite to the light receiving surface of the semiconductor substrate 1.
  • SiN film silicon nitride film
  • the semiconductor substrate 1 is a first conductivity type layer, and a p-type polycrystalline silicon substrate 2 and an impurity diffusion layer (n-type impurity) which is a second conductivity type layer formed by phosphorous diffusion on the light receiving surface side of the semiconductor substrate 1.
  • a pn junction is constituted by the diffusion layer 3.
  • the p-type polycrystalline silicon substrate 2 has a size of 150 mm ⁇ 150 mm and a resistivity of 0.5 ⁇ cm to 3 ⁇ cm.
  • the light-receiving surface side electrode 5 includes a grid electrode 6 and a bus electrode 7 of the solar battery cell, and is electrically connected to the n-type impurity diffusion layer 3.
  • the grid electrode 6 is locally provided on the light receiving surface to collect electricity generated by the semiconductor substrate 1.
  • the bus electrode 7 is provided substantially orthogonal to the grid electrode 6 in order to take out the electricity collected by the grid electrode 6.
  • the back surface side electrode 9 is formed in a stripe shape in a state surrounded by a plurality of back surface insulating films (back surface passivation films) 8 provided over the entire back surface of the semiconductor substrate 1 and is electrically connected to the semiconductor substrate 1.
  • the back insulating film (back passivation film) 8 is provided with a substantially rectangular opening 8 a reaching the back surface of the semiconductor substrate 1. Then, in the plane of the back surface insulating film (back surface passivation film) 8, filling the opening 8 a and in the width direction of the opening 8 a (the dimension in the short direction of the line-shaped back surface insulating film (back surface passivation film) 8).
  • a plurality of rectangular (striped) back-side electrodes 9 made of an electrode material containing aluminum, glass or the like are provided so as to slightly overlap the back-side insulating film (back-side passivation film) 8.
  • the back surface side electrode 9 should just be provided in the area
  • the inter-electrode pitch P in the short side direction (width direction of the opening 8a) of the back-side electrode 9 formed in a stripe shape is set to 1.5 mm to 3.0 mm.
  • the inter-electrode pitch P is the distance between the center position in the short direction of the back surface side electrode 9 and the center position in the short direction of the adjacent back surface side electrode 9. That is, the distance between the center position in the short direction of the opening 8a and the center position in the short direction of the opening 8a of the adjacent row.
  • the opening width W of the opening 8a is 20 ⁇ m to 200 ⁇ m.
  • the width of the back-side electrode 9 is approximately 20 ⁇ m to 200 ⁇ m although it slightly overlaps with the back-side insulating film (back-side passivation film) 8. Further, the electrode length (length in the longitudinal direction) L of the back-side electrode 9 is set to a dimension close to the length of one side of the semiconductor substrate 1.
  • the back surface insulating film (back surface passivation film) 8 is made of a silicon nitride film (SiN film), and is formed on almost the entire back surface of the semiconductor substrate 1 by a plasma CVD (Chemical Vapor Deposition) method.
  • the back surface reflection film 10 is provided so as to cover at least the back surface insulating film (back surface passivation film) 8.
  • the back surface reflecting film 10 is provided on the back surface of the semiconductor substrate 1 so as to cover the back surface side electrode 9 and the back surface insulating film (back surface passivation film) 8.
  • the material of the back surface reflection film 10 for example, a material having a high reflectivity with respect to long wavelength light is used. Thereby, long wavelength light can be efficiently taken into the semiconductor substrate 1, a high generated current (Jsc) can be realized, and output characteristics can be improved.
  • a material for example, silver (Ag) or aluminum (Al) can be used.
  • an aluminum-silicon (Al—Si) alloy portion 11 is formed in a region on the back surface side of the semiconductor substrate 1 and in contact with the back surface side electrode 9 and in the vicinity thereof.
  • a BSF (Back Surface Filed layer) 12 which is a high-concentration diffusion layer having the same conductivity type as the p-type polycrystalline silicon substrate 2, surrounds the aluminum-silicon (Al—Si) alloy part 11 on the outer periphery. Is formed.
  • the solar cell configured as described above, sunlight is applied from the light receiving surface side of the solar cell to the pn junction surface of the semiconductor substrate 1 (the junction surface between the p-type polycrystalline silicon substrate 2 and the n-type impurity diffusion layer 3).
  • the generated electrons move toward the n-type impurity diffusion layer 3, and the holes move toward the p-type polycrystalline silicon substrate 2.
  • the number of electrons in the n-type impurity diffusion layer 3 becomes excessive, and the number of holes in the p-type polycrystalline silicon substrate 2 becomes excessive.
  • photovoltaic power is generated.
  • This photovoltaic power is generated in the direction of biasing the pn junction in the forward direction, the light receiving surface side electrode 5 connected to the n-type impurity diffusion layer 3 becomes a negative electrode, and the back surface side electrode 9 connected to the p-type polycrystalline silicon substrate 2. Becomes a positive pole, and current flows in an external circuit (not shown).
  • FIG. 2 is a flowchart for explaining a manufacturing process of the solar battery cell according to the present embodiment.
  • FIGS. 3-1 to 3-9 are cross-sectional views for explaining the manufacturing process of the solar battery cell according to the present embodiment.
  • a p-type polycrystalline silicon substrate most frequently used for consumer solar cells is prepared (hereinafter referred to as a p-type polycrystalline silicon substrate 1a).
  • a polycrystalline silicon substrate having dimensions of, for example, 150 mm ⁇ 150 mm and a resistivity of about 0.5 ⁇ cm to 3 ⁇ cm is used.
  • the p-type polycrystalline silicon substrate 1a is manufactured by slicing an ingot formed by cooling and solidifying molten silicon with a wire saw, damage at the time of slicing remains on the surface. Therefore, the p-type polycrystalline silicon substrate 1a is first removed by immersing the surface of the p-type polycrystalline silicon substrate 1a in an acid or a heated alkaline solution, for example, in an aqueous solution of sodium hydroxide so as to remove the damaged layer. Thus, the damaged region existing near the surface of the p-type polycrystalline silicon substrate 1a is removed.
  • minute unevenness is formed as a texture structure on the light receiving surface side surface of the p-type polycrystalline silicon substrate 1a (FIG. 3-1, step S10).
  • a texture structure By forming such a texture structure on the light receiving surface side of the semiconductor substrate 1, multiple reflection of light is caused on the surface of the solar battery cell, and light incident on the solar battery cell is efficiently transmitted to the p-type polycrystalline silicon substrate. 1a can be absorbed, and the reflectance can be effectively reduced and the conversion efficiency can be improved.
  • FIG. 3A the illustration of the texture structure is omitted.
  • this invention is invention concerning the back surface structure of a photovoltaic apparatus, it does not restrict
  • an alkaline aqueous solution containing isopropyl alcohol, a method using acid etching mainly composed of a mixed solution of hydrofluoric acid and nitric acid, or a mask material partially provided with an opening is formed on the surface of the p-type polycrystalline silicon substrate 1a.
  • Any method such as a method of obtaining a honeycomb structure or an inverted pyramid structure on the surface of the p-type polycrystalline silicon substrate 1a by etching through the mask material, or a method using reactive gas etching (RIE) Can be used.
  • RIE reactive gas etching
  • this p-type polycrystalline silicon substrate 1a is put into a thermal oxidation furnace and heated in an atmosphere of phosphorus (P) which is an n-type impurity.
  • phosphorus (P) is diffused on the surface of the p-type polycrystalline silicon substrate 1a, and an n-type impurity diffusion layer 3 is formed as a bonding layer having a conductivity type opposite to that of the p-type polycrystalline silicon substrate 1a.
  • a bond is formed (FIG. 3-2, step S20).
  • the n-type impurity diffusion layer 3 is formed by heating the p-type polycrystalline silicon substrate 1a in a phosphorus oxychloride (POCl3) gas atmosphere at a temperature of 800 ° C. to 850 ° C., for example.
  • POCl3 phosphorus oxychloride
  • a phosphorus glass layer mainly composed of glass is formed on the surface immediately after the formation of the n-type impurity diffusion layer 3, it is removed using a hydrofluoric acid solution or the like.
  • a silicon nitride film (SiN film) is formed as the antireflection film 4 on the light receiving surface side of the p-type polycrystalline silicon substrate 1a on which the n-type impurity diffusion layer 3 is formed in order to improve the photoelectric conversion efficiency (FIG. 3-3, Step S30).
  • a plasma CVD method is used, and a silicon nitride film is formed as the antireflection film 4 using a mixed gas of silane and ammonia.
  • the film thickness and refractive index of the antireflection film 4 are set to values that most suppress light reflection. Note that two or more films having different refractive indexes may be laminated as the antireflection film 4. Further, a different film forming method such as a sputtering method may be used for forming the antireflection film 4. Further, a silicon oxide film may be formed as the antireflection film 4.
  • the n-type impurity diffusion layer 3 formed on the back surface of the p-type polycrystalline silicon substrate 1a is removed by diffusion of phosphorus (P) (FIG. 3-4, step S40).
  • P phosphorus
  • the removal of the n-type impurity diffusion layer 3 formed on the back surface of the p-type polycrystalline silicon substrate 1a is performed using, for example, a single-sided etching apparatus.
  • a method of using the antireflection film 4 as a mask material and immersing the entire p-type polycrystalline silicon substrate 1a in an etching solution may be used.
  • an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide heated to room temperature to 95 ° C., preferably 50 ° C. to 70 ° C., or a mixed aqueous solution of nitric acid and hydrofluoric acid can be used.
  • the silicon surface exposed on the back surface of the semiconductor substrate 1 is washed in order to keep the recombination rate low in film formation described later. Cleaning is performed, for example, by RCA cleaning (step S50).
  • a back surface insulating film (back surface passivation film) 8 made of a silicon nitride film (SiN film) is formed on the back surface side (opposite to the light receiving surface) of the semiconductor substrate 1 (FIG. 3-5, step S60).
  • a back surface insulating film (back surface passivation film) 8 made of a silicon nitride film (SiN film) having a thickness of about 100 nm to 200 nm is formed by plasma CVD.
  • a stripe-shaped opening 8a for formation is formed (FIG. 3-6, step S70).
  • the stripe-shaped openings 8a are formed by, for example, direct patterning by laser irradiation on the back surface insulating film (back surface passivation film) 8. Laser irradiation is performed, for example, with a spot diameter (opening width W of the opening 8a) of 60 nm and an interval of 0.5 mm to 3.0 mm. Further, the length of the opening 8 a is set to a dimension close to the length of one side of the semiconductor substrate 1.
  • the film is applied in a limited manner by screen printing so as not to contact the backside electrode material paste 9a that covers a region that is slightly larger than the diameter and fills the adjacent opening 8a (FIG. 3-7, step S80).
  • the application shape, the application amount, and the like of the back surface side electrode material paste 9a are set such that, for example, the opening width W of the opening 8a: the electrode thickness T after firing is 1.5: 1.
  • the electrode thickness T after baking is the height from the back surface insulating film (back surface passivation film) 8 of the back electrode 9 after baking.
  • a light receiving surface electrode material paste 5 a which is an electrode material of the light receiving surface side electrode 5 and contains silver (Ag), glass or the like is formed into the shape of the light receiving surface side electrode 5. It is selectively applied by screen printing and dried (FIG. 3-7, step S80).
  • the light-receiving surface electrode material paste 5a for example, prints a pattern of long grid electrodes 6 and a pattern of strip-shaped bus electrodes 7 in a direction substantially orthogonal to the pattern.
  • step S90 firing is performed at, for example, a peak temperature of 760 ° C. to 900 ° C. using an infrared heating furnace (FIG. 3-8, step S90).
  • the light receiving surface side electrode 5 and the back surface side electrode 9 are formed, and the Al—Si alloy portion 11 is formed in the region on the back surface side of the semiconductor substrate 1 and in contact with the back surface side electrode 9 and its vicinity. Is done.
  • a BSF 12 that is a p + region in which aluminum is diffused in a high concentration from the back surface side electrode 9 is formed on the outer periphery of the Al—Si alloy portion 11, and the BSF layer 12 and the back surface side electrode 9 are electrically connected to each other. Connect.
  • a forming gas annealing process is performed at 300 ° C. to 400 ° C. for 10 minutes in an atmosphere of a forming gas (for example, an inert gas containing 5% hydrogen) (step S100).
  • a forming gas for example, an inert gas containing 5% hydrogen
  • the region where the back electrode material paste 9a is not applied on the back surface of the semiconductor substrate 1 is protected by the back surface insulating film (passivation film) 8 made of a silicon nitride film (SiN film).
  • the adherence and fixation of contaminants do not proceed to the back surface of the semiconductor substrate 1, and a good state is maintained without degrading the recombination speed.
  • a highly reflective structure is formed on the back side of the semiconductor substrate 1. That is, a silver (Ag) film (silver sputtering film) is formed on the entire back surface of the semiconductor substrate 1 by vapor deposition so as to cover the back surface side electrode 9 and the back surface insulating film (passivation film) 8 ( FIG. 3-9, step S110). In addition, you may form the back surface reflecting film 10 by adhesion
  • Ag silver sputtering film
  • the solar battery cell according to Embodiment 1 shown in FIGS. 1-1 to 1-4 is manufactured.
  • the order of application of the paste as the electrode material may be switched between the light receiving surface side and the back surface side.
  • a solar battery cell was produced according to the method for manufacturing a solar battery cell according to this embodiment described above, and this was used as a solar battery cell of the example. Further, for comparison of solar cell characteristics, an aluminum electrode as a back electrode 9 is formed on the entire back surface of the semiconductor substrate 1 without forming a back insulating film (passivation film) 8 on the back surface of the semiconductor substrate 1. Except having formed, the photovoltaic cell was formed like the manufacturing method of the photovoltaic cell concerning this Embodiment mentioned above, and this was made into the photovoltaic cell of the comparative example A.
  • the manufacture of the solar battery cell according to this embodiment described above is performed. Then, the solar cell is formed by filling the opening 8a and forming an aluminum electrode as the back side electrode 9 on the entire back side of the semiconductor substrate 1 and then forming the solar cell. A solar battery cell was obtained.
  • a back surface insulating film (passivation film) 8 on the back surface side of the semiconductor substrate 1, circular (dot-shaped) openings having a diameter of 0.1 mm to 0.3 mm are formed at intervals of 0.5 mm to 2.5 mm. And further fills the circular (dot-shaped) opening and covers an area somewhat wider than the diameter of the circular (dot-shaped) opening in the in-plane direction of the back surface insulating film (back surface passivation film) 8
  • a solar cell was formed by forming an aluminum electrode so as not to come into contact with the back-side electrode material paste 9a filling the circular (dot-shaped) opening to be made, and this was used as the solar cell of Comparative Example C.
  • FIG. 4 is a characteristic diagram showing voltage-current characteristics of the solar battery cell according to the example.
  • each of the product of the open circuit voltage and the short circuit current (Voc ⁇ Jsc), the fill factor (FF), and the conversion efficiency (Eff) with respect to the interelectrode pitch P of the back-side electrode 9 is used as a parameter of the voltage-current characteristic.
  • the values normalized by taking the value obtained from the IV measurement of Comparative Example A as 1 were plotted.
  • the pitch P between the backside electrodes 9 increased, the product of the open circuit voltage and the short circuit current (Voc ⁇ Jsc) increased, but the fill factor (FF) tended to decrease.
  • the conversion efficiency (Eff) when the inter-electrode pitch P of the back surface side electrodes 9 is 1.5 mm to 3.0 mm, aluminum (Al) as the back surface side electrode 9 is formed on the entire back surface side of the semiconductor substrate 1. It exceeded the conversion efficiency (Eff) of the solar battery cell of Comparative Example A in which the electrodes were formed, and the conversion efficiency (Eff) was maximized when the interelectrode pitch P was around 2 mm.
  • the extracted currents were compared by the LBIC (laser beam induced current) method.
  • this examination was performed before formation of the back surface reflection film 10 by the high reflectance material in the cell formation process.
  • a laser having a wavelength of 653 nm is applied from the back side of the semiconductor substrate 1 across several back side electrodes 9 in a direction substantially perpendicular to the extending direction of the striped back side electrodes 9.
  • the semiconductor substrate 1 was irradiated, and the amount of current flowing between the front and back electrodes was measured with respect to the laser irradiation position.
  • FIG. 5 is a characteristic diagram showing the relationship between the laser irradiation position and the extraction current (A) in the solar cell of the example having an interelectrode pitch P of 2 mm.
  • FIG. 6 is a characteristic diagram showing the relationship between the laser irradiation position and the extraction current (A) in the solar battery cell of the example having an interelectrode pitch P of 1 mm. 5 and 6 indicate that the larger the area surrounded by the mountain-shaped plot, the larger the extracted current amount. 5 and 6, it can be seen that the laser extraction current decreases in the range of about 0.5 mm from the back electrode 9 in the laser irradiation direction.
  • the above-described book is formed until the stripe-shaped openings 8a are formed at intervals of 2 mm after the back surface insulating film (passivation film) 8 is formed on the back surface side of the semiconductor substrate 1.
  • the solar cell is manufactured in the same manner as the method for manufacturing the solar cell according to the embodiment, and then the aluminum electrode as the back side electrode 9 is formed on the entire back side of the semiconductor substrate 1 while filling the opening 8a.
  • the conversion efficiency exceeded that of the sample in which the metal thin film was formed as the back surface reflecting film as in this embodiment. could not get.
  • Comparative Example B the entire back surface is covered with Al by screen printing, but Al by this screen printing is in the form of particles and has a low light reflectance.
  • the long wavelength light that passed through the substrate and reached the back surface was absorbed by the electrode, and the reflection efficiency was lowered, so the light absorption efficiency in the substrate was lowered, and the short circuit current depending on the amount of generated carriers was reduced. Conceivable.
  • the short circuit current increase by the effect of back surface reflection was able to be confirmed.
  • a back surface insulating film (passivation film) 8 on the back surface side of the semiconductor substrate 1, circular (dot-shaped) openings having a diameter of 0.1 mm to 0.3 mm are formed at intervals of 0.5 mm to 2.5 mm.
  • the fill factor (FF) was as small as 0.7 or less.
  • FF fill factor
  • voids are less likely to occur by increasing the opening area by making the opening 8a reaching the back surface of the semiconductor substrate 1 into a rectangular shape (linear shape). Further, even when a void is generated, a portion where a void is formed and a portion where a void is not formed in the rectangular (linear) opening 8a are alternately arranged in the longitudinal direction of the opening 8a in the same opening 8a. As a result, disconnection due to voids and increase in contact resistance are less likely to occur, and a decrease in fill factor (FF) can be suppressed.
  • FF fill factor
  • the inter-electrode pitch P between the back-side electrodes 9 formed in a stripe shape is 1.5 mm or less, a sufficient passivation effect cannot be obtained due to deterioration of the back-side insulating film (passivation film) 8 or the like.
  • the inter-electrode pitch P of the back-side electrodes 9 formed in a stripe shape is 3.0 mm or more, the resistance when the generated carriers move to the back-side electrodes 9 increases.
  • the inter-electrode pitch P of the back-side electrodes 9 formed in a stripe shape is 1.5 mm to 3.0 mm, it is possible to achieve both a good passivation effect that exceeds the conventional structure and a suppression of an increase in series resistance. it can.
  • the length of the striped back electrode 9 is not limited to this, and the opening 8a is rectangular, and the back electrode 9 adjacent in the direction perpendicular to the longitudinal direction of the opening 8a in the back surface. If the inter-electrode pitch P is in the range of 1.5 mm to 3.0 mm, the same effect can be obtained even if the rectangular backside electrodes 9 having an electrode length L that is at least twice the electrode width are arranged. It is done. That is, the plurality of back surface side electrodes 9 may be discontinuously arranged in the direction of the electrode length L.
  • the printing pattern of the back surface side electrode 9 formed on the opening part 8a was made into the stripe form which covers the opening part 8a, and the opening width W of the opening part 8a was 60 micrometers. .
  • the opening width W of the opening 8a is less than 20 ⁇ m with respect to the inter-electrode pitch P of 1.5 mm or more, the contact resistance increases.
  • the opening width W of the opening 8a is 200 ⁇ m or more with respect to the inter-electrode pitch P of 1.5 mm or more
  • the area occupied by the back-side electrode 9 increases with respect to the electrode interval, thereby reducing the passivation effect. Therefore, it is possible to achieve both a low contact resistance and a passivation effect by setting the opening width W of the opening 8a to 20 ⁇ m to 200 ⁇ m.
  • the opening width W of the opening 8a is set to 20 ⁇ m to 200 ⁇ m, and has a shape similar to that of the opening 8a and slightly overlaps with the back surface insulating film (passivation film) 8 around the opening 8a.
  • the back surface side electrode 9 Is covered with an aluminum (Al) electrode (back surface side electrode 9), thereby reducing the ratio of the aluminum (Al) electrode (back surface side electrode 9) to be formed on the back surface insulating film (passivation film) 8 and increasing the passivation effect. Can be improved. Note that the overlap between the back surface insulating film (passivation film) 8 and the aluminum (Al) electrode (back surface side electrode 9) around the opening 8a is necessary because of the alignment during printing. 9, the width of the back electrode 9 may be 20 ⁇ m to 200 ⁇ m, which is the same as the opening width W of the opening 8a.
  • the electrode thickness T after firing affects the volume due to the heat shrinkage of the electrode.
  • the opening width W of the opening 8a: the electrode thickness T after firing is 1.5: 1, but the opening width W of the opening 8a: the electrode thickness after firing.
  • T is larger than “2: 1”, that is, when the electrode thickness T after firing is less than 50% of the opening width W of the opening 8a, the thickness of the BSF layer 12 is not sufficient, and the solar cell characteristics Leading to a decline.
  • the electrode thickness T after baking is smaller than “1: 1”, that is, the electrode thickness T after baking is larger than 100% of the opening width W of the opening 8a.
  • the electrode volume is large, the suction and void of the electrode are easily formed due to the thermal contraction of the electrode after firing. Therefore, when the opening width W of the opening 8a is in the range of the electrode thickness T after firing of “1: 1 to 2: 1”, that is, the electrode thickness T after firing is 50% or more of the opening width W of the opening 8a.
  • a high fill factor (FF) is obtained when it is in the range of 100% or less.
  • the back surface reflecting film 10 is formed of a highly reflective metal thin film after the electrodes are fired.
  • the aluminum (Al) electrode formed by screen printing on the back surface insulating film (passivation film) 8 becomes particulate, and long wavelength light reaching the back surface cannot be effectively reflected and absorbed there. Therefore, the printing area of the aluminum (Al) electrode is limited only to the opening 8a and its peripheral area, and the other area is covered with a metal thin film having a high reflectance to form the back surface reflecting film 10, thereby forming the back surface on the back surface. The light on the long wavelength side that reaches can be reflected, and the light can be effectively absorbed by the semiconductor substrate 1.
  • a solar battery cell having good solar battery characteristics can be obtained.
  • a p-type polycrystalline silicon substrate is used as the semiconductor substrate 1, but p-type single crystal silicon may be used instead of p-type polycrystalline silicon.
  • FIG. 2 a modification of the method for manufacturing the solar battery cell described in the first embodiment will be described with reference to FIG.
  • the structure of the solar battery cell manufactured according to Embodiment 2 is the same as that of Embodiment 1, and is the structure shown in FIGS. 1-1 to 1-2.
  • steps S10 to S80 in FIG. 2 are performed, and the light receiving surface side electrode 5 and the back surface side electrode 9 are formed by screen printing in the same manner as in the first embodiment (before firing).
  • Step S90 firing is performed at a peak temperature of 760 ° C. to 900 ° C. using, for example, an infrared heating furnace.
  • the light receiving surface side electrode 5 and the back surface side electrode 9 are formed, and the Al—Si alloy portion 11 is formed in the region on the back surface side of the semiconductor substrate 1 and in contact with the back surface side electrode 9 and its vicinity. Is done.
  • the silver in the light receiving surface side electrode 5 penetrates the antireflection film 4, and the n-type impurity diffusion layer 3 and the light receiving surface side electrode 5 are electrically connected.
  • the cooling rate in the vicinity of 600 ° C. to 700 ° C. in the cooling process after firing is set to 10 to 30 ° C./sec.
  • an infrared heating furnace in which a heating chamber and a cooling chamber are separated, and cooling is performed by transporting the semiconductor substrate 1 to the cooling chamber after heating.
  • nitrogen for example, is introduced into the cooling chamber as an inert gas and cooled in a non-oxidizing atmosphere so as not to oxidize as much as possible when aluminum (Al) solidifies during the cooling process.
  • a forming gas annealing process is performed at 300 ° C. to 400 ° C. for 10 minutes in an atmosphere of a forming gas (for example, an inert gas containing 5% hydrogen).
  • a highly reflective structure is formed on the back side of the semiconductor substrate 1. That is, a silver (Ag) film (silver sputtering film) is formed on the entire back surface of the semiconductor substrate 1 by a sputtering method so as to cover the back surface side electrode 9 and the back surface insulating film (passivation film) 8.
  • Ag silver sputtering film
  • the rate of temperature decrease in the vicinity of 600 ° C. to 700 ° C. at which aluminum (Al) solidifies after firing is set to 10 to 30 ° C./sec. Suction of the alloy part 11 can be suppressed.
  • the series resistance can be reduced as compared with the solar cell of Comparative Example D, whereas the fill factor of the solar cell of Comparative Example D was 0.75.
  • the solar cell characteristics were improved by 0.77.
  • the case where a p-type silicon substrate is used as the semiconductor substrate has been described.
  • a reverse conductivity type solar cell in which a p-type diffusion layer is formed using an n-type silicon substrate.
  • a polycrystalline silicon substrate is used as the semiconductor substrate, a single crystal silicon substrate may be used.
  • the size of the semiconductor substrate is 150 mm ⁇ 150 mm, but the size of the semiconductor substrate is not limited to this.
  • the photovoltaic device according to the present invention is useful for the production of a photovoltaic device having good solar cell characteristics.
  • SYMBOLS 1 Semiconductor substrate 1a p-type polycrystalline silicon substrate 2 p-type polycrystalline silicon substrate 3 n-type impurity diffusion layer 4 Antireflection film 5 Light-receiving surface side electrode 5a Light-receiving surface electrode material paste 6 Grid electrode 7 Bus electrode 8 Back surface insulating film 8a Opening Part 9 Back side electrode 9a Back side electrode material paste 10 Back reflective film 11 Aluminum-silicon (Al-Si) alloy part 12 BSF layer P Pitch between electrodes L Back side electrode length (length in longitudinal direction) T Electrode thickness after firing W Opening width of opening

Abstract

The disclosed photovoltaic device comprises a semiconductor substrate (1) of a first conductivity type having an impurity diffusion layer (3), an antireflection film (4) formed on the impurity diffusion layer (3), first electrodes (5) connected electrically to the impurity diffusion layer (3), a reverse-face insulation film (8) having openings (8a) penetrating to the other face side of the semiconductor substrate (1) and formed on the other face side of the semiconductor substrate (1), second electrodes (9) connected electrically to the other face side of the semiconductor substrate (1), and a reverse-face reflection film (10) formed so as to cover at least the reverse-face insulation film (8). The openings (8a) are respectively in nearly a rectangular shape in the face plane direction of the reverse face of the semiconductor substrate (1), and a plurality thereof are arranged in nearly parallel lines in the short-length direction of the opening (8a). The second electrodes (9) are respectively nearly in the same shape as the openings (8a) and a plurality thereof are arranged in nearly parallel lines at an electrode pitch ranging from 1.5 to 3.0 mm in short-length direction of the second electrode (9). The width of the second electrode (9) in the short length direction ranges from 20 to 200 μm.

Description

光起電力装置およびその製造方法Photovoltaic device and manufacturing method thereof
　本発明は、光起電力装置およびその製造方法に関するものであり、特に、結晶シリコン系の光起電力装置において高効率化が可能な裏面パッシベーション構造を有する光起電力装置およびその製造方法に関するものである。 The present invention relates to a photovoltaic device and a method for manufacturing the same, and more particularly to a photovoltaic device having a back surface passivation structure capable of improving efficiency in a crystalline silicon-based photovoltaic device and a method for manufacturing the same. is there.
　現在製造されている多結晶シリコン基板を用いた太陽電池は、ｐ型多結晶シリコン基板の受光面側に光吸収率を高める表面テクスチャーとｎ型拡散層と反射防止膜とを形成し、ｐ型多結晶シリコン基板の受光面側にくし型の銀（Ａｇ）電極（受光面側電極）を、また非受光面側にアルミニウム（Ａｌ）電極（裏面電極）をスクリーン印刷を用いて形成した後に焼成するという製造プロセスにより作製される。ここで、焼成は、スクリーン印刷で印刷した銀（Ａｇ）電極およびアルミニウム（Ａｌ）電極の電極ペースト成分を揮発させて焼き付ける効果を有する。また、焼成は、この効果に加え、受光面側ではくし型の銀（Ａｇ）電極が反射防止膜を突き破ってｎ型不純物拡散層に接続するプロセス、また非受光面側ではアルミニウム（Ａｌ）電極のｐ型多結晶シリコン基板側の一部がｐ型多結晶シリコン基板に拡散することにより裏面電界層（ＢＳＦ：Back　Surface　Field）を形成するというプロセスも兼ねている。 A currently manufactured solar cell using a polycrystalline silicon substrate has a p-type polycrystalline silicon substrate formed with a p-type polycrystalline silicon substrate having a surface texture, an n-type diffusion layer, and an antireflection film that increase the light absorption rate. A comb-shaped silver (Ag) electrode (light-receiving surface-side electrode) is formed on the light-receiving surface side of the polycrystalline silicon substrate, and an aluminum (Al) electrode (back-surface electrode) is formed on the non-light-receiving surface side using screen printing, followed by firing. It is manufactured by the manufacturing process of. Here, baking has the effect of volatilizing and baking the electrode paste components of the silver (Ag) electrode and aluminum (Al) electrode printed by screen printing. In addition to this effect, firing is a process in which a comb-shaped silver (Ag) electrode breaks through the antireflection film on the light-receiving surface side and connects to the n-type impurity diffusion layer, and an aluminum (Al) electrode on the non-light-receiving surface side A part of the p-type polycrystalline silicon substrate side diffuses into the p-type polycrystalline silicon substrate to form a back surface field layer (BSF).
　このＢＦＳ層は、ｐ型多結晶シリコン基板の裏面に電界を掛けて少数キャリアに対する障壁を設けることにより少数キャリアをアルミニウム（Ａｌ）電極付近から追い払い、アルミニウム（Ａｌ）電極付近でのキャリア再結合を抑制することにより高い開放電圧を得ることを目的として設けられる。 This BFS layer applies an electric field to the back surface of the p-type polycrystalline silicon substrate to provide a barrier against minority carriers, thereby driving off minority carriers from the vicinity of the aluminum (Al) electrode and recombining carriers near the aluminum (Al) electrode. It is provided for the purpose of obtaining a high open circuit voltage by suppressing.
　より高効率な太陽電池を作製する方法として、基板の裏面側でのキャリア再結合をさらに抑制する目的で裏面電極と基板とのコンタクト部をポイント状とし、基板裏面における該コンタクト部以外の領域を基板表面の欠陥を補修する機能（パッシベーション効果）を有する絶縁膜（裏面パッシーべーション膜）で覆って基板裏面をパッシベーションする方法がある（例えば、特許文献１、特許文献２、非特許文献１参照）。 As a method for producing a more efficient solar cell, a contact portion between the back electrode and the substrate is formed as a point for the purpose of further suppressing carrier recombination on the back surface side of the substrate, and a region other than the contact portion on the back surface of the substrate is formed. There is a method in which a substrate back surface is passivated by covering with an insulating film (back surface passivation film) having a function (passivation effect) for repairing defects on the substrate surface (see, for example, Patent Document 1, Patent Document 2, and Non-Patent Document 1). ).
　また、特許文献１および非特許文献１には基板の受光面側に拡散による接合層、反射防止膜を形成した後、裏面パッシベーション膜を形成し、電極のコンタクト部として該裏面パッシベーション膜の一部をレーザー等により開口し、スクリーン印刷等により裏面にアルミニウム（Ａｌ）等の電極を形成し、また受光面側に電極を形成し、最後に表裏の電極を一括して焼成することにより電極の焼付けを行う方法が記載されている。この方法においては、同時に裏面側のアルミニウム（Ａｌ）が開口部を通してシリコン（Ｓｉ）と反応することによりＢＳＦ層を形成するため、従来の裏面全面にアルミニウム（Ａｌ）のＢＳＦ層を形成する方法と共通なプロセスが多いため、低コストで形成が可能であるという特徴を有する。 In Patent Document 1 and Non-Patent Document 1, after forming a diffusion bonding layer and an antireflection film on the light receiving surface side of the substrate, a back surface passivation film is formed, and a part of the back surface passivation film is used as an electrode contact portion. Is opened by laser, etc., electrodes such as aluminum (Al) are formed on the back surface by screen printing, etc., electrodes are formed on the light-receiving surface side, and finally the electrodes on the front and back are baked collectively. The method of doing is described. In this method, since a BSF layer is formed by simultaneously reacting aluminum (Al) on the back surface side with silicon (Si) through the opening, a conventional method of forming a BSF layer of aluminum (Al) on the entire back surface; Since there are many common processes, it can be formed at low cost.
特開２００２－２４６６２５号公報JP 2002-246625 A 特表２００８－５３３７３０号公報Special table 2008-533730 gazette
　しかしながら、非特許文献１の技術のようにパッシベーション膜上の全面にアルミニウム電極ペーストを印刷して焼成すると、パッシベーション効果が低下することがある。また、パッシベーション膜上に形成されたアルミニウム（Ａｌ）電極は粒子状となり、裏面まで到達した長波長光を有効に反射できずにそこで吸収してしまう、という問題があった。 However, if the aluminum electrode paste is printed and baked on the entire surface of the passivation film as in the technique of Non-Patent Document 1, the passivation effect may be reduced. In addition, the aluminum (Al) electrode formed on the passivation film is in the form of particles, and there is a problem that long wavelength light reaching the back surface cannot be effectively reflected and is absorbed there.
　本発明は、上記に鑑みてなされたものであって、良好な太陽電池特性を有する光起電力装置およびその製造方法を得ることを目的とする。 The present invention has been made in view of the above, and an object thereof is to obtain a photovoltaic device having good solar cell characteristics and a method for manufacturing the photovoltaic device.
　上述した課題を解決し、目的を達成するために、本発明にかかる光起電力装置は、一面側に第２導電型の不純物元素が拡散された不純物拡散層を有する第１導電型の半導体基板と、前記不純物拡散層上に形成された反射防止膜と、前記反射防止膜を貫通して前記不純物拡散層に電気的に接続する第１電極と、前記半導体基板の他面側に達する複数の開口部を有して前記半導体基板の他面側に形成された裏面絶縁膜と、前記半導体基板の他面側に電気的に接続する複数の第２電極と、少なくとも前記裏面絶縁膜上を覆って形成された裏面反射膜と、を備え、前記開口部は、前記半導体基板の裏面の面内方向において略長方形状を呈するとともに該開口部の短手方向において複数本が略平行な列に配列され、前記第２電極は、前記開口部に埋め込まれて前記開口部と略等しい略長方形状を呈するとともに該第２電極の短手方向において複数本が略平行な列に配列され、前記第２電極の短手方向において一つの列の前記第２電極の中心位置と隣接する列の前記第２電極の中心位置との間隔である電極間ピッチが１．５ｍｍ～３．０ｍｍの範囲であり、前記第２電極の短手方向における幅が２０μｍ～２００μｍの範囲であること、を特徴とする。 In order to solve the above-described problems and achieve the object, a photovoltaic device according to the present invention includes a first conductivity type semiconductor substrate having an impurity diffusion layer in which a second conductivity type impurity element is diffused on one side. An antireflection film formed on the impurity diffusion layer, a first electrode that penetrates the antireflection film and is electrically connected to the impurity diffusion layer, and a plurality of layers reaching the other surface side of the semiconductor substrate A back surface insulating film formed on the other surface side of the semiconductor substrate with an opening, a plurality of second electrodes electrically connected to the other surface side of the semiconductor substrate, and covering at least the back surface insulating film. And the openings have a substantially rectangular shape in the in-plane direction of the back surface of the semiconductor substrate, and a plurality of the openings are arranged in substantially parallel rows in the short direction of the openings. And the second electrode is embedded in the opening. Rarely presenting a substantially rectangular shape substantially equal to the opening, a plurality of the second electrodes are arranged in a substantially parallel row in the short direction of the second electrode, and the second in one row in the short direction of the second electrode. The inter-electrode pitch, which is the distance between the center position of the electrode and the center position of the second electrode in the adjacent row, is in the range of 1.5 mm to 3.0 mm, and the width of the second electrode in the short direction is 20 μm to It is characterized by being in the range of 200 μm.
　本発明によれば、良好なパッシベーション効果と直列抵抗の増加の抑制とを両立することができ、良好な太陽電池特性を有する太陽電池セルが得られる、という効果を奏する。 According to the present invention, it is possible to achieve both a good passivation effect and a suppression of an increase in series resistance, and an effect is obtained that a solar battery cell having good solar battery characteristics can be obtained.
図１－１は、本発明の実施の形態１にかかる太陽電池セルの断面構造を説明するための要部断面図である。FIG. 1-1 is a cross-sectional view of relevant parts for explaining the cross-sectional structure of the solar battery cell according to the first embodiment of the present invention. 図１－２は、本発明の実施の形態１にかかる太陽電池セルを受光面側からみた上面図である。FIG. 1-2 is a top view of the solar cell according to the first embodiment of the present invention as viewed from the light receiving surface side. 図１－３は、本発明の実施の形態１にかかる太陽電池セルを受光面と反対側（裏面側）から見た下面図である。FIG. 1-3 is a bottom view of the solar battery cell according to Embodiment 1 of the present invention as viewed from the side opposite to the light receiving surface (back surface side). 図１－４は、本発明の実施の形態１にかかる太陽電池セルの裏面構造を拡大して示す要部断面図である。1-4 is an essential part cross-sectional view showing an enlarged back surface structure of the solar battery cell according to the first embodiment of the present invention. FIG. 図２は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するためのフローチャートである。FIG. 2 is a flowchart for explaining the manufacturing process of the solar battery cell according to the first embodiment of the present invention. 図３－１は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するための断面図である。FIG. 3-1 is a cross-sectional view for explaining a manufacturing step for the solar battery cell according to the first embodiment of the present invention. 図３－２は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するための断面図である。FIG. 3-2 is a cross-sectional view for explaining a manufacturing step for the solar battery cell according to the first embodiment of the present invention. 図３－３は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するための断面図である。FIGS. 3-3 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention. FIGS. 図３－４は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するための断面図である。FIGS. 3-4 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention. FIGS. 図３－５は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するための断面図である。FIGS. 3-5 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention. FIGS. 図３－６は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するための断面図である。FIGS. 3-6 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention. FIGS. 図３－７は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するための断面図である。FIGS. 3-7 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention. FIGS. 図３－８は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するための断面図である。FIGS. 3-8 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention. FIGS. 図３－９は、本発明の実施の形態１にかかる太陽電池セルの製造工程を説明するための断面図である。FIGS. 3-9 is sectional drawing for demonstrating the manufacturing process of the photovoltaic cell concerning Embodiment 1 of this invention. FIGS. 図４は、本発明の実施例にかかる太陽電池セルの電圧―電流特性を示す特性図である。FIG. 4 is a characteristic diagram showing voltage-current characteristics of the solar battery cell according to the example of the present invention. 図５は、電極間ピッチが２ｍｍの実施例の太陽電池セルにおけるレーザー照射位置と取り出し電流との関係を示す特性図である。FIG. 5 is a characteristic diagram showing the relationship between the laser irradiation position and the extraction current in the solar cell of the example having an interelectrode pitch of 2 mm. 図６は、電極間ピッチが１ｍｍの実施例の太陽電池セルにおけるレーザー照射位置と取り出し電流との関係を示す特性図である。FIG. 6 is a characteristic diagram showing the relationship between the laser irradiation position and the extraction current in the solar battery cell of the example having an interelectrode pitch of 1 mm.
　以下に、本発明にかかる光起電力装置およびその製造方法の実施の形態を図面に基づいて詳細に説明する。なお、本発明は以下の記述に限定されるものではなく、本発明の要旨を逸脱しない範囲において適宜変更可能である。また、以下に示す図面においては、理解の容易のため、各部材の縮尺が実際とは異なる場合がある。各図面間においても同様である。 Hereinafter, embodiments of the photovoltaic device and the manufacturing method thereof according to the present invention will be described in detail with reference to the drawings. In addition, this invention is not limited to the following description, In the range which does not deviate from the summary of this invention, it can change suitably. In the drawings shown below, the scale of each member may be different from the actual scale for easy understanding. The same applies between the drawings.
　パッシベーション効果や裏面反射の効果を高めるためには、裏面のスクリーン印刷によるアルミニウム（Ａｌ）電極を局部的に印刷するのが有効である。発明者らは、太陽電池セルの裏面におけるパッシベーション部を様々な形状、パターンで開口し、その上に開口部をカバーする大きさの局所的なスクリーン印刷による電極形成および焼成により、裏面パッシベーション膜を備えた太陽電池を形成し、太陽電池特性について検討を行った。 In order to enhance the passivation effect and the back reflection effect, it is effective to locally print the aluminum (Al) electrode by screen printing on the back side. The inventors opened the back surface passivation film on the back surface of the solar cell by forming and firing the electrodes by local screen printing with a size that covers the openings on the back surface in various shapes and patterns. The solar cell provided was formed and the solar cell characteristics were examined.
　その結果、開口部を介したスクリーン印刷においては、開口部のパターンおよびその上のスクリーン印刷による電極形状が太陽電池特性に大きく影響を与えることがわかった。具体的には、従来多用されていた円形あるいは正方形状の開口形状では、外形数十ｎｍ程度の小さなポイントコンタクト部を形成して裏面電極のスクリーン印刷および焼成を行うと、焼成時に形成された電極部の合金層が焼成後の降温時の電極の熱収縮に伴って引き抜かれ、ボイドが発生し、開口部の電気的接続が断線する。 As a result, it was found that in the screen printing through the opening, the pattern of the opening and the electrode shape by screen printing on the opening greatly affect the solar cell characteristics. Specifically, in a circular or square opening shape that has been widely used in the past, when a small point contact portion having an outer diameter of about several tens of nanometers is formed and screen printing and firing of the back electrode are performed, the electrode formed during firing Part of the alloy layer is pulled out with the thermal contraction of the electrode when the temperature is lowered after firing, voids are generated, and the electrical connection of the opening is broken.
　ポイントコンタクト部の面積を大きくした場合には上述したようなボイドは形成されないが、電極間隔を保ったままポイントコンタクト部の面積を増大させると、良好なパッシベーション特性を示す領域の面積が低下するため、パッシベーション特性が低下する。 When the area of the point contact portion is increased, voids as described above are not formed, but if the area of the point contact portion is increased while maintaining the electrode spacing, the area of the region exhibiting good passivation characteristics is reduced. , The passivation characteristics are reduced.
　また、ポイントコンタクト部との面積比を保ったままパッシベーション部の面積を増大させると、電極間の距離が増大するため、直列抵抗が増大し、いずれにおいてもアルミニウム（Ａｌ）電極を全面に印刷した従来の太陽電池特性を上回る特性を得ることができなかった。 Further, when the area of the passivation portion is increased while maintaining the area ratio with the point contact portion, the distance between the electrodes increases, so the series resistance increases, and in both cases, an aluminum (Al) electrode is printed on the entire surface. The characteristics exceeding the conventional solar cell characteristics could not be obtained.
　以下では、開口部を介したスクリーン印刷および焼成によるパッシベーション構造形成において直列抵抗の増加の抑制とパッシベーション効果とを両立し、従来構造を上回る良好な太陽電池特性を有する太陽電池セルについて説明する。 Hereinafter, a description will be given of a solar battery cell that has both a suppression of increase in series resistance and a passivation effect in forming a passivation structure by screen printing and firing through an opening, and has better solar battery characteristics than a conventional structure.
実施の形態１．
　図１－１～図１－４は、本実施の形態にかかる光起電力装置である太陽電池セルの構成を示す図であり、図１－１は太陽電池セルの断面構造を説明するための要部断面図、図１－２は受光面側からみた太陽電池セルの上面図、図１－３は受光面と反対側（裏面側）からみた太陽電池セルの下面図、図１－４は太陽電池セルの裏面構造を拡大して示す要部断面図である。図１－１は、図１－２の線分Ａ－Ａにおける要部断面図である。 Embodiment 1 FIG.
FIGS. 1-1 to 1-4 are diagrams showing a configuration of a solar cell that is a photovoltaic device according to the present embodiment, and FIG. 1-1 is a diagram for explaining a cross-sectional structure of the solar cell. 1-2 is a top view of the solar cell viewed from the light receiving surface side, FIG. 1-3 is a bottom view of the solar cell viewed from the side opposite to the light receiving surface (back side), and FIG. It is principal part sectional drawing which expands and shows the back surface structure of a photovoltaic cell. FIG. 1-1 is a cross-sectional view of an essential part taken along line AA in FIG. 1-2.
　本実施の形態にかかる太陽電池セルは、図１－１～図１－４に示されるように、光電変換機能を有する太陽電池基板であってｐｎ接合を有する半導体基板１と、半導体基板１の受光面側の面（表面）に形成されて受光面での入射光の反射を防止する絶縁膜であるシリコン窒化膜（ＳｉＮ膜）からなる反射防止膜４と、半導体基板１の受光面側の面（表面）において半導体基板１に導通して形成された第１電極である受光面側電極５と、半導体基板１の受光面と反対側の面（裏面）に形成されたシリコン窒化膜（ＳｉＮ膜）からなる裏面絶縁膜（裏面パッシベーション膜）８と、半導体基板１の裏面において裏面絶縁膜（裏面パッシベーション膜）８に囲まれて形成された第２電極である裏面側電極９と、半導体基板１の裏面において裏面絶縁膜（裏面パッシベーション膜）８と裏面側電極９とを覆って設けられた裏面反射膜１０と、を備える。 As shown in FIGS. 1-1 to 1-4, the solar cell according to the present embodiment is a solar cell substrate having a photoelectric conversion function and having a pn junction, and An antireflection film 4 made of a silicon nitride film (SiN film) which is an insulating film formed on the light receiving surface side (surface) and prevents reflection of incident light on the light receiving surface, and a light receiving surface side of the semiconductor substrate 1 On the surface (front surface), the light receiving surface side electrode 5 which is the first electrode formed in conduction with the semiconductor substrate 1 and the silicon nitride film (SiN) formed on the surface (back surface) opposite to the light receiving surface of the semiconductor substrate 1. A backside insulating film (backside passivation film) 8 made of a film), a backside electrode 9 as a second electrode formed on the backside of the semiconductor substrate 1 surrounded by the backside insulating film (backside passivation film) 8, and a semiconductor substrate On the back of 1 It includes a back reflection film 10 provided to cover the film (back surface passivation film) 8 and the back surface side electrode 9, a.
　半導体基板１は、第１導電型層であり、ｐ型多結晶シリコン基板２と、半導体基板１の受光面側にリン拡散によって形成された第２導電型層である不純物拡散層（ｎ型不純物拡散層）３と、によりｐｎ接合が構成されている。ｐ型多結晶シリコン基板２の大きさは、１５０ｍｍ×１５０ｍｍであり、抵抗率が０．５Ωｃｍ～３Ωｃｍとされている。 The semiconductor substrate 1 is a first conductivity type layer, and a p-type polycrystalline silicon substrate 2 and an impurity diffusion layer (n-type impurity) which is a second conductivity type layer formed by phosphorous diffusion on the light receiving surface side of the semiconductor substrate 1. A pn junction is constituted by the diffusion layer 3. The p-type polycrystalline silicon substrate 2 has a size of 150 mm × 150 mm and a resistivity of 0.5 Ωcm to 3 Ωcm.
　受光面側電極５は、太陽電池セルのグリッド電極６およびバス電極７を含み、ｎ型不純物拡散層３に電気的に接続されている。グリッド電極６は、半導体基板１で発電された電気を集電するために受光面に局所的に設けられている。バス電極７は、グリッド電極６で集電された電気を取り出すためにグリッド電極６にほぼ直交して設けられている。 The light-receiving surface side electrode 5 includes a grid electrode 6 and a bus electrode 7 of the solar battery cell, and is electrically connected to the n-type impurity diffusion layer 3. The grid electrode 6 is locally provided on the light receiving surface to collect electricity generated by the semiconductor substrate 1. The bus electrode 7 is provided substantially orthogonal to the grid electrode 6 in order to take out the electricity collected by the grid electrode 6.
　一方、裏面側電極９は、半導体基板１の裏面に全体にわたって設けられた複数の裏面絶縁膜（裏面パッシベーション膜）８に囲まれた状態でストライプ状に形成され、半導体基板１に電気的に接続されている。すなわち、裏面絶縁膜（裏面パッシベーション膜）８には、半導体基板１の裏面に達する略長方形状の開口部８ａが設けられている。そして、該開口部８ａを埋めるとともに裏面絶縁膜（裏面パッシベーション膜）８の面内において、開口部８ａの幅（ライン状の裏面絶縁膜（裏面パッシベーション膜）８の短手方向の寸法）方向に裏面絶縁膜（裏面パッシベーション膜）８と若干の重なりを有するようにアルミニウム、ガラス等を含む電極材料からなる長方形状（ストライプ状）の裏面側電極９が複数設けられている。なお、裏面側電極９は、少なくとも開口部８ａ上の領域に設けられていればよい。 On the other hand, the back surface side electrode 9 is formed in a stripe shape in a state surrounded by a plurality of back surface insulating films (back surface passivation films) 8 provided over the entire back surface of the semiconductor substrate 1 and is electrically connected to the semiconductor substrate 1. Has been. That is, the back insulating film (back passivation film) 8 is provided with a substantially rectangular opening 8 a reaching the back surface of the semiconductor substrate 1. Then, in the plane of the back surface insulating film (back surface passivation film) 8, filling the opening 8 a and in the width direction of the opening 8 a (the dimension in the short direction of the line-shaped back surface insulating film (back surface passivation film) 8). A plurality of rectangular (striped) back-side electrodes 9 made of an electrode material containing aluminum, glass or the like are provided so as to slightly overlap the back-side insulating film (back-side passivation film) 8. In addition, the back surface side electrode 9 should just be provided in the area | region on the opening part 8a at least.
　また、ストライプ状に形成された裏面側電極９の短手方向（開口部８ａの幅方向）における電極間ピッチＰは、１．５ｍｍ～３．０ｍｍとされる。ここで、電極間ピッチＰは、裏面側電極９の短手方向における中心位置と、隣接する裏面側電極９の短手方向における中心位置との距離である。すなわち、開口部８ａの短手方向における中心位置と、隣接する列の開口部８ａの短手方向における中心位置との距離である。また、開口部８ａの開口幅Ｗは、２０μｍ～２００μｍとされる。したがって、裏面側電極９の幅は、裏面絶縁膜（裏面パッシベーション膜）８と若干の重なりを有するものの、概ね２０μｍ～２００μｍとされる。また、裏面側電極９の電極長さ（長手方向の長さ）Ｌは、半導体基板１の一辺の長さに近い寸法とされている。 Also, the inter-electrode pitch P in the short side direction (width direction of the opening 8a) of the back-side electrode 9 formed in a stripe shape is set to 1.5 mm to 3.0 mm. Here, the inter-electrode pitch P is the distance between the center position in the short direction of the back surface side electrode 9 and the center position in the short direction of the adjacent back surface side electrode 9. That is, the distance between the center position in the short direction of the opening 8a and the center position in the short direction of the opening 8a of the adjacent row. The opening width W of the opening 8a is 20 μm to 200 μm. Therefore, the width of the back-side electrode 9 is approximately 20 μm to 200 μm although it slightly overlaps with the back-side insulating film (back-side passivation film) 8. Further, the electrode length (length in the longitudinal direction) L of the back-side electrode 9 is set to a dimension close to the length of one side of the semiconductor substrate 1.
　裏面絶縁膜（裏面パッシベーション膜）８は、シリコン窒化膜（ＳｉＮ膜）からなり、半導体基板１の裏面のほぼ全面にプラズマＣＶＤ（Chemical　Vapor　Deposition）法により形成されている。 The back surface insulating film (back surface passivation film) 8 is made of a silicon nitride film (SiN film), and is formed on almost the entire back surface of the semiconductor substrate 1 by a plasma CVD (Chemical Vapor Deposition) method.
　裏面反射膜１０は、少なくとも裏面絶縁膜（裏面パッシベーション膜）８上を覆って、もうけられる。本実施の形態では、裏面反射膜１０は半導体基板１の裏面において裏面側電極９および裏面絶縁膜（裏面パッシベーション膜）８を覆って設けられている。裏面絶縁膜（裏面パッシベーション膜）８を覆う裏面反射膜１０を備えることにより、半導体基板１および裏面絶縁膜（裏面パッシベーション膜）８を透過してきた光を反射して半導体基板１に戻すことができ、良好な光閉じ込め効果を得ることができる。 The back surface reflection film 10 is provided so as to cover at least the back surface insulating film (back surface passivation film) 8. In the present embodiment, the back surface reflecting film 10 is provided on the back surface of the semiconductor substrate 1 so as to cover the back surface side electrode 9 and the back surface insulating film (back surface passivation film) 8. By providing the back surface reflecting film 10 covering the back surface insulating film (back surface passivation film) 8, the light transmitted through the semiconductor substrate 1 and the back surface insulating film (back surface passivation film) 8 can be reflected and returned to the semiconductor substrate 1. A good light confinement effect can be obtained.
　裏面反射膜１０の材料としては、例えば長波長の光に対する反射率の高い材料が用いられる。これにより、長波長の光を半導体基板１に効率良く取り込み、高い発生電流（Ｊｓｃ）を実現することができ、出力特性を向上させることができる。このような材料としては、例えば銀（Ａｇ）やアルミニウム（Ａｌ）を用いることができる。 As the material of the back surface reflection film 10, for example, a material having a high reflectivity with respect to long wavelength light is used. Thereby, long wavelength light can be efficiently taken into the semiconductor substrate 1, a high generated current (Jsc) can be realized, and output characteristics can be improved. As such a material, for example, silver (Ag) or aluminum (Al) can be used.
　また、半導体基板１の裏面側の領域であって裏面側電極９に接する領域およびその近傍にはアルミニウム－シリコン（Ａｌ－Ｓｉ）合金部１１が形成されている。さらにその外周部には、該アルミニウム－シリコン（Ａｌ－Ｓｉ）合金部１１を囲って、ｐ型多結晶シリコン基板２と等しい導電型の高濃度拡散層であるＢＳＦ（Back Surface Filed層）１２が形成されている。 In addition, an aluminum-silicon (Al—Si) alloy portion 11 is formed in a region on the back surface side of the semiconductor substrate 1 and in contact with the back surface side electrode 9 and in the vicinity thereof. Further, a BSF (Back Surface Filed layer) 12, which is a high-concentration diffusion layer having the same conductivity type as the p-type polycrystalline silicon substrate 2, surrounds the aluminum-silicon (Al—Si) alloy part 11 on the outer periphery. Is formed.
　このように構成された太陽電池セルでは、太陽光が太陽電池セルの受光面側から半導体基板１のｐｎ接合面（ｐ型多結晶シリコン基板２とｎ型不純物拡散層３との接合面）に照射されると、ホールと電子が生成する。ｐｎ接合部の電界によって、生成した電子はｎ型不純物拡散層３に向かって移動し、ホールはｐ型多結晶シリコン基板２に向かって移動する。これにより、ｎ型不純物拡散層３に電子が過剰となり、ｐ型多結晶シリコン基板２にホールが過剰となる結果、光起電力が発生する。この光起電力はｐｎ接合を順方向にバイアスする向きに生じ、ｎ型不純物拡散層３に接続した受光面側電極５がマイナス極となり、ｐ型多結晶シリコン基板２に接続した裏面側電極９がプラス極となって、図示しない外部回路に電流が流れる。 In the solar cell configured as described above, sunlight is applied from the light receiving surface side of the solar cell to the pn junction surface of the semiconductor substrate 1 (the junction surface between the p-type polycrystalline silicon substrate 2 and the n-type impurity diffusion layer 3). When irradiated, holes and electrons are generated. Due to the electric field at the pn junction, the generated electrons move toward the n-type impurity diffusion layer 3, and the holes move toward the p-type polycrystalline silicon substrate 2. As a result, the number of electrons in the n-type impurity diffusion layer 3 becomes excessive, and the number of holes in the p-type polycrystalline silicon substrate 2 becomes excessive. As a result, photovoltaic power is generated. This photovoltaic power is generated in the direction of biasing the pn junction in the forward direction, the light receiving surface side electrode 5 connected to the n-type impurity diffusion layer 3 becomes a negative electrode, and the back surface side electrode 9 connected to the p-type polycrystalline silicon substrate 2. Becomes a positive pole, and current flows in an external circuit (not shown).
　つぎに、このような太陽電池セルの製造方法の一例について図２および図３－１～図３－９を参照して説明する。図２は、本実施の形態にかかる太陽電池セルの製造工程を説明するためのフローチャートである。図３－１～図３－９は、本実施の形態にかかる太陽電池セルの製造工程を説明するための断面図である。 Next, an example of a method for manufacturing such a solar battery cell will be described with reference to FIG. 2 and FIGS. 3-1 to 3-9. FIG. 2 is a flowchart for explaining a manufacturing process of the solar battery cell according to the present embodiment. FIGS. 3-1 to 3-9 are cross-sectional views for explaining the manufacturing process of the solar battery cell according to the present embodiment.
　まず、半導体基板１として、例えば民生用太陽電池向けとして最も多く使用されているｐ型多結晶シリコン基板を用意する（以下、ｐ型多結晶シリコン基板１ａと呼ぶ）。ｐ型多結晶シリコン基板１ａとしては、寸法が例えば１５０ｍｍ×１５０ｍｍであり、抵抗率が０．５Ωｃｍ～３Ωｃｍ程度の多結晶シリコン基板を用いる。 First, as the semiconductor substrate 1, for example, a p-type polycrystalline silicon substrate most frequently used for consumer solar cells is prepared (hereinafter referred to as a p-type polycrystalline silicon substrate 1a). As the p-type polycrystalline silicon substrate 1a, a polycrystalline silicon substrate having dimensions of, for example, 150 mm × 150 mm and a resistivity of about 0.5 Ωcm to 3 Ωcm is used.
　ｐ型多結晶シリコン基板１ａは、溶融したシリコンを冷却固化してできたインゴットをワイヤーソーでスライスして製造するため、表面にスライス時のダメージが残っている。そこで、まずはこのダメージ層の除去も兼ねて、ｐ型多結晶シリコン基板１ａを酸または加熱したアルカリ溶液中、例えば水酸化ナトリウム水溶液に浸漬して表面をエッチングすることにより、シリコン基板の切り出し時に発生してｐ型多結晶シリコン基板１ａの表面近くに存在するダメージ領域を取り除く。 Since the p-type polycrystalline silicon substrate 1a is manufactured by slicing an ingot formed by cooling and solidifying molten silicon with a wire saw, damage at the time of slicing remains on the surface. Therefore, the p-type polycrystalline silicon substrate 1a is first removed by immersing the surface of the p-type polycrystalline silicon substrate 1a in an acid or a heated alkaline solution, for example, in an aqueous solution of sodium hydroxide so as to remove the damaged layer. Thus, the damaged region existing near the surface of the p-type polycrystalline silicon substrate 1a is removed.
　また、ダメージ除去と同時に、またはダメージ除去に続いて、ｐ型多結晶シリコン基板１ａの受光面側の表面にテクスチャー構造として微小凹凸を形成する（図３－１、ステップＳ１０）。このようなテクスチャー構造を半導体基板１の受光面側に形成することで、太陽電池セルの表面で光の多重反射を生じさせ、太陽電池セルに入射する光を効率的にｐ型多結晶シリコン基板１ａの内部に吸収させることができ、実効的に反射率を低減し変換効率を向上させることができる。なお、図３－１においてはテクスチャー構造の図示を省略している。 Simultaneously with the removal of the damage or subsequent to the removal of the damage, minute unevenness is formed as a texture structure on the light receiving surface side surface of the p-type polycrystalline silicon substrate 1a (FIG. 3-1, step S10). By forming such a texture structure on the light receiving surface side of the semiconductor substrate 1, multiple reflection of light is caused on the surface of the solar battery cell, and light incident on the solar battery cell is efficiently transmitted to the p-type polycrystalline silicon substrate. 1a can be absorbed, and the reflectance can be effectively reduced and the conversion efficiency can be improved. In FIG. 3A, the illustration of the texture structure is omitted.
　なお、本発明は光起電力装置の裏面構造にかかる発明であるので、テクスチャー構造の形成方法や形状については、特に制限するものではない。例えば、イソプロピルアルコールを含有させたアルカリ水溶液や主にフッ酸、硝酸の混合液からなる酸エッチングを用いる方法、部分的に開口を設けたマスク材をｐ型多結晶シリコン基板１ａの表面に形成して該マスク材を介したエッチングによりｐ型多結晶シリコン基板１ａの表面にハニカム構造や逆ピラミッド構造を得る方法、或いは反応性ガスエッチング（ＲＩＥ：Reactive Ion Etching）を用いた手法など、何れの手法を用いても差し支えない。 In addition, since this invention is invention concerning the back surface structure of a photovoltaic apparatus, it does not restrict | limit in particular about the formation method and shape of a texture structure. For example, an alkaline aqueous solution containing isopropyl alcohol, a method using acid etching mainly composed of a mixed solution of hydrofluoric acid and nitric acid, or a mask material partially provided with an opening is formed on the surface of the p-type polycrystalline silicon substrate 1a. Any method such as a method of obtaining a honeycomb structure or an inverted pyramid structure on the surface of the p-type polycrystalline silicon substrate 1a by etching through the mask material, or a method using reactive gas etching (RIE) Can be used.
　つぎに、このｐ型多結晶シリコン基板１ａを熱酸化炉へ投入し、ｎ型の不純物であるリン（Ｐ）の雰囲気下で加熱する。この工程によりｐ型多結晶シリコン基板１ａの表面にリン（Ｐ）を拡散させて、ｐ型多結晶シリコン基板１ａと逆の導電型の接合層としてｎ型不純物拡散層３を形成して半導体ｐｎ接合を形成する（図３－２、ステップＳ２０）。本実施の形態では、ｐ型多結晶シリコン基板１ａをオキシ塩化リン（ＰＯＣｌ３）ガス雰囲気中において、例えば８００℃～８５０℃の温度で加熱することにより、ｎ型不純物拡散層３を形成する。 Next, this p-type polycrystalline silicon substrate 1a is put into a thermal oxidation furnace and heated in an atmosphere of phosphorus (P) which is an n-type impurity. By this step, phosphorus (P) is diffused on the surface of the p-type polycrystalline silicon substrate 1a, and an n-type impurity diffusion layer 3 is formed as a bonding layer having a conductivity type opposite to that of the p-type polycrystalline silicon substrate 1a. A bond is formed (FIG. 3-2, step S20). In the present embodiment, the n-type impurity diffusion layer 3 is formed by heating the p-type polycrystalline silicon substrate 1a in a phosphorus oxychloride (POCl3) gas atmosphere at a temperature of 800 ° C. to 850 ° C., for example.
　ここで、ｎ型不純物拡散層３の形成直後の表面にはガラスを主成分とするリンガラス層が形成されているため、フッ酸溶液等を用いて除去する。 Here, since a phosphorus glass layer mainly composed of glass is formed on the surface immediately after the formation of the n-type impurity diffusion layer 3, it is removed using a hydrofluoric acid solution or the like.
　つぎに、ｎ型不純物拡散層３を形成したｐ型多結晶シリコン基板１ａの受光面側に、光電変換効率改善のために、反射防止膜４としてシリコン窒化膜（ＳｉＮ膜）を形成する（図３－３、ステップＳ３０）。反射防止膜４の形成には、例えばプラズマＣＶＤ法を使用し、シランとアンモニアの混合ガスを用いて反射防止膜４としてシリコン窒化膜を形成する。反射防止膜４の膜厚および屈折率は、光反射を最も抑制する値に設定する。なお、反射防止膜４として、屈折率の異なる２層以上の膜を積層してもよい。また、反射防止膜４の形成には、スパッタリング法などの異なる成膜方法を用いてもよい。また、反射防止膜４としてシリコン酸化膜を形成してもよい。 Next, a silicon nitride film (SiN film) is formed as the antireflection film 4 on the light receiving surface side of the p-type polycrystalline silicon substrate 1a on which the n-type impurity diffusion layer 3 is formed in order to improve the photoelectric conversion efficiency (FIG. 3-3, Step S30). For the formation of the antireflection film 4, for example, a plasma CVD method is used, and a silicon nitride film is formed as the antireflection film 4 using a mixed gas of silane and ammonia. The film thickness and refractive index of the antireflection film 4 are set to values that most suppress light reflection. Note that two or more films having different refractive indexes may be laminated as the antireflection film 4. Further, a different film forming method such as a sputtering method may be used for forming the antireflection film 4. Further, a silicon oxide film may be formed as the antireflection film 4.
　つぎに、リン（Ｐ）の拡散によりｐ型多結晶シリコン基板１ａの裏面に形成されたｎ型不純物拡散層３を除去する（図３－４、ステップＳ４０）。これにより、第１導電型層であるｐ型多結晶シリコン基板２と、半導体基板１の受光面側に形成された第２導電型層である不純物拡散層（ｎ型不純物拡散層）３と、によりｐｎ接合が構成された半導体基板１が得られる。 Next, the n-type impurity diffusion layer 3 formed on the back surface of the p-type polycrystalline silicon substrate 1a is removed by diffusion of phosphorus (P) (FIG. 3-4, step S40). Thus, the p-type polycrystalline silicon substrate 2 as the first conductivity type layer, the impurity diffusion layer (n-type impurity diffusion layer) 3 as the second conductivity type layer formed on the light receiving surface side of the semiconductor substrate 1, Thus, the semiconductor substrate 1 having a pn junction is obtained.
　ｐ型多結晶シリコン基板１ａの裏面に形成されたｎ型不純物拡散層３の除去は、例えば片面エッチング装置を用いて行う。または、反射防止膜４をマスク材として活用し、エッチング液にｐ型多結晶シリコン基板１ａの全体を浸漬させる方法を用いてもよい。エッチング液は、水酸化ナトリウム、水酸化カリウムなどのアルカリ水溶液を、室温～９５℃、好ましくは５０℃～７０℃に加熱したものや硝酸とフッ酸との混合水溶液を用いることができる。 The removal of the n-type impurity diffusion layer 3 formed on the back surface of the p-type polycrystalline silicon substrate 1a is performed using, for example, a single-sided etching apparatus. Alternatively, a method of using the antireflection film 4 as a mask material and immersing the entire p-type polycrystalline silicon substrate 1a in an etching solution may be used. As the etching solution, an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide heated to room temperature to 95 ° C., preferably 50 ° C. to 70 ° C., or a mixed aqueous solution of nitric acid and hydrofluoric acid can be used.
　ｎ型不純物拡散層３の除去のエッチングの後、後述する成膜で再結合速度を低く保つために、半導体基板１の裏面に露出したシリコン面を洗浄する。洗浄は、例えばＲＣＡ洗浄により行う（ステップＳ５０）。 After the etching for removing the n-type impurity diffusion layer 3, the silicon surface exposed on the back surface of the semiconductor substrate 1 is washed in order to keep the recombination rate low in film formation described later. Cleaning is performed, for example, by RCA cleaning (step S50).
　ついで、半導体基板１の裏面側（受光面と反対側）に、シリコン窒化膜（ＳｉＮ膜）からなる裏面絶縁膜（裏面パッシベーション膜）８を形成する（図３－５、ステップＳ６０）。半導体基板１の裏面側に露出させたシリコン面に対して、プラズマＣＶＤにより厚さ１００ｎｍ～２００ｎｍ程度のシリコン窒化膜（ＳｉＮ膜）からなる裏面絶縁膜（裏面パッシベーション膜）８を成膜する。このような裏面絶縁膜（裏面パッシベーション膜）８を形成することにより、半導体基板１の裏面におけるキャリアの再結合速度を抑制することができ、高出力化の為に十分な裏面界面を実現することができる。 Next, a back surface insulating film (back surface passivation film) 8 made of a silicon nitride film (SiN film) is formed on the back surface side (opposite to the light receiving surface) of the semiconductor substrate 1 (FIG. 3-5, step S60). On the silicon surface exposed on the back surface side of the semiconductor substrate 1, a back surface insulating film (back surface passivation film) 8 made of a silicon nitride film (SiN film) having a thickness of about 100 nm to 200 nm is formed by plasma CVD. By forming such a back surface insulating film (back surface passivation film) 8, the carrier recombination speed on the back surface of the semiconductor substrate 1 can be suppressed, and a sufficient back surface interface can be realized for high output. Can do.
　つぎに、半導体基板１の裏面側とのコンタクトを取るために、半導体基板１の裏面側に形成した裏面絶縁膜（裏面パッシベーション膜）８の一部または全面に、所定の間隔を有する電極コンタクト部形成用のストライプ状の開口部８ａを形成する（図３－６、ステップＳ７０）。ストライプ状の開口部８ａの形成は、例えば裏面絶縁膜（裏面パッシベーション膜）８に対するレーザー照射により直接パターニングを行って形成する。レーザー照射は、例えばスポット径（開口部８ａの開口幅Ｗ）６０ｎｍ、０．５ｍｍ～３．０ｍｍピッチの間隔で行う。また、開口部８ａの長さは、半導体基板１の一辺の長さに近い寸法とする。 Next, in order to make contact with the back surface side of the semiconductor substrate 1, an electrode contact portion having a predetermined interval on a part or the entire surface of the back surface insulating film (back surface passivation film) 8 formed on the back surface side of the semiconductor substrate 1. A stripe-shaped opening 8a for formation is formed (FIG. 3-6, step S70). The stripe-shaped openings 8a are formed by, for example, direct patterning by laser irradiation on the back surface insulating film (back surface passivation film) 8. Laser irradiation is performed, for example, with a spot diameter (opening width W of the opening 8a) of 60 nm and an interval of 0.5 mm to 3.0 mm. Further, the length of the opening 8 a is set to a dimension close to the length of one side of the semiconductor substrate 1.
　つぎに、裏面側電極９の電極材料であってアルミニウム、ガラス等を含む裏面側電極材料ペースト９ａを、開口部８ａを埋めるとともに裏面絶縁膜（裏面パッシベーション膜）８の面内方向において開口部８ａの径よりも多少広い領域を覆い、且つ隣接する開口部８ａを埋める裏面側電極材料ペースト９ａと接触しないように、スクリーン印刷法により限定的に塗布し、乾燥させる（図３－７、ステップＳ８０）。ここで、裏面側電極材料ペースト９ａの塗布形状・塗布量等は、例えば開口部８ａの開口幅Ｗ：焼成後の電極厚Ｔが、１．５：１となるようにする。ここで、焼成後の電極厚Ｔは、焼成後の裏面側電極９の裏面絶縁膜（裏面パッシベーション膜）８からの高さである。 Next, a back-side electrode material paste 9a containing aluminum, glass or the like, which is an electrode material for the back-side electrode 9, fills the opening 8a and opens the opening 8a in the in-plane direction of the back-side insulating film (back-side passivation film) 8. The film is applied in a limited manner by screen printing so as not to contact the backside electrode material paste 9a that covers a region that is slightly larger than the diameter and fills the adjacent opening 8a (FIG. 3-7, step S80). ). Here, the application shape, the application amount, and the like of the back surface side electrode material paste 9a are set such that, for example, the opening width W of the opening 8a: the electrode thickness T after firing is 1.5: 1. Here, the electrode thickness T after baking is the height from the back surface insulating film (back surface passivation film) 8 of the back electrode 9 after baking.
　つぎに、半導体基板１の反射防止膜４上に、受光面側電極５の電極材料であって銀（Ａｇ）、ガラス等を含む受光面電極材料ペースト５ａを、受光面側電極５の形状に選択的にスクリーン印刷法により塗布し、乾燥する（図３－７、ステップＳ８０）。受光面電極材料ペースト５ａは、例えば、長尺状のグリッド電極６のパターンと、このパターンに略直交する方向に帯状のバス電極７のパターンと、を印刷する。 Next, on the antireflection film 4 of the semiconductor substrate 1, a light receiving surface electrode material paste 5 a which is an electrode material of the light receiving surface side electrode 5 and contains silver (Ag), glass or the like is formed into the shape of the light receiving surface side electrode 5. It is selectively applied by screen printing and dried (FIG. 3-7, step S80). The light-receiving surface electrode material paste 5a, for example, prints a pattern of long grid electrodes 6 and a pattern of strip-shaped bus electrodes 7 in a direction substantially orthogonal to the pattern.
　その後、例えば赤外線加熱炉を用いて例えばピーク温度７６０℃～９００℃で焼成を行う（図３－８、ステップＳ９０）。これにより、受光面側電極５および裏面側電極９が形成されるとともに、半導体基板１の裏面側の領域であって裏面側電極９に接する領域およびその近傍にはＡｌ－Ｓｉ合金部１１が形成される。さらにその外周部には、該Ａｌ－Ｓｉ合金部１１を囲って、裏面側電極９からアルミニウムが高濃度に拡散したｐ＋領域であるＢＳＦ１２が形成され該ＢＳＦ層１２と裏面側電極９とが電気的に接続する。また、受光面側電極５中の銀が反射防止膜４を貫通して、ｎ型不純物拡散層３と受光面側電極５とが電気的に接続する。その後、フォーミングガス（例えば水素５％含有の不活性ガス）雰囲気中で３００℃～４００℃、１０分間のフォーミングガスアニール処理を行う（ステップＳ１００）。 Thereafter, firing is performed at, for example, a peak temperature of 760 ° C. to 900 ° C. using an infrared heating furnace (FIG. 3-8, step S90). Thus, the light receiving surface side electrode 5 and the back surface side electrode 9 are formed, and the Al—Si alloy portion 11 is formed in the region on the back surface side of the semiconductor substrate 1 and in contact with the back surface side electrode 9 and its vicinity. Is done. Further, a BSF 12 that is a p + region in which aluminum is diffused in a high concentration from the back surface side electrode 9 is formed on the outer periphery of the Al—Si alloy portion 11, and the BSF layer 12 and the back surface side electrode 9 are electrically connected to each other. Connect. Further, the silver in the light receiving surface side electrode 5 penetrates the antireflection film 4, and the n-type impurity diffusion layer 3 and the light receiving surface side electrode 5 are electrically connected. Thereafter, a forming gas annealing process is performed at 300 ° C. to 400 ° C. for 10 minutes in an atmosphere of a forming gas (for example, an inert gas containing 5% hydrogen) (step S100).
　この際、半導体基板１の裏面において裏面側電極材料ペースト９ａが塗布されていない領域はシリコン窒化膜（ＳｉＮ膜）からなる裏面絶縁膜（パッシベーション膜）８により保護されているため、焼成による加熱においても半導体基板１の裏面に対して汚染物質の付着や固定が進まず、再結合速度を劣化させることなく、良好な状態が維持される。 At this time, the region where the back electrode material paste 9a is not applied on the back surface of the semiconductor substrate 1 is protected by the back surface insulating film (passivation film) 8 made of a silicon nitride film (SiN film). However, the adherence and fixation of contaminants do not proceed to the back surface of the semiconductor substrate 1, and a good state is maintained without degrading the recombination speed.
　つぎに、半導体基板１の裏面側に高反射構造を形成する。すなわち、裏面側電極９および裏面絶縁膜（パッシベーション膜）８を覆うように、裏面反射膜１０として銀（Ａｇ）膜（銀スパッタリング膜）を半導体基板１の裏面の全面に蒸着法により形成する（図３－９、ステップＳ１１０）。なお、裏面反射膜１０は、金属箔の接着により形成してもよい。 Next, a highly reflective structure is formed on the back side of the semiconductor substrate 1. That is, a silver (Ag) film (silver sputtering film) is formed on the entire back surface of the semiconductor substrate 1 by vapor deposition so as to cover the back surface side electrode 9 and the back surface insulating film (passivation film) 8 ( FIG. 3-9, step S110). In addition, you may form the back surface reflecting film 10 by adhesion | attachment of metal foil.
　以上により、図１－１～図１－４に示す実施の形態１にかかる太陽電池セルが作製される。なお、電極材料であるペーストの塗布の順番を、受光面側と裏面側とで入れ替えてもよい。 Thus, the solar battery cell according to Embodiment 1 shown in FIGS. 1-1 to 1-4 is manufactured. Note that the order of application of the paste as the electrode material may be switched between the light receiving surface side and the back surface side.
　上述した本実施の形態にかかる太陽電池セルの製造方法に従って太陽電池セルを作製し、これを実施例の太陽電池セルとした。また、太陽電池特性の比較のために、半導体基板１の裏面側に裏面絶縁膜（パッシベーション膜）８を形成せずに、半導体基板１の裏面側の全面に裏面側電極９としてのアルミニウム電極を形成したこと以外は、上述した本実施の形態にかかる太陽電池セルの製造方法と同様にして太陽電池セルを形成し、これを比較例Ａの太陽電池セルとした。 A solar battery cell was produced according to the method for manufacturing a solar battery cell according to this embodiment described above, and this was used as a solar battery cell of the example. Further, for comparison of solar cell characteristics, an aluminum electrode as a back electrode 9 is formed on the entire back surface of the semiconductor substrate 1 without forming a back insulating film (passivation film) 8 on the back surface of the semiconductor substrate 1. Except having formed, the photovoltaic cell was formed like the manufacturing method of the photovoltaic cell concerning this Embodiment mentioned above, and this was made into the photovoltaic cell of the comparative example A. FIG.
　また、半導体基板１の裏面側に裏面絶縁膜（パッシベーション膜）８を形成後、２ｍｍピッチの間隔でストライプ状の開口部８ａを形成するまでは上述した本実施の形態にかかる太陽電池セルの製造方法と同様にして作製し、その後、開口部８ａを埋めるとともに半導体基板１の裏面側の全面に裏面側電極９としてのアルミニウム電極を形成して太陽電池セルを形成し、これを比較例Ｂの太陽電池セルとした。 In addition, after the formation of the back surface insulating film (passivation film) 8 on the back surface side of the semiconductor substrate 1 until the formation of the stripe-shaped openings 8a at intervals of 2 mm, the manufacture of the solar battery cell according to this embodiment described above is performed. Then, the solar cell is formed by filling the opening 8a and forming an aluminum electrode as the back side electrode 9 on the entire back side of the semiconductor substrate 1 and then forming the solar cell. A solar battery cell was obtained.
　また、半導体基板１の裏面側に裏面絶縁膜（パッシベーション膜）８を形成後、０．５ｍｍ～２．５ｍｍの間隔で、直径０．１ｍｍ～０．３ｍｍの円形状（ドット状）開口部を形成し、さらに該円形状（ドット状）開口部を埋めるとともに裏面絶縁膜（裏面パッシベーション膜）８の面内方向において円形状（ドット状）開口部の径よりも多少広い領域を覆い、且つ隣接する円形状（ドット状）開口部を埋める裏面側電極材料ペースト９ａと接触しないように、アルミニウム電極を形成して太陽電池セルを形成し、これを比較例Ｃの太陽電池セルとした。 Further, after forming a back surface insulating film (passivation film) 8 on the back surface side of the semiconductor substrate 1, circular (dot-shaped) openings having a diameter of 0.1 mm to 0.3 mm are formed at intervals of 0.5 mm to 2.5 mm. And further fills the circular (dot-shaped) opening and covers an area somewhat wider than the diameter of the circular (dot-shaped) opening in the in-plane direction of the back surface insulating film (back surface passivation film) 8 A solar cell was formed by forming an aluminum electrode so as not to come into contact with the back-side electrode material paste 9a filling the circular (dot-shaped) opening to be made, and this was used as the solar cell of Comparative Example C.
　このようにして製造された実施例および比較例の太陽電池セルについて、ソーラーシミュレータによりＡＭ１．５の擬似太陽光を照射しながら、電流－電圧特性を評価した。図４は、実施例にかかる太陽電池セルの電圧―電流特性を示す特性図である。図４においては、電圧―電流特性のパラメータとして、裏面側電極９の電極間ピッチＰに対する開放電圧と短絡電流の積（Ｖｏｃ×Ｊｓｃ）、フィルファクター（ＦＦ）、変換効率（Ｅｆｆ）の各々を比較例ＡのＩ－Ｖ測定から得られた値を１として規格化した値をプロットした。 The current-voltage characteristics of the solar cells of Examples and Comparative Examples manufactured in this way were evaluated while irradiating AM1.5 simulated sunlight with a solar simulator. FIG. 4 is a characteristic diagram showing voltage-current characteristics of the solar battery cell according to the example. In FIG. 4, each of the product of the open circuit voltage and the short circuit current (Voc × Jsc), the fill factor (FF), and the conversion efficiency (Eff) with respect to the interelectrode pitch P of the back-side electrode 9 is used as a parameter of the voltage-current characteristic. The values normalized by taking the value obtained from the IV measurement of Comparative Example A as 1 were plotted.
　図４より、裏面側電極９の電極間ピッチＰが０．５ｍｍの場合は、抵抗に起因するフィルファクター（ＦＦ）はスクリーン印刷による従来プロセスで形成した比較例Ａの太陽電池セルと同等であった。しかしながら、開放電圧と短絡電流の積（Ｖｏｃ×Ｊｓｃ）が比較例Ａの太陽電池セルよりも小さい値を示したため、変換効率（Ｅｆｆ）も比較例Ａの太陽電池セルを下回る結果となった。 From FIG. 4, when the inter-electrode pitch P of the back surface side electrode 9 is 0.5 mm, the fill factor (FF) due to the resistance is equivalent to that of the solar cell of Comparative Example A formed by the conventional process by screen printing. It was. However, since the product (Voc × Jsc) of the open-circuit voltage and the short-circuit current showed a smaller value than the solar cell of Comparative Example A, the conversion efficiency (Eff) was also lower than that of the solar cell of Comparative Example A.
　また、裏面側電極９の電極間ピッチＰの増加に伴い、開放電圧と短絡電流の積（Ｖｏｃ×Ｊｓｃ）は増加したが、フィルファクター（ＦＦ）が低下する傾向がみられた。また、変換効率（Ｅｆｆ）については、裏面側電極９の電極間ピッチＰが１．５ｍｍ～３．０ｍｍのときに、半導体基板１の裏面側の全面に裏面側電極９としてのアルミニウム（Ａｌ）電極を形成した比較例Ａの太陽電池セルの変換効率（Ｅｆｆ）を上回り、電極間ピッチＰが２ｍｍ付近のときに変換効率（Ｅｆｆ）は最大となった。 Also, as the pitch P between the backside electrodes 9 increased, the product of the open circuit voltage and the short circuit current (Voc × Jsc) increased, but the fill factor (FF) tended to decrease. Regarding the conversion efficiency (Eff), when the inter-electrode pitch P of the back surface side electrodes 9 is 1.5 mm to 3.0 mm, aluminum (Al) as the back surface side electrode 9 is formed on the entire back surface side of the semiconductor substrate 1. It exceeded the conversion efficiency (Eff) of the solar battery cell of Comparative Example A in which the electrodes were formed, and the conversion efficiency (Eff) was maximized when the interelectrode pitch P was around 2 mm.
　実施例の太陽電池セルの中で、電極間ピッチＰが２ｍｍの太陽電池セルと電極間ピッチＰが１ｍｍの太陽電池セルについて、ＬＢＩＣ（laser　beam　induced　current）法により取り出し電流の比較を行った。ただし、本検討は、上記セル形成プロセスにおける高反射率材料による裏面反射膜１０の形成前に行った。半導体基板１の裏面側の面内方向において、ストライプ状の裏面側電極９の延在方向に略直行する方向に幾つかの裏面側電極９を跨いで半導体基板１の裏面側から波長６５３ｎｍレーザーを半導体基板１に照射し、表裏の電極間に流れる電流量をレーザー照射位置に対して測定した。 Among the solar cells of the examples, for the solar cells with an interelectrode pitch P of 2 mm and the solar cells with an interelectrode pitch P of 1 mm, the extracted currents were compared by the LBIC (laser beam induced current) method. However, this examination was performed before formation of the back surface reflection film 10 by the high reflectance material in the cell formation process. In the in-plane direction on the back side of the semiconductor substrate 1, a laser having a wavelength of 653 nm is applied from the back side of the semiconductor substrate 1 across several back side electrodes 9 in a direction substantially perpendicular to the extending direction of the striped back side electrodes 9. The semiconductor substrate 1 was irradiated, and the amount of current flowing between the front and back electrodes was measured with respect to the laser irradiation position.
　図５は、電極間ピッチＰが２ｍｍの実施例の太陽電池セルにおけるレーザー照射位置と取り出し電流（Ａ）との関係を示す特性図である。図６は、電極間ピッチＰが１ｍｍの実施例の太陽電池セルにおけるレーザー照射位置と取り出し電流（Ａ）との関係を示す特性図である。図５および図６においては、山形のプロットに囲まれる面積が広いほど、取り出し電流量が多いことを示す。図５および図６において、レーザー取り出し電流は、レーザーの照射方向において裏面側電極９から０．５ｍｍ程度の範囲で小さくなることがわかる。これは、レーザーの照射方向において裏面側電極９から０．５ｍｍ程度の範囲では発生したキャリアが再結合し易く、有効にキャリアを取り出すことができないことを示している。このため、電極間ピッチＰが１ｍｍの場合（図６）は、十分な取り出し電流を得られないことがわかる。これに対して、図５からわかるように電極間ピッチＰが２ｍｍの実施例の太陽電池セルの場合に、特に隣接する裏面側電極９間の中央での取り出し電流が大きくなる傾向が認められた。 FIG. 5 is a characteristic diagram showing the relationship between the laser irradiation position and the extraction current (A) in the solar cell of the example having an interelectrode pitch P of 2 mm. FIG. 6 is a characteristic diagram showing the relationship between the laser irradiation position and the extraction current (A) in the solar battery cell of the example having an interelectrode pitch P of 1 mm. 5 and 6 indicate that the larger the area surrounded by the mountain-shaped plot, the larger the extracted current amount. 5 and 6, it can be seen that the laser extraction current decreases in the range of about 0.5 mm from the back electrode 9 in the laser irradiation direction. This indicates that the generated carriers are easily recombined in the range of about 0.5 mm from the back surface side electrode 9 in the laser irradiation direction, and the carriers cannot be taken out effectively. For this reason, when the pitch P between electrodes is 1 mm (FIG. 6), it turns out that sufficient extraction current cannot be obtained. On the other hand, as can be seen from FIG. 5, in the case of the solar cell of the example in which the inter-electrode pitch P is 2 mm, a tendency that the extraction current at the center between the adjacent back side electrodes 9 tends to increase is recognized. .
　その他の比較例の太陽電池との比較では、半導体基板１の裏面側に裏面絶縁膜（パッシベーション膜）８を形成後、２ｍｍピッチの間隔でストライプ状の開口部８ａを形成するまでは上述した本実施の形態にかかる太陽電池セルの製造方法と同様にして作製し、その後、開口部８ａを埋めるとともに半導体基板１の裏面側の全面に裏面側電極９としてのアルミニウム電極を形成して太陽電池セルを形成した比較例Ｂにおける太陽電池セルでは、本実施例における太陽電池に比べて短絡電流の低下が確認され、本実施の形態におけるような裏面反射膜として金属薄膜を形成したサンプルを上回る変換効率を得ることはできなかった。比較例Ｂは裏面全面をスクリーン印刷によるＡｌで覆っているが、このスクリーン印刷によるＡｌは粒子状であり、光の反射率が低い。基板を通過して裏面に達した長波長光は電極で吸収され、反射効率が低下するために基板における光吸収効率が低下し、キャリア発生量に依存する短絡電流の減少がみられたものと考えられる。逆に本実施の形態における太陽電池では裏面反射の効果による短絡電流増加を確認することができた。 In comparison with solar cells of other comparative examples, the above-described book is formed until the stripe-shaped openings 8a are formed at intervals of 2 mm after the back surface insulating film (passivation film) 8 is formed on the back surface side of the semiconductor substrate 1. The solar cell is manufactured in the same manner as the method for manufacturing the solar cell according to the embodiment, and then the aluminum electrode as the back side electrode 9 is formed on the entire back side of the semiconductor substrate 1 while filling the opening 8a. In the solar battery cell in Comparative Example B, in which the short-circuit current was reduced as compared with the solar battery in this example, the conversion efficiency exceeded that of the sample in which the metal thin film was formed as the back surface reflecting film as in this embodiment. Could not get. In Comparative Example B, the entire back surface is covered with Al by screen printing, but Al by this screen printing is in the form of particles and has a low light reflectance. The long wavelength light that passed through the substrate and reached the back surface was absorbed by the electrode, and the reflection efficiency was lowered, so the light absorption efficiency in the substrate was lowered, and the short circuit current depending on the amount of generated carriers was reduced. Conceivable. On the contrary, in the solar cell in this Embodiment, the short circuit current increase by the effect of back surface reflection was able to be confirmed.
　また、半導体基板１の裏面側に裏面絶縁膜（パッシベーション膜）８を形成後、０．５ｍｍ～２．５ｍｍの間隔で、直径０．１ｍｍ～０．３ｍｍの円形状（ドット状）開口部を形成し、さらに該円形状（ドット状）開口部を埋めるとともに裏面絶縁膜（裏面パッシベーション膜）８の面内方向において円形状（ドット状）開口部の径よりも多少広い領域を覆い、且つ隣接する円形状（ドット状）開口部を埋める裏面側電極材料ペースト９ａと接触しないように、アルミニウム電極を形成して太陽電池セルを形成した比較例Ｃにおける太陽電池セルでは、本実施の形態と同様に１ｍｍ～２ｍｍの範囲で裏面絶縁膜（パッシベーション膜）８を持たない従来構造の太陽電池セル（比較例Ａ）よりも開放電圧と短絡電流の積（Ｖｏｃ×Ｊｓｃ）は大きい傾向がみられたが、フィルファクター（ＦＦ）が０．７以下と小さくなった。これらの太陽電池セルについて電極開口部断面のＳＥＭ観察を行ったところ、開口部におけるアルミニウム（Ａｌ）とシリコン（Ｓｉ）との接触部の全ての箇所にボイドが形成していた。これに対して、実施例の太陽電池セルにおいてストライプ状に形成した裏面側電極９では開口部８ａにボイドが無く、開口部８ａを２ｍｍ間隔で開口した太陽電池セルでは０．７５以上のフィルファクター（ＦＦ）を達成した。 Further, after forming a back surface insulating film (passivation film) 8 on the back surface side of the semiconductor substrate 1, circular (dot-shaped) openings having a diameter of 0.1 mm to 0.3 mm are formed at intervals of 0.5 mm to 2.5 mm. And further fills the circular (dot-shaped) opening and covers an area somewhat wider than the diameter of the circular (dot-shaped) opening in the in-plane direction of the back surface insulating film (back surface passivation film) 8 In the solar battery cell in Comparative Example C in which the solar battery cell was formed by forming the aluminum electrode so as not to contact the back side electrode material paste 9a filling the circular (dot-like) opening to be formed, the same as in the present embodiment The product of open-circuit voltage and short-circuit current (Voc × Jsc) is higher than that of a conventional solar cell (Comparative Example A) having no back surface insulating film (passivation film) 8 in the range of 1 mm to 2 mm. Heard trend was observed, but the fill factor (FF) was as small as 0.7 or less. When SEM observation of the cross section of the electrode opening was performed on these solar cells, voids were formed at all locations of the contact portion between aluminum (Al) and silicon (Si) in the opening. On the other hand, in the back surface side electrode 9 formed in a stripe shape in the solar cell of the example, there is no void in the opening 8a, and in the solar cell in which the opening 8a is opened at intervals of 2 mm, the fill factor is 0.75 or more. (FF) was achieved.
　上述した本実施の形態にかかる太陽電池セルにおいては、半導体基板１の裏面に達する開口部８ａを長方形状（線状）として開口部面積を増大させることによりボイドが生じにくくなる。また、ボイドが生じた場合においても、長方形状（線状）の開口部８ａにおいてボイドが形成される部分とボイドが形成されない部分とが同一開口部８ａ内において開口部８ａの長手方向において交互に生じるため、ボイドによる断線、接触抵抗増大が生じにくくなり、フィルファクター（ＦＦ）の低下を抑制することができる。 In the solar cell according to the present embodiment described above, voids are less likely to occur by increasing the opening area by making the opening 8a reaching the back surface of the semiconductor substrate 1 into a rectangular shape (linear shape). Further, even when a void is generated, a portion where a void is formed and a portion where a void is not formed in the rectangular (linear) opening 8a are alternately arranged in the longitudinal direction of the opening 8a in the same opening 8a. As a result, disconnection due to voids and increase in contact resistance are less likely to occur, and a decrease in fill factor (FF) can be suppressed.
　また、ストライプ状に形成した裏面側電極９の電極間ピッチＰが１．５ｍｍ以下の場合は、裏面絶縁膜（パッシベーション膜）８の劣化等により十分なパッシベーション効果が得られない。一方、ストライプ状に形成した裏面側電極９の電極間ピッチＰが３．０ｍｍ以上の場合は、発生したキャリアが裏面側電極９まで移動する際の抵抗が増大する。このため、ストライプ状に形成した裏面側電極９の電極間ピッチＰを１．５ｍｍ～３．０ｍｍとすることにより、従来構造を上回る良好なパッシベーション効果と直列抵抗の増加の抑制を両立することができる。 Further, when the inter-electrode pitch P between the back-side electrodes 9 formed in a stripe shape is 1.5 mm or less, a sufficient passivation effect cannot be obtained due to deterioration of the back-side insulating film (passivation film) 8 or the like. On the other hand, when the inter-electrode pitch P of the back-side electrodes 9 formed in a stripe shape is 3.0 mm or more, the resistance when the generated carriers move to the back-side electrodes 9 increases. Therefore, by setting the inter-electrode pitch P of the back-side electrodes 9 formed in a stripe shape to 1.5 mm to 3.0 mm, it is possible to achieve both a good passivation effect that exceeds the conventional structure and a suppression of an increase in series resistance. it can.
　また、本実施の形態にかかる太陽電池セルにおいては、１５０ｍｍ×１５０ｍｍの大きさの半導体基板１に対して該半導体基板１の一辺の長さに近い電極長さＬのストライプ状の裏面側電極９を半導体基板１の裏面側に略平行に並べた。しかしながら、ストライプ状の裏面側電極９の長さはこれに限定されず、開口部８ａが長方形状であり、裏面の面内の開口部８ａの長手方向と垂直な方向において隣接する裏面側電極９との電極間ピッチＰが１．５ｍｍ～３．０ｍｍの範囲であれば、電極幅の２倍以上の電極長さＬを有する長方形状の裏面側電極９を任意に並べても同様の効果が得られる。すなわち、電極長さＬの方向に複数の裏面側電極９が不連続的に配置されてもよい。 Further, in the solar battery cell according to the present embodiment, the striped back surface side electrode 9 having an electrode length L close to the length of one side of the semiconductor substrate 1 with respect to the semiconductor substrate 1 having a size of 150 mm × 150 mm. Were arranged substantially parallel to the back side of the semiconductor substrate 1. However, the length of the striped back electrode 9 is not limited to this, and the opening 8a is rectangular, and the back electrode 9 adjacent in the direction perpendicular to the longitudinal direction of the opening 8a in the back surface. If the inter-electrode pitch P is in the range of 1.5 mm to 3.0 mm, the same effect can be obtained even if the rectangular backside electrodes 9 having an electrode length L that is at least twice the electrode width are arranged. It is done. That is, the plurality of back surface side electrodes 9 may be discontinuously arranged in the direction of the electrode length L.
　また、本実施の形態にかかる太陽電池セルにおいては、開口部８ａ上に形成する裏面側電極９の印刷パターンを、開口部８ａを覆うストライプ状とし、開口部８ａの開口幅Ｗを６０μｍとした。１．５ｍｍ以上の電極間ピッチＰに対して開口部８ａの開口幅Ｗが２０μｍ未満では、コンタクト抵抗が増大する。また、１．５ｍｍ以上の電極間ピッチＰに対して開口部８ａの開口幅Ｗが２００μｍ以上の場合は、電極間隔に対して裏面側電極９の占める面積が増大してパッシベーション効果を低下させる。したがって、開口部８ａの開口幅Ｗを２０μｍ～２００μｍとすることで低い接触抵抗とパッシベーション効果を両立することができる。 Moreover, in the photovoltaic cell concerning this Embodiment, the printing pattern of the back surface side electrode 9 formed on the opening part 8a was made into the stripe form which covers the opening part 8a, and the opening width W of the opening part 8a was 60 micrometers. . When the opening width W of the opening 8a is less than 20 μm with respect to the inter-electrode pitch P of 1.5 mm or more, the contact resistance increases. In addition, when the opening width W of the opening 8a is 200 μm or more with respect to the inter-electrode pitch P of 1.5 mm or more, the area occupied by the back-side electrode 9 increases with respect to the electrode interval, thereby reducing the passivation effect. Therefore, it is possible to achieve both a low contact resistance and a passivation effect by setting the opening width W of the opening 8a to 20 μm to 200 μm.
　また、裏面絶縁膜（パッシベーション膜）８上にアルミニウム（Ａｌ）電極（裏面側電極９）を印刷し、これを焼成するとパッシベーション効果が低下することがある。また、裏面絶縁膜（パッシベーション膜）８上に形成されたアルミニウム（Ａｌ）電極は粒子状となり、太陽電池セルの裏面まで到達した長波長光を有効に反射できずにそこで吸収してしまう。したがって、開口部８ａの開口幅Ｗを２０μｍ～２００μｍとし、さらに開口部８ａと類似の形状で該開口部８ａの周囲の裏面絶縁膜（パッシベーション膜）８と若干の重なりを持って開口部８ａ上をアルミニウム（Ａｌ）電極（裏面側電極９）で覆うことにより、裏面絶縁膜（パッシベーション膜）８上にアルミニウム（Ａｌ）電極（裏面側電極９）が形成される比率を小さくし、パッシベーション効果を向上させることができる。なお、開口部８ａの周囲の裏面絶縁膜（パッシベーション膜）８とアルミニウム（Ａｌ）電極（裏面側電極９）との重なりは、印刷時の位置合わせの関係で必要なものであり、裏面側電極９の特性上は、裏面側電極９の幅は開口部８ａの開口幅Ｗと同じ２０μｍ～２００μｍでよい。 Further, when an aluminum (Al) electrode (back surface side electrode 9) is printed on the back surface insulating film (passivation film) 8 and baked, the passivation effect may be lowered. Moreover, the aluminum (Al) electrode formed on the back surface insulating film (passivation film) 8 is in the form of particles, and the long wavelength light reaching the back surface of the solar battery cell cannot be effectively reflected and absorbed there. Therefore, the opening width W of the opening 8a is set to 20 μm to 200 μm, and has a shape similar to that of the opening 8a and slightly overlaps with the back surface insulating film (passivation film) 8 around the opening 8a. Is covered with an aluminum (Al) electrode (back surface side electrode 9), thereby reducing the ratio of the aluminum (Al) electrode (back surface side electrode 9) to be formed on the back surface insulating film (passivation film) 8 and increasing the passivation effect. Can be improved. Note that the overlap between the back surface insulating film (passivation film) 8 and the aluminum (Al) electrode (back surface side electrode 9) around the opening 8a is necessary because of the alignment during printing. 9, the width of the back electrode 9 may be 20 μm to 200 μm, which is the same as the opening width W of the opening 8a.
　また、裏面側電極９の形成において焼成後の電極厚Ｔは電極の熱収縮による体積に影響する。本実施の形態では、裏面側電極９の形成において開口部８ａの開口幅Ｗ：焼成後の電極厚Ｔを１．５：１としたが、開口部８ａの開口幅Ｗ：焼成後の電極厚Ｔが「２：１」より大の場合は、すなわち焼成後の電極厚Ｔが開口部８ａの開口幅Ｗの５０％未満の場合は、ＢＳＦ層１２の厚みが十分でなく、太陽電池特性の低下につながる。また、開口部８ａの開口幅Ｗ：焼成後の電極厚Ｔが「１：１」より小の場合は、すなわち、焼成後の電極厚Ｔが開口部８ａの開口幅Ｗの１００％より大の場合は、電極体積が大きいため焼成後の電極の熱収縮による電極の吸い出しおよびボイドが形成されやすい。したがって、開口部８ａの開口幅Ｗ：焼成後の電極厚Ｔが「１：１～２：１」の範囲のとき、すなわち焼成後の電極厚Ｔが開口部８ａの開口幅Ｗの５０％以上１００％以下の範囲のときに高いフィルファクター（ＦＦ）が得られる。 Further, in the formation of the back surface side electrode 9, the electrode thickness T after firing affects the volume due to the heat shrinkage of the electrode. In the present embodiment, in the formation of the back surface side electrode 9, the opening width W of the opening 8a: the electrode thickness T after firing is 1.5: 1, but the opening width W of the opening 8a: the electrode thickness after firing. When T is larger than “2: 1”, that is, when the electrode thickness T after firing is less than 50% of the opening width W of the opening 8a, the thickness of the BSF layer 12 is not sufficient, and the solar cell characteristics Leading to a decline. In addition, when the opening width W of the opening 8a: the electrode thickness T after baking is smaller than “1: 1”, that is, the electrode thickness T after baking is larger than 100% of the opening width W of the opening 8a. In this case, since the electrode volume is large, the suction and void of the electrode are easily formed due to the thermal contraction of the electrode after firing. Therefore, when the opening width W of the opening 8a is in the range of the electrode thickness T after firing of “1: 1 to 2: 1”, that is, the electrode thickness T after firing is 50% or more of the opening width W of the opening 8a. A high fill factor (FF) is obtained when it is in the range of 100% or less.
　また、実施の形態１にかかる太陽電池セルにおいては、電極の焼成後に裏面反射膜１０を反射率の高い金属薄膜で形成する。裏面絶縁膜（パッシベーション膜）８上にスクリーン印刷で形成するアルミニウム（Ａｌ）電極は粒子状となり、裏面まで到達した長波長光を有効に反射できずにそこで吸収してしまう。そこで、アルミニウム（Ａｌ）電極の印刷領域を開口部８ａ上およびその周辺領域のみに限定し、それ以外の領域を反射率の高い金属薄膜で覆って裏面反射膜１０を形成することにより、裏面に到達する長波長側の光を反射させ、光を有効に半導体基板１に吸収させることができる。 Also, in the solar battery cell according to the first embodiment, the back surface reflecting film 10 is formed of a highly reflective metal thin film after the electrodes are fired. The aluminum (Al) electrode formed by screen printing on the back surface insulating film (passivation film) 8 becomes particulate, and long wavelength light reaching the back surface cannot be effectively reflected and absorbed there. Therefore, the printing area of the aluminum (Al) electrode is limited only to the opening 8a and its peripheral area, and the other area is covered with a metal thin film having a high reflectance to form the back surface reflecting film 10, thereby forming the back surface on the back surface. The light on the long wavelength side that reaches can be reflected, and the light can be effectively absorbed by the semiconductor substrate 1.
　したがって、上述した実施の形態１によれば、従来構造を上回る良好なパッシベーション効果と直列抵抗の増加の抑制を両立することができ、良好な太陽電池特性を有する太陽電池セルが得られる。なお、本実施の形態にかかる太陽電池セルにおいて、半導体基板１としてｐ型多結晶シリコン基板を用いたが、ｐ型多結晶シリコンの変わりにｐ型単結晶シリコンを用いてもよい。 Therefore, according to the first embodiment described above, it is possible to achieve both a good passivation effect that exceeds the conventional structure and the suppression of an increase in series resistance, and a solar battery cell having good solar battery characteristics can be obtained. In the solar cell according to the present embodiment, a p-type polycrystalline silicon substrate is used as the semiconductor substrate 1, but p-type single crystal silicon may be used instead of p-type polycrystalline silicon.
実施の形態２．
　実施の形態２では、実施の形態１において説明した太陽電池セルの製造方法の変形例について図２を参照して説明する。実施の形態２により作製される太陽電池セルの構造は、実施の形態１と同じであり、図１－１～図１－２に示す構造である。まず、図２におけるステップＳ１０～ステップＳ８０までの工程を実施して、実施の形態１と同様にスクリーン印刷により受光面側電極５および裏面側電極９形成する（焼成前）。 Embodiment 2. FIG.
In the second embodiment, a modification of the method for manufacturing the solar battery cell described in the first embodiment will be described with reference to FIG. The structure of the solar battery cell manufactured according to Embodiment 2 is the same as that of Embodiment 1, and is the structure shown in FIGS. 1-1 to 1-2. First, steps S10 to S80 in FIG. 2 are performed, and the light receiving surface side electrode 5 and the back surface side electrode 9 are formed by screen printing in the same manner as in the first embodiment (before firing).
　つぎに、ステップＳ９０の電極焼成工程において、例えば赤外線加熱炉を用いてピーク温度７６０℃～９００℃で焼成を行う。これにより、受光面側電極５および裏面側電極９が形成されるとともに、半導体基板１の裏面側の領域であって裏面側電極９に接する領域およびその近傍にはＡｌ－Ｓｉ合金部１１が形成される。また、受光面側電極５中の銀が反射防止膜４を貫通して、ｎ型不純物拡散層３と受光面側電極５とが電気的に接続する。このとき、焼成後の冷却過程における６００℃～７００℃付近での降温速度を１０～３０℃／ｓｅｃとする。 Next, in the electrode firing step of Step S90, firing is performed at a peak temperature of 760 ° C. to 900 ° C. using, for example, an infrared heating furnace. Thus, the light receiving surface side electrode 5 and the back surface side electrode 9 are formed, and the Al—Si alloy portion 11 is formed in the region on the back surface side of the semiconductor substrate 1 and in contact with the back surface side electrode 9 and its vicinity. Is done. Further, the silver in the light receiving surface side electrode 5 penetrates the antireflection film 4, and the n-type impurity diffusion layer 3 and the light receiving surface side electrode 5 are electrically connected. At this time, the cooling rate in the vicinity of 600 ° C. to 700 ° C. in the cooling process after firing is set to 10 to 30 ° C./sec.
　また、赤外線加熱炉は加熱室と冷却室とが分かれているものを使用し、加熱後に半導体基板１を冷却室に搬送することにより冷却を行う。このとき、冷却室には不活性ガスとして例えば窒素を導入して非酸化雰囲気下で冷却を行い、冷却過程でアルミニウム（Ａｌ）が凝固する際に極力酸化しないようにする。その後、フォーミングガス（例えば水素５％含有の不活性ガス）雰囲気中で３００℃～４００℃、１０分間のフォーミングガスアニール処理を行う。 In addition, an infrared heating furnace is used in which a heating chamber and a cooling chamber are separated, and cooling is performed by transporting the semiconductor substrate 1 to the cooling chamber after heating. At this time, nitrogen, for example, is introduced into the cooling chamber as an inert gas and cooled in a non-oxidizing atmosphere so as not to oxidize as much as possible when aluminum (Al) solidifies during the cooling process. Thereafter, a forming gas annealing process is performed at 300 ° C. to 400 ° C. for 10 minutes in an atmosphere of a forming gas (for example, an inert gas containing 5% hydrogen).
　つぎに、実施の形態１と同様に、半導体基板１の裏面側に高反射構造を形成する。すなわち、裏面側電極９および裏面絶縁膜（パッシベーション膜）８を覆うように、裏面反射膜１０として銀（Ａｇ）膜（銀スパッタリング膜）を半導体基板１の裏面の全面にスパッタリング法により形成する。 Next, as in the first embodiment, a highly reflective structure is formed on the back side of the semiconductor substrate 1. That is, a silver (Ag) film (silver sputtering film) is formed on the entire back surface of the semiconductor substrate 1 by a sputtering method so as to cover the back surface side electrode 9 and the back surface insulating film (passivation film) 8.
　上述した実施の形態２にかかる太陽電池セルの製造方法においては、焼成後にアルミニウム（Ａｌ）が凝固する６００℃～７００℃付近での降温速度を１０～３０℃／ｓｅｃとすることによりＡｌ－Ｓｉ合金部１１の吸出しを抑制することができる。 In the method of manufacturing a solar battery cell according to the second embodiment described above, the rate of temperature decrease in the vicinity of 600 ° C. to 700 ° C. at which aluminum (Al) solidifies after firing is set to 10 to 30 ° C./sec. Suction of the alloy part 11 can be suppressed.
　また、実施の形態２にかかる太陽電池セルの製造方法においては、電極の焼成後の冷却過程において、非酸化雰囲気下で冷却を行うため、アルミニウム（Ａｌ）が粒子化する際に、粒子同士の接触部が酸化することにより接触抵抗が増大することを防止できる。 Moreover, in the manufacturing method of the photovoltaic cell concerning Embodiment 2, since it cools in non-oxidizing atmosphere in the cooling process after baking of an electrode, when aluminum (Al) granulates, between particles It is possible to prevent contact resistance from increasing due to oxidation of the contact portion.
　上述した実施の形態２にかかる太陽電池セルの製造方法に従って作製した太陽電池セル（実施例２）と、電極の焼成後の冷却過程において降温速度が３０℃／ｓｅｃよりも大きい条件で大気中で冷却する以外は実施の形態２にかかる太陽電池セルの製造方法に従って作製した太陽電池セル（比較例Ｄ）と、の電流―電圧特性を比較した。 A solar battery cell (Example 2) manufactured according to the method for manufacturing a solar battery cell according to the second embodiment described above, and in the atmosphere under a condition where the temperature lowering rate is higher than 30 ° C./sec in the cooling process after firing the electrode. Except for cooling, the current-voltage characteristics of the solar battery cell (Comparative Example D) manufactured according to the method for manufacturing a solar battery cell according to Embodiment 2 were compared.
　その結果、実施例２の太陽電池セルでは、比較例Ｄの太陽電池セルと比べて直列抵抗を低減することができ、比較例Ｄの太陽電池のフィルファクターが０．７５であったのに対して、０．７７と太陽電池特性を向上させることができた。 As a result, in the solar cell of Example 2, the series resistance can be reduced as compared with the solar cell of Comparative Example D, whereas the fill factor of the solar cell of Comparative Example D was 0.75. Thus, the solar cell characteristics were improved by 0.77.
　なお、上記の実施の形態においては、半導体基板としてｐ型のシリコン基板を使用する場合について説明したが、ｎ型のシリコン基板を用いてｐ型拡散層を形成する逆導電型の太陽電池セルとしてもよい。また、半導体基板として多結晶シリコン基板を用いたが、単結晶シリコン基板を用いてもよい。さらに、上記においては半導体基板の寸法を１５０ｍｍ×１５０ｍｍとしたが、半導体基板の寸法はこれに限定されるものではない。 In the above embodiment, the case where a p-type silicon substrate is used as the semiconductor substrate has been described. However, as a reverse conductivity type solar cell in which a p-type diffusion layer is formed using an n-type silicon substrate. Also good. Further, although a polycrystalline silicon substrate is used as the semiconductor substrate, a single crystal silicon substrate may be used. Furthermore, in the above description, the size of the semiconductor substrate is 150 mm × 150 mm, but the size of the semiconductor substrate is not limited to this.
　以上のように、本発明にかかる光起電力装置は、良好な太陽電池特性を有する光起電力装置の製造に有用である。 As described above, the photovoltaic device according to the present invention is useful for the production of a photovoltaic device having good solar cell characteristics.
　１　半導体基板
　１ａ　ｐ型多結晶シリコン基板
　２　ｐ型多結晶シリコン基板
　３　ｎ型不純物拡散層
　４　反射防止膜
　５　受光面側電極
　５ａ　受光面電極材料ペースト
　６　グリッド電極
　７　バス電極
　８　裏面絶縁膜
　８ａ　開口部
　９　裏面側電極
　９ａ　裏面側電極材料ペースト
　１０　裏面反射膜
　１１　アルミニウム－シリコン（Ａｌ－Ｓｉ）合金部
　１２　ＢＳＦ層
　Ｐ　電極間ピッチ
　Ｌ　裏面側電極の電極長さ（長手方向の長さ）
　Ｔ　焼成後の電極厚
　Ｗ　開口部の開口幅 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 1a p-type polycrystalline silicon substrate 2 p-type polycrystalline silicon substrate 3 n-type impurity diffusion layer 4 Antireflection film 5 Light-receiving surface side electrode 5a Light-receiving surface electrode material paste 6 Grid electrode 7 Bus electrode 8 Back surface insulating film 8a Opening Part 9 Back side electrode 9a Back side electrode material paste 10 Back reflective film 11 Aluminum-silicon (Al-Si) alloy part 12 BSF layer P Pitch between electrodes L Back side electrode length (length in longitudinal direction)
T Electrode thickness after firing W Opening width of opening

Claims (8)

  1. 　一面側に第２導電型の不純物元素が拡散された不純物拡散層を有する第１導電型の半導体基板と、
    　前記不純物拡散層上に形成された反射防止膜と、
    　前記反射防止膜を貫通して前記不純物拡散層に電気的に接続する第１電極と、
    　前記半導体基板の他面側に達する複数の開口部を有して前記半導体基板の他面側に形成された裏面絶縁膜と、
    　前記半導体基板の他面側に電気的に接続する複数の第２電極と、
    　少なくとも前記裏面絶縁膜上を覆って形成された裏面反射膜と、
    　を備え、
    　前記開口部は、前記半導体基板の裏面の面内方向において略長方形状を呈するとともに該開口部の短手方向において複数本が略平行な列に配列され、
    　前記第２電極は、前記開口部に埋め込まれて前記開口部と略等しい略長方形状を呈するとともに該第２電極の短手方向において複数本が略平行な列に配列され、
    　前記第２電極の短手方向において一つの列の前記第２電極の中心位置と隣接する列の前記第２電極の中心位置との間隔である電極間ピッチが１．５ｍｍ～３．０ｍｍの範囲であり、
    　前記第２電極の短手方向における幅が２０μｍ～２００μｍの範囲であること、
    　を特徴とする光起電力装置。     A first conductivity type semiconductor substrate having an impurity diffusion layer in which an impurity element of the second conductivity type is diffused on one side;
    An antireflection film formed on the impurity diffusion layer;
    A first electrode penetrating the antireflection film and electrically connected to the impurity diffusion layer;
    A back surface insulating film formed on the other surface side of the semiconductor substrate with a plurality of openings reaching the other surface side of the semiconductor substrate;
    A plurality of second electrodes electrically connected to the other surface side of the semiconductor substrate;
    A back reflecting film formed to cover at least the back insulating film;
    With
    The openings have a substantially rectangular shape in the in-plane direction of the back surface of the semiconductor substrate, and a plurality of the openings are arranged in a substantially parallel row in the short direction of the openings,
    The second electrode is embedded in the opening and has a substantially rectangular shape substantially equal to the opening, and a plurality of the second electrodes are arranged in a substantially parallel row in the short direction of the second electrode,
    The inter-electrode pitch that is the distance between the center position of the second electrode in one row and the center position of the second electrode in the adjacent row in the short direction of the second electrode is in the range of 1.5 mm to 3.0 mm. And
    The width of the second electrode in the lateral direction is in the range of 20 μm to 200 μm;
    A photovoltaic device characterized by the above.
  2. 　前記第２電極は、第２電極の長手方向において複数に分断されて配置されていること、
    　を特徴とする請求項１に記載の光起電力装置。     The second electrode is divided into a plurality of parts in the longitudinal direction of the second electrode,
    The photovoltaic device according to claim 1.
  3. 　前記第２電極は、前記開口部の全体を覆って設けられ、前記第２電極の電極厚Ｔが前記開口部の開口幅Ｗの５０％以上１００％以下の範囲であること、
    　を特徴とする請求項１に記載の光起電力装置。     The second electrode is provided so as to cover the entire opening, and the electrode thickness T of the second electrode is in a range of 50% to 100% of the opening width W of the opening,
    The photovoltaic device according to claim 1.
  4. 　第１導電型の半導体基板の一面側に、第２導電型の不純物元素が拡散された不純物拡散層を形成する第１工程と、
    　前記不純物拡散層上に反射防止膜を形成する第２工程と、
    　前記半導体基板の他面側に裏面絶縁膜を形成する第３工程と、
    　前記裏面絶縁膜の少なくとも一部に前記半導体基板の他面側に達する複数の開口部を形成する第４工程と、
    　前記反射防止膜上に第１電極材料を塗布する第５工程と、
    　少なくとも前記複数の開口部を覆うように第２電極材料を塗布する第６工程と、
    　前記第１電極材料および前記第２電極材料を焼成して、前記反射防止膜を貫通して前記不純物拡散層に電気的に接続する第１電極と、前記半導体基板の他面側に電気的に接続する第２電極と、を形成する第７工程と、
    　裏面反射膜を、少なくとも前記裏面絶縁膜上を覆って形成する第８工程と、
    　を含み、
    　前記開口部は、前記半導体基板の裏面の面内方向において略長方形状を呈するとともに該開口部の短手方向において複数本が略平行な列に配列され、
    　前記第２電極は、前記開口部に埋め込まれて前記開口部と略等しい略長方形状を呈するとともに該第２電極の短手方向において複数本が略平行な列に配列され、
    　前記第２電極の短手方向において一つの列の前記第２電極の中心位置と隣接する列の前記第２電極の中心位置との間隔である電極間ピッチが１．５ｍｍ～３．０ｍｍの範囲であり、
    　前記第２電極の短手方向における幅が２０μｍ～２００μｍの範囲であること、
    　を特徴とする光起電力装置の製造方法。     A first step of forming an impurity diffusion layer in which an impurity element of the second conductivity type is diffused on one surface side of the first conductivity type semiconductor substrate;
    A second step of forming an antireflection film on the impurity diffusion layer;
    A third step of forming a back surface insulating film on the other surface side of the semiconductor substrate;
    A fourth step of forming a plurality of openings reaching the other surface side of the semiconductor substrate in at least a part of the back surface insulating film;
    A fifth step of applying a first electrode material on the antireflection film;
    A sixth step of applying a second electrode material so as to cover at least the plurality of openings;
    The first electrode material and the second electrode material are baked, and the first electrode that penetrates the antireflection film and is electrically connected to the impurity diffusion layer is electrically connected to the other surface of the semiconductor substrate. A seventh step of forming a second electrode to be connected;
    An eighth step of forming a back surface reflecting film covering at least the back surface insulating film;
    Including
    The openings have a substantially rectangular shape in the in-plane direction of the back surface of the semiconductor substrate, and a plurality of the openings are arranged in a substantially parallel row in the short direction of the openings,
    The second electrode is embedded in the opening and has a substantially rectangular shape substantially equal to the opening, and a plurality of the second electrodes are arranged in a substantially parallel row in the short direction of the second electrode,
    The inter-electrode pitch that is the distance between the center position of the second electrode in one row and the center position of the second electrode in the adjacent row in the short direction of the second electrode is in the range of 1.5 mm to 3.0 mm. And
    The width of the second electrode in the lateral direction is in the range of 20 μm to 200 μm;
    A method of manufacturing a photovoltaic device characterized by the above.
  5. 　前記第２電極の電極厚Ｔが、前記開口部の開口幅Ｗの５０％以上１００％以下の範囲であること、
    　を特徴とする請求項４に記載の光起電力装置の製造方法。     The electrode thickness T of the second electrode is in the range of 50% to 100% of the opening width W of the opening;
    The method for manufacturing a photovoltaic device according to claim 4.
  6. 　前記第７工程では、前記焼成後の冷却過程における６００℃～７００℃での降温速度を１０℃／ｓｅｃ～３０℃／ｓｅｃとすること、
    　を特徴とする請求項４に記載の光起電力装置の製造方法。     In the seventh step, the cooling rate at 600 ° C. to 700 ° C. in the cooling process after the firing is set to 10 ° C./sec to 30 ° C./sec.
    The method for manufacturing a photovoltaic device according to claim 4.
  7. 　前記第７工程では、前記焼成後の冷却過程を不活性ガス雰囲気下で行うこと、
    　を特徴とする請求項４に記載の光起電力装置の製造方法。     In the seventh step, the cooling process after firing is performed in an inert gas atmosphere;
    The method for manufacturing a photovoltaic device according to claim 4.
  8. 　前記第８工程では、気相成長法または金属箔の接着により前記裏面反射膜を形成すること、
    　を特徴とする請求項４に記載の光起電力装置の製造方法。     In the eighth step, the back reflective film is formed by vapor deposition or metal foil adhesion;
    The method for manufacturing a photovoltaic device according to claim 4.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015073065A (en) * 2013-10-02 2015-04-16 台湾茂▲し▼電子股▲ふん▼有限公司Ｍｏｓｅｌ Ｖｉｔｅｌｉｃ Ｉｎｃ． Method for manufacturing solar cell
US20220310865A1 (en) * 2020-09-23 2022-09-29 Suzhou Talesun Solar Technologies Co., Ltd. Laminated cell structure and preparation method thereof

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6262229A (en) * 1985-09-13 1987-03-18 Minolta Camera Co Ltd Camera with multi-split photometer
CN103489934B (en) * 2013-09-25 2016-03-02 晶澳（扬州）太阳能科技有限公司 Local aluminum back surface field solar cell of a kind of transparent two sides and preparation method thereof
EP3200242A4 (en) * 2014-09-22 2018-07-11 KYOCERA Corporation Solar cell element
TWI590473B (en) * 2014-10-24 2017-07-01 昱晶能源科技股份有限公司 Solar cell and method for manufacturing the same
JP6502651B2 (en) * 2014-11-13 2019-04-17 信越化学工業株式会社 Method of manufacturing solar cell and method of manufacturing solar cell module
JP6486219B2 (en) * 2015-06-24 2019-03-20 三菱電機株式会社 Manufacturing method of solar cell

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004006565A (en) * 2002-04-16 2004-01-08 Sharp Corp Solar cell and its manufacturing method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004006565A (en) * 2002-04-16 2004-01-08 Sharp Corp Solar cell and its manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015073065A (en) * 2013-10-02 2015-04-16 台湾茂▲し▼電子股▲ふん▼有限公司Ｍｏｓｅｌ Ｖｉｔｅｌｉｃ Ｉｎｃ． Method for manufacturing solar cell
US20220310865A1 (en) * 2020-09-23 2022-09-29 Suzhou Talesun Solar Technologies Co., Ltd. Laminated cell structure and preparation method thereof

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