KR20030036893A - Solar cell and method of manufacture thereof - Google Patents

Abstract

In the solar cell 100, an uneven portion is formed on a main surface of the semiconductor substrate 1, the main surface is covered with an insulating film 3, and includes a top portion of at least a part of the convex portion 15 forming the uneven portion. In such a manner, the semiconductor layer exposed region 5 which is not covered with the insulating film 3 is formed on the main surface. The output extraction electrode 7 is formed so as to contact the top 25 of the convex portion 15 in the semiconductor layer exposed region 5 directly or indirectly through another conductive layer. The semiconductor layer exposed region 5 covers the main surface of the semiconductor substrate 1 with the insulating layer 3 in the form including the uneven portion 15, and the surface of the semiconductor layer 1 except for the top portion 25 of the convex portion 15. The insulating film 3 is further covered with the etching protective film 4 in the region, and then formed by removing the insulating film 3 of the top portion 25 of the convex portion 15 by etching.

Description

SOLAR CELL AND METHOD OF MANUFACTURING THEREOF {SOLAR CELL AND METHOD OF MANUFACTURE THEREOF}

A solar cell is a semiconductor device that converts light energy into electric power. There are p-n junction type, pin type, and Schottky type, and p-n junction type is most widely used. When solar cells are classified on the basis of their substrate materials, they are broadly divided into three types: silicon crystalline solar cells, amorphous silicon solar cells, and compound semiconductor solar cells. Silicon crystal solar cells are further classified into monocrystalline solar cells and polycrystalline solar cells. Among these, the highest energy conversion efficiency is a compound semiconductor solar cell, and a compound semiconductor solar cell is very difficult to make a compound semiconductor of the material, and it is a problem to spread in general in terms of manufacturing cost of a solar cell substrate. The use is limited. On the other hand, as the solar cell having the higher conversion efficiency next to the compound semiconductor solar cell, the silicon single crystal solar cell is followed, and the silicon single crystal substrate for solar cell can be manufactured relatively easily, and thus, the solar cell is widely used. Has become the flagship.

Generally, the output characteristics of a solar cell are evaluated by measuring the output current voltage curve as shown in FIG. 18 using a solar simulator. On this curve, the point Pm where the product (IpVp) of the output current Ip and the output voltage Vp becomes maximum is called the maximum output Pm, and this Pm is the total light incident on the solar cell. Divided by energy (S × I: S is device area, I is intensity of irradiated light):

η≡ {Pm / (S × I)} × 100 (%). (One)

This is defined as the conversion efficiency (η) of the solar cell. As is also clear from Fig. 18, in order to increase the conversion efficiency η, the short-circuit current Isc (output current value when V = 0 on a current voltage curve) or the open voltage Voc; It is important to increase the output voltage value) and to make the output current voltage curve as close to a square as possible. In addition, the degree of the square of the output current voltage curve is generally,

FF 'Ipm × Vpm / (Isc × Voc)... (2)

It can be evaluated by the fill factor (curve factor) defined as, and the closer the value of this FF to 1, the closer the output current voltage curve is to the ideal square and the higher the conversion efficiency (η).

For example, in a silicon crystal solar cell, SiO ₂ or the like is formed on the surface of the silicon layer in order to increase the open-circuit voltage (Voc) by preventing recombination of electrons and holes in the direct contact portion between the output electrode metal electrode and the silicon layer. A structure for forming an insulating film is employed (so-called MIS contact or contact passivation). However, if the entire surface of the silicon layer is covered with the insulating film as described above, the generated photocurrent must pass through the insulating film in a tunnel effect, and the photocurrent collection rate is lowered, so that a sufficient improvement in conversion efficiency cannot be expected.

In order to prevent this, by providing a small contact hole in a part of the insulating film and forming a metal electrode therein, the direct contact between the metal electrode and the silicon layer serving as a recombination site is limited to a small area, and the photocurrent collection rate is improved. Is done. In this case, it becomes a problem how to form a contact hole in the insulating film. For example, in the laboratory, a method of forming a contact hole by etching an insulating film using a photoresist or the like can be considered. However, since this method uses photolithography technology, the number of processes and costs are excessive, and it is not practical from the viewpoint of mass production of solar cells.

Therefore, Japanese Unexamined Patent Application Publication No. 8-335711 proposes a method of forming a contact hole without using a photolithography technique. Specifically, a pattern of the output electrode metal electrode is formed on the insulating film by screen printing of the conductive paste and then fired. Thereby, the frit of the metal and glass contained in the paste is melted by heat, and the contact hole is formed by breaking through the insulating film and reaching the emitter layer. This technique is generally called firethrough and can be used to form contact holes simply. Therefore, this technique is widely used when manufacturing single crystal or polycrystalline solar cells.

By the way, in the solar cell manufacturing method by a fire-through system, it is necessary to set the dopant density | concentration of the emitter layer which is a surface n-type layer high. This is because when the dopant concentration of the emitter layer is low, the contact resistance of the direct contact portion of the metal and silicon formed by the firethrough does not sufficiently decrease, leading to a large contact resistance loss, which leads to a decrease in power that can be taken out. Because. However, when the dopant concentration of the emitter layer is increased by diffusion, the compound of semiconductor silicon and the dopant is precipitated, many defect levels are formed on the surface, and the surface recombination rate increases. In such a state, the short wavelength sensitivity of the solar cell becomes small, which causes a problem that the current that can be taken out becomes small.

On the other hand, in order to increase the conversion efficiency (η) of the solar cell, it is also important to make the formation width of the output extraction metal electrode as small as possible to reduce the shadow loss. However, in the fire-through method, since the electrode is formed by screen printing, it is difficult in principle to make the electrode width extremely small, and as a result, the arrangement interval of a plurality of electrodes to be formed in order to reduce the shadowing loss can not be widened. There will be no. In this way, when the arrangement intervals of the electrodes are widened, the lateral conduction distance in the thin emitter layer becomes long at the time of current extraction, so that the emitter resistance loss is large and the conversion efficiency? Is inevitably reduced. For these reasons, it is considered difficult to employ a fire-through method and to produce a solar cell having a good conversion efficiency η, for example, a solar cell with η exceeding 20%.

An object of the present invention is to provide a solar cell which has high conversion efficiency and can be manufactured at low cost, and a manufacturing method thereof.

The present invention relates to a solar cell having a relatively high photoelectric conversion efficiency and that can be produced at a low cost and a method of manufacturing the same.

1A is a schematic diagram showing a cross-sectional structure of a first example of a solar cell according to the present invention;

1B is a schematic diagram showing a cross-sectional structure of a second example of a solar cell according to the present invention;

2A is a perspective view showing a first example of the form of the uneven portion formed on the semiconductor substrate;

2B is a perspective view showing a second example similarly;

2C is a perspective view showing a third example similarly;

3 is a flowchart showing manufacturing steps of the solar cell in the experimental example;

4A is a process explanatory diagram showing a method for forming a semiconductor layer exposed region in the present invention;

4B is an explanatory diagram of a process following FIG. 4A.

4C is an explanatory diagram of the process following FIG. 4B.

4D is an explanatory diagram of the process following FIG. 4C.

5 is a schematic diagram showing a cross-sectional structure of a solar cell used in Experimental Example 2;

6 is an enlarged perspective view showing a main part of a solar cell used in Experimental Example 3;

7A is a schematic diagram showing a first example of a cross-sectional structure of a main part of the solar cell of the present invention;

7B is a schematic diagram showing the second example similarly;

7C is a schematic diagram showing the third example in the same manner;

7D is a schematic diagram showing the fourth example similarly;

7E is a schematic diagram showing the fifth example in the same manner;

7F is a schematic diagram showing the sixth example similarly;

7G is a schematic diagram showing the seventh example similarly;

8A is a process explanatory diagram showing an example in which an etching protective film is formed in a thick step by using a coating liquid;

8B is an explanatory diagram of the process following FIG. 8A.

8C is an explanatory diagram of the process following FIG. 8B.

8D is an explanatory diagram of the process following FIG. 8C.

9A is a diagram for explaining the relationship between the viscosity of a coating liquid and the formation state of an etching protective film;

9B is an explanatory diagram following FIG. 9A;

9C is an explanatory diagram following FIG. 9B;

9D is an explanatory diagram following FIG. 9C;

10A is a cross-sectional schematic diagram illustrating the relationship between the formation form of an etching protective film and the formation mode of a semiconductor layer exposed portion;

10B is a cross-sectional schematic diagram showing another example in the same manner;

11A is a cross-sectional schematic diagram showing the first example of the manufacturing process of the solar cell of the present invention incorporating a transparent conductive layer.

11B is a cross-sectional schematic diagram showing the second example in the same manner;

11C is a cross-sectional schematic diagram showing the third example likewise;

12 is a schematic cross-sectional view showing a modification of the formation mode of the electrode for output extraction in the solar cell of the present invention incorporating a transparent conductive layer;

FIG. 13A is a diagram for explaining a difference in current paths flowing through the surface layer portion with or without a transparent conductive layer; FIG.

13B is an explanatory diagram following FIG. 13A;

14 is a graph showing the current-voltage characteristics of each solar cell in Experimental Example 1;

15 is a graph showing the relationship between the internal quantum efficiency and the wavelength in the same manner;

16 is an explanatory diagram of a principle of a solar cell using a p-n junction;

17 is a perspective view schematically showing an example of a form of formation of an output extraction electrode on the light receiving surface side;

18 is an explanatory diagram of a current voltage curve of a solar cell;

Fig. 19A is a schematic diagram for explaining the difference in the form of the semiconductor layer exposed portion between the present invention and the conventional method,

19B is an explanatory diagram following FIG. 19A.

In order to solve the above problems, the first configuration of the solar cell of the present invention is a convex portion for forming a concave-convex portion in a solar cell in which a concave-convex portion is formed on a main surface of a semiconductor substrate and the main surface is covered with an insulating film. A semiconductor layer exposed region, which is not covered with an insulating film in a form including a top portion of at least a portion thereof, is formed on the main surface, and the tip height position of the top portion of the convex portion within the semiconductor layer exposed region is the semiconductor layer exposed region. The output extraction electrode is formed so as to be higher than the maximum height position of the insulating film on the outer periphery and to contact the top of the convex portion in the exposed region of the semiconductor layer directly or indirectly through another conductive layer.

In addition, in this specification, the main surface of a semiconductor substrate means at least one of both surfaces (surface, back surface) in the thickness direction of a semiconductor substrate. Therefore, the uneven part may be formed only in one main surface of a board | substrate, and may be formed in both surfaces. In this specification, the semiconductor layer exposed region includes not only the case where the insulating film is completely removed, but also the case where an insulating film having a thickness (about 3 nm or less) as long as the tunnel current flows remains.

In the solar cell of the first configuration, the uneven portion is formed on the main surface of the semiconductor substrate. Such uneven portion formation has been employed in conventional silicon single crystal solar cells mainly for the purpose of preventing reflection loss. However, the present invention is characterized in that the uneven portion is used not only in view of preventing reflection loss, but also in its unique form for forming a semiconductor layer exposed region that should function as a contact hole between the output extraction electrode and the semiconductor layer. Specifically, as illustrated in FIG. 19A, the semiconductor layer exposed region 5 is formed into a shape including the top portion 25 of the convex portion 15, and at the tip height position of the convex portion 15. Is set higher than the maximum peak height position of the insulating film 3 at the outer peripheral edge of the semiconductor layer exposed region 5. Then, the output extraction electrode 7 is formed so as to contact the top 25 of the convex portion 15 in the semiconductor layer exposed region 5 directly (or indirectly through another conductive layer).

For example, in a contact hole formed by photolithography or fire through in a conventional solar cell, as shown in Fig. 19B, the semiconductor layer exposed region 5 is formed so as to form a bottom surface of the contact hole. The semiconductor layer 2 in the exposed region 5 can never protrude beyond the upper edge of the surrounding insulating film 3. In this respect, the structure of the solar cell according to the first aspect of the present invention is critically different from that of these conventional solar cells. By employing such a structure, the semiconductor layer exposed region 5 can be formed very simply by the manufacturing method of the solar cell of the present invention shown below.

That is, this method comprises the steps of forming the uneven portion on the main surface of the semiconductor substrate;

Coating the main surface of the semiconductor substrate with an insulating film in a form including an uneven portion;

Covering the insulating film with an etching protection film in a region other than the top of the convex portion forming the uneven portion;

Thereafter, by removing the insulating film at the top of the convex portion by etching, forming a semiconductor layer exposed region not covered with the insulating film in a form including the top of at least a portion of the convex portion;

And forming an output extraction electrode so as to contact the top of the convex portion in the semiconductor layer exposed region directly or indirectly through another conductive layer.

In the second configuration of the solar cell according to the present invention, the features of the solar cell of the present invention are adopted from the viewpoint of the manufacturing method. An uneven portion is formed on the main surface of the semiconductor substrate and the main surface is covered with an insulating film. And a semiconductor layer exposed region, which is not covered with an insulating film in the form of a top portion of at least a portion of the convex portion forming the uneven portion, is formed on the main surface, and directly or another conductive portion at the top of the convex portion in the semiconductor layer exposed region. In a solar cell in which an output extraction electrode is formed to indirectly contact through a layer,

The exposed portion of the semiconductor layer covers the main surface of the semiconductor substrate with an insulating film in the form of an uneven portion, and further covers the insulating film with an etching protection film in a region other than the top of the convex portion, and then the insulating film at the top of the convex portion by etching. Characterized in that formed by removing.

According to the above method, the main surface of the semiconductor substrate 1 shown in FIG. 4A is covered with an area except the top 25 of the convex portion 15 formed on the main surface, as shown in FIG. 4B. In other words, the convex part 15 is filled up to the middle of the height direction, and the etching protection film 4 is formed so that only the top part may protrude. As shown in FIG. 4C, the etching is then performed to selectively remove the insulating film 3 of the top portion 25 of the convex portion 15 protruding from the etching protection film 4. As a result, the semiconductor layer exposed region 5 described above is formed in a form including the top 25 of the convex portion 15. As shown in FIG. 4D, the tip height position of the convex portion 15 is higher than the maximum height position 11 of the insulating film 3 at the outer peripheral edge of the semiconductor layer exposed region 5.

As the etching protective film 4, a general-purpose polymer resist having no photosensitivity can be used, and in order to form the coating state as described above, it is only necessary to set the formation thickness of the etching protective film 4 appropriately. When the coating state is formed, the semiconductor layer exposed region 5 can be formed simply by immersing the substrate in a suitable etching solution, for example. Therefore, cumbersome and high number of photolithography techniques are unnecessary, and of course, firethrough is also unnecessary, so that good ohmic contact can be obtained without increasing the dopant concentration on the substrate surface. Thereby, the fill factor of a solar cell can be raised. Moreover, since the dopant concentration of a surface can be made low, the short wavelength sensitivity of a solar cell can increase and a short circuit current can be improved. In this way, a high performance solar cell with high conversion efficiency can be realized.

Next, in the third configuration of the solar cell according to the present invention, in the solar cell in which the main surface of the semiconductor substrate is covered with the insulating film, the semiconductor layer exposed area not covered with the insulating film is formed in the main surface, The transparent conductive layer which covers the semiconductor layer exposed area | region and the insulating film collectively is formed, and the output extraction electrode is formed on this transparent conductive layer.

In this configuration, a semiconductor layer exposed region functioning as a contact hole is formed in the insulating film, and a transparent conductive layer covering the semiconductor layer exposed region and the insulating film is collectively formed. An electrode for output extraction is formed on this transparent conductive layer. In the case where such a transparent conductive layer is not provided, as illustrated in FIG. 13A, the current generated at the semiconductor substrate 1 side causes the substrate surface layer portion (for example, emitter layer) 2 having a relatively high resistivity in the transverse direction. After flowing, since it is taken out from the output take-out electrode 7, series resistance becomes large, and loss becomes easy. However, according to the solar cell according to the third configuration of the present invention, as illustrated in FIG. 13B, the current from the semiconductor layer exposed region 5 has a relatively high conductivity (that is, a relatively low resistivity) of the transparent conductive layer ( After 6) flows laterally, it can take out from the output extraction electrode 7. Therefore, the resistance loss when the current flows in the lateral direction can be greatly reduced. For example, in FIG. 13A, the distance LP1 to the output extraction electrode 7 must all be a transverse conduction path in the substrate surface layer portion 2. In FIG. 13B, the output extraction electrode 7 ), The current should flow into the transparent conductive layer 6 from the nearest semiconductor layer exposed region 5, and the transverse conduction length LP2 is determined by the transverse conduction length (Fig. 13A). It is obviously much shorter than LP1). As another effect, since the transparent conductive layer is formed, shadowing loss due to the transparent conductive layer itself hardly occurs. In this way, the short circuit current and the conversion efficiency of the solar cell can be improved.

In particular, when the output take-out electrode is formed by general-purpose screen printing, the width of the output take-out electrode 7 becomes large. Therefore, it is necessary to widen the formation interval in order to reduce the shadowing loss. When the transparent conductive layer is not provided as shown in Fig. 13A, the series resistance increase due to the lateral current becomes a problem. In the third configuration of the solar cell according to the present invention, as shown in Fig. 13B, Since the transparent conductive layer 6 functions as a transverse conduction path, the influence of this problem can be dramatically reduced. In addition, when the series resistance increases, there is a certain limit even when the formation interval of the output extraction electrode is increased. According to the solar cell according to the third configuration of the present invention, the output extraction is provided on the transparent conductive layer 6. Even if the formation intervals of the electrodes 7 and 7 are made considerably large, the series resistance does not become as high as that, and as a result, the shadowing loss can be made smaller.

In addition, in the present invention, since the current does not need to flow in the transverse direction in the substrate surface layer portion (e.g., emitter layer), even if the sheet resistance is high, for example, when the n-type emitter layer is formed, the sheet resistance is 100? There is no problem even if it is much higher from /. That is, the dopant concentration of the substrate surface layer portion can be further lowered. As a result, the surface recombination rate can be further lowered and the conversion efficiency can be increased.

In addition, the 3rd structure of the solar cell which concerns on the said invention can be combined with the above-mentioned 1st structure or 2nd structure. In this case, the output extracting electrodes 7 and 7 can be formed at positions corresponding to the convex portions 15 scattered at respective portions of the main surface of the substrate as shown in Fig. 13B. On the other hand, the third configuration may be performed independently of the first or second configuration. In FIG. 7E, the convex portion 15 is not formed on the main surface of the substrate 1, and the semiconductor layer exposed portion 35 is formed in the insulating layer 3 by photolithography or the like.

Next, the fourth configuration of the solar cell according to the present invention is a solar cell in which a main surface of a semiconductor substrate is covered with an insulating film, wherein a plurality of semiconductor layer exposed areas not covered with the insulating film are formed on the main surface. In some of the semiconductor layer exposed regions, the output extraction electrode is formed in direct contact with the semiconductor layer, while the remaining semiconductor layer exposure region in which the output extraction electrode is not formed is covered with a transparent auxiliary insulating layer. It is done.

In the configuration of the solar cell in which the output extraction electrode is formed in direct contact with the semiconductor layer in the semiconductor layer exposure region, for example, as described above, the semiconductor exposure region is accidentally formed by using the uneven profile of the main surface of the semiconductor substrate. In this case, the semiconductor exposure region is not necessarily used as a contact hole with the output extraction electrode when the output extraction electrode is formed, but the semiconductor exposure is located at a position deviating from the formation region of the output extraction electrode. The area may remain. In the fourth configuration, the semiconductor layer exposed area can be passivated by covering such a remaining semiconductor layer exposed area, which is not used as a contact hole, with a transparent auxiliary insulating layer, and attaching dirt to the semiconductor layer from the semiconductor layer exposed area. It is possible to effectively prevent the occurrence of unwanted leak current and the like. In addition, since the auxiliary insulating layer is configured to be transparent, shadowing loss due to the formation of this auxiliary insulating layer is unlikely to occur. In addition, such an auxiliary insulating layer can be easily formed by covering the remaining semiconductor layer exposed region, the insulating film and the output extraction electrode collectively, and can reduce the manufacturing cost.

The 4th structure of the solar cell which concerns on the said invention can be combined with the above-mentioned 1st structure or 2nd structure. For example, in FIG. 7F, the semiconductor layer exposed region 5 is formed in the top portion 25 of the convex portion 15, and the output extraction electrode 7 is formed in the semiconductor layer exposed region 5 in the semiconductor layer ( 2) directly in contact with. On the other hand, the fourth configuration may be implemented irrespective of the first configuration or the second configuration. In the example shown in FIG. 7G, the convex portion 15 is not formed on the main surface of the substrate 1, and the semiconductor layer exposed portion 35 is formed in the insulating layer 3 by photolithography or the like. In either configuration, the auxiliary insulating layer 10 covers the remaining semiconductor layer exposed region 5 ', the insulating film 3, and the output extraction electrode 7 collectively.

EMBODIMENT OF THE INVENTION Hereinafter, some embodiment which concerns on this invention is described using drawing. In addition, in the whole figure for demonstrating embodiment, the thing with the same function is attached | subjected with the same code | symbol, and the repeated description is abbreviate | omitted.

1: A is sectional drawing which shows typically one Embodiment of the solar cell of this invention. The solar cell 100 is a diffusion layer 2 of an impurity on the first main surface side of a silicon single crystal substrate 1 (hereinafter, simply referred to as a substrate 1 in the present embodiment). In the embodiment, n-type) is formed to form a pn junction. The layer newly formed in the vicinity of the surface of the semiconductor substrate like the diffusion layer 2 is collectively referred to as the semiconductor layer 2 in the present invention. On the surface of the semiconductor layer 2, an insulating film (passivation film) 3, a transparent conductive layer 6, and an output extraction electrode 7 are formed in this order.

Here, the uneven part is formed in the 1st main surface of the board | substrate 1, and the insulating film 3 is formed in the form which coat | covers the uneven part. The semiconductor layer exposed region 5 which is not covered with the insulating film 3 is formed in the form including the top 25 of a part of the plurality of convex portions 15 forming the uneven portion. As enlarged in FIG. 19A, the tip height position of the top portion 25 of the convex portion 15 in the semiconductor layer exposed region 5 is an insulating film at the outer peripheral edge of the semiconductor layer exposed region 5. It is higher than the maximum height position of (3) (namely, the maximum height position of the inner peripheral edge 11 of the insulating film 3). The transparent conductive layer 6 is in direct contact with the semiconductor layer 2 at the top 25 of the convex portion 15 in the semiconductor layer exposed region 5, and the output extraction electrode 7 formed thereon is In other words, the semiconductor layer 2 is indirectly contacted via the transparent conductive layer 6.

The semiconductor layer exposed region 5 is preferably formed such that the total area ratio is 1% or less on the main surface (here, the first main surface) of the substrate 1 on which the semiconductor layer exposed region 5 is formed. Since the semiconductor layer exposed region 5 functions as a contact hole with the transparent conductive layer 6, and the surface recombination rate becomes very large at this position, the effective surface recombination rate can be reduced by setting the total area ratio to 1% or less. Can be. As a result, the open circuit voltage and the conversion efficiency can be improved. On the other hand, if the formation area ratio is not as low as 0.001%, the resistance increases due to the current concentration in the vicinity of the contact, so that a sufficient improvement in conversion efficiency cannot be expected.

Since single crystal silicon, which is a constituent material of the substrate 1, has a large refractive index of 6.00 to 3.50 in the region of the wavelength of 400 to 1100 nm, the reflection loss when the sunlight is incident becomes a problem. The uneven portion is formed mainly to prevent reflection of the first main surface serving as the light receiving surface of the solar cell, and as shown in FIG. 2A, the outer surface is randomly composed of a plurality of pyramidal protrusions 55 having a (111) surface. It can be a texture structure. Such a texture structure can be formed by anisotropically etching the (100) plane of the silicon single crystal using an etching solution such as an aqueous hydrazine solution or sodium hydroxide. The semiconductor layer exposed region 5 can be formed to include the tip portion of the pyramidal protrusion 55.

In addition, as shown in Fig. 2B, one having a form in which the V grooves are arranged at regular intervals (the groove inner surface is, for example, (111) planes intersecting with each other of silicon single crystal) may be employed. Such V-groove can be formed by anisotropic etching using dilute NaOH aqueous solution using photolithography, for example. In this embodiment, the rib-shaped portion 56 having a triangular roof shape sandwiched between adjacent V grooves is a convex portion, and the ridge portion becomes a top portion. The semiconductor layer exposed region 5 can be formed in a form including only a part of the ridge line, for example. In this embodiment, by taking the form of a groove, the output extraction electrode can be formed in a regular shape, and the series loss can be reduced more effectively. When photolithography is used, as shown in Fig. 2C, it is also possible to form a lattice rib 57 having a shape in which the rib portion 56 of Fig. 2B is crossed in a lattice shape. In other words, it is possible to form a so-called inverse pyramid uneven portion having a shape in which pyramidal concave portions are arranged in a lattice shape. According to this, surface reflection can be suppressed more effectively.

In addition, the antireflection effect is sufficiently obtained, and considering the ease of carrying out the step of coating the etching protective film 4 in a form in which only the top part is exposed, from the valley bottom to the top of the convex part 15 to be formed. It is preferable to make the maximum height of 0.1 micrometer or more and 30 micrometers or less.

Next, the insulating film 3 can use an oxide type or a nitride type thing. Here, the substrate 1 is a silicon single crystal substrate, and the insulating film 3 is configured as an oxide film or a nitride film of silicon formed by heat treatment under a predetermined atmosphere (for example, can be formed by the CVD method). As a result, the insulating film 3 functions as a passivation film having a small surface recombination rate.

The method of forming the semiconductor layer exposed region 5 in the insulating film 3 is as described previously with reference to FIG. 4. For example, a coating liquid is prepared using a polymer material having sufficient resistance to etching such as hydrofluoric acid, for example, a novolac resin or the like as a resist material. In addition, the viscosity of a coating liquid can be adjusted using a suitable solvent. As shown in FIG. 8A, this coating liquid is applied by a known coating method, for example, a spin coat method or a spray method. In this case, the coating liquid is accumulated in the concave portion 16 formed between the adjacent convex portions 15 and 15, so that the coating layer 24 is formed. Subsequently, when the solvent is evaporated and dried, the coating layer 24 becomes the resist layer 4 ', as shown in Fig. 8B, so that the vicinity of the bottom of the recess 16 is partially filled.

8C and 8D, by repeating formation and drying of such an application layer 24, the resist layer 4 'gradually increases in thickness. When the top portion 25 of the convex portion 15 is in a state where only the necessary height is exposed, the formation of the resist layer 4 'or more is stopped, and as shown in Fig. 4C, the final etching protective film ( It is used as 4). In this state, the first main surface side of the substrate is immersed in an etching solution containing hydrofluoric acid or the like to dissolve an insulating film (for example, a silicon oxide film) covering the protruding top portion 25 of the convex portion 15. When removed, the semiconductor layer exposed region 5 is formed. When the etching is completed, as shown in Fig. 4D, the etching protective film 4 is removed using an organic solvent such as acetone or MEK (methyl ethyl ketone).

As for the coating liquid used when forming the etching protection film 4, it is necessary to use what adjusted viscosity suitably (for example, 0.04-0.1 N * s / m <^2> ). If the viscosity of the coating liquid is excessively large, as shown in FIG. 9A, the liquid returns to the top portion 25 of the convex portion 15 to be exposed from the liquid level of the coating layer 24 by the surface tension. It is easy to remain in the form that it enters, and after drying, as shown in FIG. 9B, the extra etching protection film 4a remains in the top part 25 of the convex part 15, and it obstructs etching. On the other hand, when the coating liquid adjusted to viscosity appropriately is used, the top part 25 of the convex part 15 can be exposed from the liquid level, without being sufficient, as shown in FIG. 9C. In this case, even if some etching protection film 4a remains in the top part 25 after drying, as shown in FIG. 9D, the residual film becomes thin and porous, or becomes an island shape, and the insulating film ( 3) can at least partially form an exposed state. In this case, since the etching liquid penetrates from this exposed part, the insulating film 3 of the part in which the etching protection film 4a remains is also removable. By reducing the residual amount of the etching protection film 4a at the peak of the convex portion 15 in this manner, as shown in FIG. 7C, the semiconductor layer exposed region corresponds to the film surface position of the etching protection film 4a. The upper surface 11 of the inner peripheral edge portion of the insulating film 3 forming the outer peripheral edge of (5) can be formed flat. Thereby, it becomes possible to form the semiconductor layer exposed area | region 5 with little residual | surviving of the insulating film 3, and also suppressing the gap of the formation area.

Moreover, if it can coat | cover with the etching protection film 4 in the form which completely encloses the periphery of a certain convex part 15, as shown to FIG. 7B or 7C, the proximal end outer peripheral surface of the convex part 15 will be an insulating film. The semiconductor layer exposed area | region 5 can be formed in the form which is coat | covered with (3) and the front-end | tip part of the convex part 15 protrudes more than the upper edge 11 of the insulating film 3. However, the height of the whole convex part 15 is not ideally matched, for example, as shown in FIG. 10A, the convex part 15 'whose height is smaller than the convex part 15 which exists in the periphery. If is formed, this may be completely embedded in the etching protective film 4. In this case, the insulating film 3 of the top part 25 of these convex parts 15 'is not removed naturally. 7D also shows an example in which the convex portion 15 'in which the insulating film 3 is not removed is formed. These convex parts 15 'are good enough if they do not interfere with the contact with the output extraction electrode 7, even if they are somewhat formed.

On the other hand, the etching protection film 4 is ideally uniformly filled in all the recesses, but in the case of employing a random texture structure, for example, as shown in Fig. 10B, the recesses are opened to the outside. In some cases, the concave portions 16 'are difficult to coat. In this case, since the etching protection film 4 is not formed sufficiently in such a concave portion 16 'or the convex portion 35 adjacent thereto, the insulating film 3 extends throughout the semiconductor layer exposed region 5. It may exist as the convex part 35 removed.

Also, as shown in FIG. 11A, the semiconductor layer exposed region 5 having a small irregular distribution of the formation area is formed uniformly. As shown in FIG. 8D, the film surface height position of the etching protective film 4 is substantially constant. It is desirable to make it.

Next, the transparent conductive layer 6 can be configured as a conductive oxide film such as tin oxide (SnO ₂ ) or indium oxide (In ₂ O ₃ ). Specifically, the tin oxide film (so-called nesa film) doped with antimony (Sb) or the indium oxide film (so-called ITO film) doped with tin (Sn) has a high conductivity and can be used suitably for the present invention. The double nesa film has high electrical conductivity and contributes particularly to the reduction of the series resistance of the solar cell. On the other hand, the ITO film is less expensive than the four yarns, but is inexpensive. In addition to the nesa film and the ITO film, for example, Cd ₂ SnO ₄ , Zn ₂ SnO ₄ , ZnSnO ₃ , MgIn ₂ 0 ₄ , GaInO ₃ doped with Sn doped CdSb ₂ 0 ₆ and Sn Etc. can be used as the material of the transparent conductive layer 6.

These conductive oxide films may be formed by a vapor deposition method, for example, chemical vapor deposition (CVD) or physical vapor deposition (PVD), such as sputtering or vacuum deposition. You may form using a method. As shown in FIG. 11B, the transparent conductive layer 6 is formed by collectively covering the semiconductor layer exposed region 5 and the insulating film 3, and as shown in FIG. 7D or 11C, the transparent conductive layer An output extraction electrode 7 is formed on (6). In these figures, all of the output extraction electrodes 7 are formed in a positional relationship overlapping the semiconductor layer exposed region 5, but the conductivity of the transparent conductive layer 6 is high, and thus output extraction is performed as shown in FIG. Even if the formation position of the dragon electrode 7 is slightly different from the position of the semiconductor layer exposed region 5, there is no problem.

From the viewpoint of reducing the series resistance of the solar cell 100, the transparent conductive layer 6 preferably adjusts the electrical resistivity to about 5 × 10 ⁻⁵ to 3 × 10 ⁻⁴ Ω · cm. For example, the ITO film produced by sputtering can set the value of an electrical resistivity to 1 * 10 <^-4> -2.8 * 10 <^{-4> (} ohm) * cm, for example. On the other hand, the nesa film can obtain a low resistivity film of, for example, 1 × 10 ^-4 Ω · cm or less by the CVD method.

In addition, the transparent conductive layer 6 can function as an antireflection film by employing a different refractive index from the silicon single crystal constituting the substrate 1. When functioning as an antireflection film, the refractive index of the constituent material of the transparent conductive layer 6 is preferably 1.5 to 2.5. For example, in the case of the nesa film, a refractive index is about 2.0, and when the thickness is made into about 40-70 nm, a remarkable antireflection effect can be acquired. In addition to the transparent conductive layer 6, instead of the transparent conductive layer 6, an antireflection film may be formed separately. For example, when a film having a refractive index lower than that of the transparent electrode layer 6, such as an MgF ₂ film, is formed on the transparent conductive layer 6, the reflectance can be further reduced, and the generated current density can be made higher.

The output extraction electrode 7 is formed by printing and baking a desired electrode pattern on the transparent conductive layer 6 by a known thick film printing method such as screen printing using a paste containing a metal powder such as silver powder. can do. In addition, by using the thermosetting paste, the output extraction electrode 7 can be formed at a lower temperature. As shown in FIG. 17, since the 1st main surface side of the board | substrate 1 becomes a light-receiving surface of a solar cell, the output extraction electrode 7 is an example, in order to raise the incident efficiency of the light to the pn junction part 48, For example, it can be comprised as having the thick busbar electrode formed in the suitable space | interval for reducing internal resistance, and the finger electrode branching in comb shape at the predetermined space | interval from this busbar electrode. However, when the electrical conductivity of the transparent conductive layer 6 is high enough, even if a finger electrode is omitted or formed, it is possible to set the formation interval wide.

In addition, when screen printing as described above is used, the formation width of the output take-out electrode 7 (bus bar electrode or finger electrode) becomes somewhat wider. In this case, as shown in FIG. 1A or 7D, the output extraction electrode 7 is formed in such a manner as to span the semiconductor layer exposed region 5 and the surrounding insulating layer 3. By screen printing, since the output extraction electrode 7 formed in such a unique form is wide, it is necessary to widen the interval of arrangement of a plurality of electrodes formed in order to reduce shadow loss. However, unlike the solar cell manufactured by the conventional fire-through method, since the transparent conductive layer 6 is formed in this structure, a resistance loss is small and conversion efficiency ((eta)) can be improved.

Returning to FIG. 1A, the uneven part for back reflection prevention is formed in the 2nd main surface of the board | substrate 1, and the insulating film 3 is formed in the form which coats those uneven parts. Moreover, the semiconductor layer exposed part 5 is formed in the mountain top part of the convex part 15. As shown in FIG. However, since the second main surface side does not become a light receiving surface, the entire surface of the second main surface is covered by the output take-out electrode 8. In addition, in the case where the thickness of the substrate 1 is made thin in order to reduce the weight of the solar cell, in order to prevent recombination and extinction of the minority carriers in the electrode 8 on the second main surface side, as shown in FIG. Similarly, a higher concentration high-diffusion diffusion layer 9 can be formed on the second main surface side as the same conductive type as the substrate 1 (so-called BSF (back surface field) layer).

Hereinafter, the operation of the solar cell 100 of FIG. 1 will be described. As shown in FIG. 16, when the solar cell 100 absorbs photons having energy of a prohibitively large range or more by light irradiation, in the p-type region and the n-type region, electrons and holes are minor carriers due to light excitation. And diffuse toward the junction, respectively. At the junction, an internal electric field (so-called "build-in electric field") is generated by the formation of an electric double layer, and electrons and holes diffused as minority carriers are caused by this internal electric field, and electrons are n-type regions. The holes are drawn into the p-type regions and separated to form a plurality of carriers. As a result, the p-type region and the n-type region are positively and negatively charged, respectively, and the electromotive force ΔE of the solar cell is generated between the electrodes (Figs. 1: 7, 8) provided in the respective portions.

Here, in the case of passivation of the substrate surface with the insulating film, if the contact hole is formed in a fire-through manner, the dopant concentration of the emitter layer, which is the semiconductor layer 2 and here, the surface n-type layer, is 3 × 10 ²⁰ cm ⁻³ (sheet If the resistance conversion is not set to about 40? /?), The resistance of the electrode contact portion formed by fire through cannot be lowered to a sufficient value, for example, about 0.01? Cm ² . That is, in the fire-through system, in order to reduce the contact resistance loss, the dopant concentration of the semiconductor layer 2 is inevitably raised. In addition, even if the width of the output take-out electrode 7 formed by screen printing is thin, 100 μm or more must be secured. In order to set the shadowing loss to around 5%, for example, the pitch between the electrodes is set to 2 to 3 mm. There was a need.

However, according to the structure of the solar cell 100 of FIG. 1, the semiconductor layer exposed area | region 5 used as a contact hole can be formed simply by simple etching, without using a fire-through system. Therefore, of course, the dopant concentration of the semiconductor layer 2 can also be set to a value smaller than 3 × 10 ²⁰ cm ⁻³ (sheet resistance conversion: 40Ω / □). As shown in FIG. 13B, since the transparent conductive layer 6 is used, the current is increased in the transverse direction in the semiconductor layer 2 as compared with the case of FIG. 13A in which the transparent electrode layer 6 is not used. There is no need to shed. For example, in the case where a nesa film or an ITO film is used as the transparent conductive layer 6, the sheet resistance can be as low as about 10 to 25? /? As long as there is a thickness (40 to 70 nm) used as the antireflection film. As a result, since the output extraction electrode 7 provided on the transparent conductive layer 6 does not increase as much as the series resistance even if it is doubled compared with the conventional one (2-3 mm), for example, the shadowing loss Can be greatly reduced.

In addition, in the said embodiment, although the uneven part was formed by the etching, an uneven part can also be formed by mechanical processing. For example, the groove-shaped thing shown in FIG. 2B can be easily formed by cutting. For example, a plurality of rows of grooves can be collectively formed by relatively moving the substrate and the rotary blades in the groove forming direction while rotating the plurality of rotary blades arranged in the axial direction to penetrate the substrate surface to a predetermined depth.

In the present invention, when there is no fear that the series resistance will increase by that, as shown in Figs. 7A to 7C or 5, the transparent conductive layer 6 is omitted and the semiconductor layer exposed region 5 is omitted. The output extraction electrode 7 can be brought into direct contact with the semiconductor layer 2. In this case, as shown in FIG. 7F, the remaining semiconductor layer exposed region 5 ′ on which the output extraction electrode 7 is not formed can be covered with the auxiliary insulating layer 10. In the example of this figure, the auxiliary insulating layer 10 forms the output extraction electrode 7, and then the remaining semiconductor layer exposed region 5 ′, the insulating film 3, and the output extraction electrode 7. It is formed by covering them collectively. As the material of the auxiliary insulating layer 10, an inorganic insulating film such as silicon nitride or silicon oxide can be adopted. In this case, by appropriately adjusting the formation thickness of the auxiliary insulating layer 10, it can function as an antireflection film.

Experimental Example

Hereinafter, the experimental result performed in order to confirm the effect of this invention is demonstrated.

Experimental Example 1

The solar cell shown in FIG. 1A was produced by the process which shows the flowchart of FIG. First, a p-type crystal silicon substrate 1 (boron-doped product having a resistivity of 2Ω · cm (dopant concentration of 7.2 × 10 ¹⁵ cm ⁻³ )) cut out from a silicon single crystal ingot was prepared. In addition, the thickness of the board | substrate 1 is 300 micrometers. The substrate 1 is chemically etched with an aqueous sodium hydroxide solution (concentration: 40% by mass), and after removing the damage layer due to slices, the substrate 1 is added to an aqueous sodium hydroxide solution (sodium hydroxide concentration: 3% by mass) to which isopropyl alcohol is added. By immersion and wet etching, irregularities in the form of random textures shown in FIG. 2A were formed on both main surfaces of the substrate 1.

After washing the board | substrate 1 in which the uneven | corrugation formation was complete | finished, the n-type diffused layer 2 (phosphorus diffuser layer) of sheet resistance 200 (ohm) / (square) was formed in the 1st main surface by thermal-diffusion of phosphorus. Subsequently, after phosphorus glass which formed on the surface of the board | substrate was etched and removed, it oxidized and the silicon dioxide film of thickness about 5 nm was formed in both main surfaces as the insulating film 3. Then, the coating liquid is applied to both surfaces while being sequentially dried by the spin-on method, so that some of the top portions 25 of the convex portions 15 protrude as shown in FIG. (4) was formed. Subsequently, it immersed in the hydrofluoric acid aqueous solution of 10 mass% of concentration, and only the insulating film 3 of the top part 25 was etched, and the semiconductor layer exposed part 5 was formed. Subsequently, the substrate was immersed in acetone to dissolve and remove the etching protective film 4.

Next, a tin dioxide film doped with antimony as the transparent conductive layer 6 was deposited on the first main surface of the substrate 1 by atmospheric pressure CVD. The film thickness of this transparent conductive layer 6 was 60 nm in order to serve also as an antireflection film. Next, on the surface of the first main surface of the substrate 1 by a screen printing method using silver paste, the pattern of the output take-out electrode 7 of the form shown in FIG. 17 is formed on the surface of the second main surface. The pattern of the output extraction electrode 8 was formed using the aluminum paste on the whole surface, respectively. Thereafter, hydrogen annealing was performed at a temperature of 400 ° C. to complete the solar cell 100 (Example 1).

In the phosphorus diffusion step, a high concentration p-type diffusion layer 9 (BSF) is formed on the back surface as shown in Fig. 1B, except that the boron is simultaneously diffused on the surface and boron on the back surface. A sample of the solar cell 101 provided with the layer) was also produced (Example 2). On the other hand, the solar cell produced using the conventional fire-through technique using the same board | substrate 1 as the above was produced (comparative example). In addition, the transparent electrode 6 is not formed in the comparative example. Each solar cell performed the performance evaluation test as follows. That is, it assembled to the solar cell unit which has a light receiving area of 10 cm angle, and measured the current-voltage characteristic in the temperature of 25 degreeC using the solar simulator (light intensity: 1 kW / m <^2> , spectrum: AM1.5 global). The result is shown in FIG. Table 1 also shows various characteristics of the solar cells of these solar cells. Moreover, the internal quantum efficiency of these solar cells is shown in FIG.

Open voltage (V) Short circuit current density (mA / ㎠) Conversion efficiency (%) Fill factor Example 1 (no BSF) 0.655 39.1 19.7 0.769 Example 2 (with BSF) 0.665 39.3 20.1 0.769 Comparative Example 0.581 32.4 14.3 0.760

In Example 1 and Example 2, the sheet resistance of the emitter layer which is the semiconductor surface layer part 2 was set to 200 ohms / square. On the other hand, in the comparative example which used the fire-through system, this sheet resistance was 40-50 ohms / square. And as shown in Table 1, it turns out that the fill factor is not reduced in Example 1 and Example 2 compared with the comparative example. This is considered to be because the sheet resistance of the transparent conductive layer was low in Example 1 and Example 2, and the increase of contact resistance was suppressed.

Moreover, when compared with the comparative example, in Example 1 and Example 2, the open circuit voltage has improved significantly. This is considered to be because the dopant concentration of the emitter layer is reduced, the surface recombination rate is reduced, and the area of the contact hole can be limited based on the semiconductor layer exposed region 5. In addition, as for the board | substrate 1 used for Example 1 and Example 2, the total area ratio in the 1st main surface of the semiconductor layer exposed area | region 5 is about from the surface observation by the scanning electron microscope (SEM). It confirmed that it became 1%.

When compared with the comparative example, the short circuit current also increases in Example 1 and Example 2. This is considered to be due to the reduction of the shadowing loss and the increase of the short wavelength sensitivity. In the comparative example, the current flows in the transverse direction in the heater layer, but instead in the transparent conductive layer 6 in the present invention example. The sheet resistance of the transparent conductive layer 6 is about 10 ohms / square, and compared with a comparative example, even if the electrode pitch is doubled, for example, it becomes the resistance loss of the same grade. Therefore, the shadowing loss can be halved, which is considered to have greatly contributed to the increase in short circuit current. Moreover, as shown in FIG. 15, it turns out that Example 1 and Example 2 are also increasing short wavelength sensitivity. This is because, as described above, the dopant concentration of the emitter layer is lowered and the surface recombination rate is reduced.

In Example 1 and Example 2, the opening voltage, the short-circuit current, and the fill factor were increased, respectively, so that conversion efficiency of 20% was obtained. In particular, in Example 2 in which the BSF layer was introduced on the back side, a solar cell having a conversion efficiency exceeding 20% was obtained.

In the solar cell according to the present embodiment, the electrode is formed on the entire rear surface, but a transparent conductive film and a comb-shaped electrode are formed on the rear surface of the solar cell in the same manner as the surface, so that light may be incident from the rear surface side. none. Moreover, although the n type diffused layer of 200 ohms / square was formed, if it can set it to a value higher than 100 ohms / square, a short wavelength sensitivity will increase and a solar cell characteristic will improve. Moreover, in the manufacturing process, an oxide film (silicon dioxide film) was used as the insulating film in this embodiment, but it may be a silicon nitride film. Moreover, although the thermal diffusion method was used for formation of a diffusion layer, as long as the structure of this invention, such as an ion implantation method and a spin-on method, can be formed, it is also possible to use any means.

Experimental Example 2

The solar cell 103 of the structure shown in FIG. 5 was produced as follows. First, a p-type single crystal silicon substrate 1 (gallium doped product having a thickness of 250 μm and a resistivity of 0.5 Ω · cm) produced by the CZ method was prepared, and the damage layer was etched in the same manner as in Experimental Example 1, and then random texture was applied to both surfaces. Formed cotton. After the formation of texture, coating a coating solution containing P ₂ O _5, and subjected to the thermal diffusion at 850 ℃, it was formed on the surface sheet resistance of about 100Ω / □ of the n-type diffusion layer (2).

Thereafter, pyrogenic oxidation was performed at 800 ° C, and the semiconductor layer exposed region 5 was formed in the same manner as in Experimental Example 1. FIG. Thereafter, the same output extraction electrodes 7 and 8 as those in Experimental Example 1 were formed on the first and second main surfaces, respectively. Subsequently, a silicon nitride film was formed by plasma CVD as the auxiliary insulating film 10 serving as the antireflection film, thereby completing the solar cell 103 (Example 3). At this time, the substrate temperature was set to 400 ° C., and the hydrogen annealing treatment was performed in the same manner as in Experiment 1 after film deposition. About this Example 3, the performance evaluation test was done similarly to Experimental example 1. As shown in FIG. The results are shown in Table 2.

Open voltage (V) Short circuit current density (mA / ㎠) Conversion efficiency (%) Fill factor Example 3 0.681 37.1 19.6 0.776

According to this, it turns out that in Example 3, the short circuit current reduces compared with Example 1 and 2 mentioned above, and the open circuit voltage increases. The reason why the short circuit current is reduced is considered to be that the electrode width and the electrode pitch have not changed from those of the conventional method. That is, it is because the shadowing area increased compared with Example 1 and 2 shown in Table 1. On the other hand, the reason why the open voltage increased is considered to be that the substrate resistivity was lowered from 2.0? Cm to 0.5? Cm. In general, lowering the substrate resistivity decreases the desaturation current density and increases the open circuit voltage. However, when the resistivity of the p-type substrate is about 2.0? Cm, it is necessary to examine the problem of photodeterioration. Photodegradation is a phenomenon in which when a strong light is irradiated to a solar cell, the lifetime of a solar cell substrate will fall and sufficient conversion efficiency will not be obtained.

In order to investigate the photodegradation, a solar cell manufactured using the gallium-doped CZ silicon single crystal substrate and a conventional boron-doped CZ silicon single crystal substrate (resistance of 0.5? Cm) were manufactured by the same method. One solar cell was continuously irradiated with pseudo sunlight under the solar simulator at 25 ° C. to investigate the light irradiation time dependence of the current-voltage characteristic. As a result, when the solar cell made of boron-doped substrate was irradiated under pseudo sunlight for 10 hours, the conversion efficiency of about 10% was observed. On the other hand, although the solar cell using a gallium doped board | substrate showed some fluctuation | variation in conversion efficiency, the change of the characteristic corresponded to deterioration was not seen. In this way, the problem of photodegradation can be avoided by using the gallium doped substrate, and the open voltage and the conversion efficiency can be improved. In this embodiment, a gallium-doped p-type substrate by the CZ method is used, but the problem of photodegradation can be avoided even in MCZ substrates and FZ substrates having a lattice oxygen concentration of several ppm or less. In addition, even if a p-type emitter layer is formed using an n-type substrate using boron or the like, the problem of photodegradation can be avoided.

Experimental Example 3

The solar cell 104 shown in FIG. 6 was produced as follows (In addition, in FIG. 6, only the part near the surface was shown, without showing an uneven | corrugated part and an anti-reflective film in order to avoid becoming complicated). First, a p-type single crystal silicon substrate 1 (250 μm in thickness, boron-doped product having a resistivity of 2 Ω · cm) produced by the CZ method was prepared, and using a dicer, a convex rib-shaped convex having a triangular cross section on the first main surface. The portions 45 and 45 were formed at intervals of 2 mm (the area between the convex portions 45 and 45 can be regarded as a concave portion). At this time, the height from the 1st main surface of the board | substrate 1 to the top of each convex part 45 and 45 was made into about 30 micrometers.

Next, after chemically etching the damage layer, a random texture structure having a height of about 5 μm was formed as an uneven portion on both main surfaces. Thereafter, thermal diffusion was performed in the same manner as in Experimental Example 2, an n-type diffusion layer 2 having a sheet resistance of about 100 Ω / square was formed on the surface, and then thermal oxidation was performed to form an oxide film as the insulating film 3. . On the second main surface side, an etching protective film was formed by the same method as in Experimental Example 1, while on the first main surface, a printing resist having a hydrofluoric acid specification made of rubber-based resin was formed as an etching protective film so as to have a thickness of 20 μm. Application was carried out. By doing so, the top portions 25 of the convex portions 45 and 45 initially formed by dicer protrude from the surface of the printed resist periodically in the ridge direction.

After drying the resist, the substrate 1 was immersed in a 10 mass% hydrofluoric acid aqueous solution, and the semiconductor layer exposed portion 5 was formed on the top portions 25 of the convex portions 45 and 45. Subsequently, after the resist was washed off using a solvent, a pattern of the output extraction electrode 7 shown in FIG. 6 was formed on the first main surface by using silver paste on the first main surface, and aluminum on the second main surface. The pattern of the output extraction electrode 8 was formed in the whole surface using the paste. At this time, the output extracting electrode 7 on the first main surface side needs to be aligned so that it is printed in a form overlapping with the top semiconductor layer exposed portion 5 of the convex portions 45 and 45, but the contact is required. Since the width of the electrode 7 is about 10 times the width of the semiconductor layer exposed portion 5 with respect to the width, it can be relatively roughly positioned. Subsequently, a TiO ₂ film (not shown) was formed as an antireflection film to a thickness of 60 nm by atmospheric pressure CVD to complete the solar cell 104 (Example 4).

The performance evaluation of this Example 4 was carried out in the same manner as in Experiment 1, so that an open voltage of 0.667 V, a short circuit current density of 36.9 mA / cm ² , a fill factor of 0.770, and a conversion efficiency of 19.0% were obtained. The characteristics are improved over the fire through method.

Claims (18)

In a solar cell in which an uneven portion is formed on a main surface of a semiconductor substrate and the main surface is covered with an insulating film, the semiconductor not covered with the insulating film in a form including at least a portion of the convex portion forming the uneven portion. A layer exposed area is formed on the main surface, and the tip height position of the top of the convex portion in the semiconductor layer exposed area is higher than the maximum height height of the insulating film at the outer peripheral edge of the semiconductor layer exposed area. And an output extraction electrode is formed so as to contact the top of the convex portion in the semiconductor layer exposed region directly or indirectly through another conductive layer. The solar cell according to claim 1, wherein the proximal end outer peripheral surface of the convex portion is covered with the insulating film, and the distal end of the convex portion protrudes from an upper edge of the insulating film. The solar cell according to claim 1 or 2, wherein an upper surface of the inner circumferential edge of the insulating film forming the outer circumferential edge of the exposed portion of the semiconductor layer is formed flat. The said other conductive layer is a transparent conductive layer which coat | covers the said semiconductor layer exposure area | region and the said insulating film collectively, The said output extraction electrode is formed on this transparent conductive layer, There is a solar cell characterized in that. In a solar cell in which a main surface of a semiconductor substrate is covered with an insulating film, a semiconductor layer exposed area which is not covered with the insulating film is formed on the main surface, and the transparency covering the semiconductor layer exposed area and the insulating film collectively. The whole layer is formed, The electrode for output extraction is formed on this transparent conductive layer, The solar cell characterized by the above-mentioned. The semiconductor device according to any one of claims 1 to 3, wherein a plurality of the semiconductor layer exposed regions are formed on the main surface, and in some of those semiconductor layer exposed regions, the output extraction electrode is in direct contact with the semiconductor layer. On the other hand, the solar cell, characterized in that the remaining semiconductor layer exposed area in which the output extraction electrode is not formed is covered with a transparent auxiliary insulating layer. In a solar cell in which a main surface of a semiconductor substrate is covered with an insulating film, a plurality of semiconductor layer exposed areas not covered with the insulating film are formed on the main surface, and the output extraction is performed in a part of those semiconductor layer exposed areas. A solar cell, wherein the electrode is formed in direct contact with the semiconductor layer, and the remaining exposed portion of the semiconductor layer in which the output extraction electrode is not formed is covered with a transparent auxiliary insulating layer. The solar cell according to claim 6 or 7, wherein the auxiliary insulating layer covers the remaining semiconductor layer exposed region, the insulating film, and the output extraction electrode collectively. The said semiconductor layer exposure area | region coats the said main surface of the said semiconductor substrate with the said insulating film in the form containing the said uneven part, The said semiconductor layer exposed area | region is a thing other than the said top part of the said convex part. And further covering the insulating film with an etching protection film in a region, and then removing the insulating film of the top portion of the convex portion by etching. An uneven portion is formed on a major surface of the semiconductor substrate, the major surface is covered with an insulating film, and includes a top portion of at least a portion of the convex portion forming the uneven portion. A solar cell formed on a main surface and provided with an output extraction electrode so as to contact the top of the convex portion in the semiconductor layer exposed region directly or indirectly through another conductive layer. The semiconductor layer exposed region covers the main surface of the semiconductor substrate with the insulating film in a form including the uneven portion, further covers the insulating film with an etching protection film in a region other than the top portion of the convex portion. The solar cell is formed by removing the insulating film of the top portion of the convex portion by etching. The solar cell according to any one of claims 1 to 10, wherein the uneven portion is made of at least one of a texture, a V groove, and an inverse pyramid. The solar cell according to any one of claims 1 to 11, wherein the semiconductor layer exposed region is formed such that the total area ratio is 1% or less on the main surface on which the semiconductor layer exposed region is formed. . The solar cell according to any one of claims 1 to 12, wherein the output extraction electrode is formed so as to span the semiconductor layer exposed region and the surrounding insulating layer. Forming an uneven portion on the main surface of the semiconductor substrate; Covering the main surface of the semiconductor substrate with the insulating film in a form including the uneven portion; Covering the insulating film with an etching protection film in a region other than the top of the convex portion forming the uneven portion; Thereafter removing the insulating film of the top portion of the convex portion by etching to form a semiconductor layer exposed region not covered with the insulating film in a form including the top portion of at least a portion of the convex portion; And forming an output extraction electrode so as to contact the top of the convex portion in the semiconductor layer exposed region directly or indirectly through another conductive layer. The method of manufacturing a solar cell according to claim 14, further comprising the step of forming the uneven portion by etching. The manufacturing method of the solar cell of Claim 14 or 15 including the process of forming the said uneven part by mechanical processing. 17. The process according to any one of claims 14 to 16, wherein the step of forming a plurality of the semiconductor layer exposed regions on the main surface and a part of the semiconductor layer exposed regions include the output extraction electrode on the semiconductor layer. And a step of directly contacting and covering the remaining semiconductor layer exposed area where the output extraction electrode is not formed with an auxiliary insulating layer. 18. The method of manufacturing a solar cell according to claim 17, wherein the auxiliary insulating layer is formed by covering the remaining semiconductor layer exposed region, the insulating film, and the output extraction electrode collectively.