TW436767B - Error correction system, error correction method, and data memory with error correction function - Google Patents

Error correction system, error correction method, and data memory with error correction function Download PDF

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Publication number
TW436767B
TW436767B TW088112956A TW88112956A TW436767B TW 436767 B TW436767 B TW 436767B TW 088112956 A TW088112956 A TW 088112956A TW 88112956 A TW88112956 A TW 88112956A TW 436767 B TW436767 B TW 436767B
Authority
TW
Taiwan
Prior art keywords
error correction
ecc block
buffer memory
block
byte
Prior art date
Application number
TW088112956A
Other languages
English (en)
Chinese (zh)
Inventor
Teruhiko Ushio
Mitsuharu Yamada
Toshio Kanai
Eiji Kunieda
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of TW436767B publication Critical patent/TW436767B/zh

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1044Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
TW088112956A 1998-09-25 1999-07-30 Error correction system, error correction method, and data memory with error correction function TW436767B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27191298A JP3272308B2 (ja) 1998-09-25 1998-09-25 誤り訂正システム、誤り訂正方法および誤り訂正機能を有するデータ記憶システム

Publications (1)

Publication Number Publication Date
TW436767B true TW436767B (en) 2001-05-28

Family

ID=17506620

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088112956A TW436767B (en) 1998-09-25 1999-07-30 Error correction system, error correction method, and data memory with error correction function

Country Status (4)

Country Link
JP (1) JP3272308B2 (ja)
KR (1) KR100339452B1 (ja)
SG (1) SG86356A1 (ja)
TW (1) TW436767B (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010081335A (ko) 2000-02-12 2001-08-29 구자홍 차세대 고밀도 기록 매체를 위한 디지털 데이터의 오류정정 부호화 방법
CN100530980C (zh) * 2003-07-09 2009-08-19 汤姆森特许公司 里德-所罗门乘积码的错误校正方法
US7607071B2 (en) * 2005-01-28 2009-10-20 Intel Corporation Error correction using iterating generation of data syndrome
KR100724211B1 (ko) * 2006-05-09 2007-05-31 엘지전자 주식회사 차세대 고밀도 기록 매체를 위한 디지털 데이터의 오류정정 부호화 방법
JP2008077458A (ja) 2006-09-22 2008-04-03 Fujitsu Ltd 記憶データ処理装置、記憶装置、記憶データ処理プログラム
KR102281751B1 (ko) * 2015-10-01 2021-07-27 에스케이하이닉스 주식회사 플래시 메모리 시스템 동작 방법

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5761220A (en) * 1994-09-19 1998-06-02 Cirrus Logic, Inc. Minimum latency asynchronous data path controller in a digital recording system

Also Published As

Publication number Publication date
KR20000022714A (ko) 2000-04-25
KR100339452B1 (ko) 2002-06-05
JP2000112776A (ja) 2000-04-21
JP3272308B2 (ja) 2002-04-08
SG86356A1 (en) 2002-02-19

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MM4A Annulment or lapse of patent due to non-payment of fees