TW429582B - Integrated semiconductor-circuit with full-structures - Google Patents
Integrated semiconductor-circuit with full-structuresInfo
- Publication number
- TW429582B TW429582B TW088109416A TW88109416A TW429582B TW 429582 B TW429582 B TW 429582B TW 088109416 A TW088109416 A TW 088109416A TW 88109416 A TW88109416 A TW 88109416A TW 429582 B TW429582 B TW 429582B
- Authority
- TW
- Taiwan
- Prior art keywords
- structures
- full
- circuit
- integrated semiconductor
- connection
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/926—Dummy metallization
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19825607A DE19825607C2 (de) | 1998-06-08 | 1998-06-08 | Integrierte Halbleiterschaltung mit Füllstrukturen |
Publications (1)
Publication Number | Publication Date |
---|---|
TW429582B true TW429582B (en) | 2001-04-11 |
Family
ID=7870321
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW088109416A TW429582B (en) | 1998-06-08 | 1999-06-07 | Integrated semiconductor-circuit with full-structures |
Country Status (6)
Country | Link |
---|---|
US (1) | US6294841B1 (zh) |
EP (1) | EP0964449A3 (zh) |
JP (1) | JP2000012786A (zh) |
KR (1) | KR100629541B1 (zh) |
DE (1) | DE19825607C2 (zh) |
TW (1) | TW429582B (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10004649A1 (de) * | 2000-02-03 | 2001-08-09 | Infineon Technologies Ag | Verfahren und Vorrichtung zur Anpassung/Abstimmung von Signallaufzeiten auf Leitungssystemen oder Netzen zwischen integrierten Schaltungen |
DE10224180B4 (de) * | 2002-05-31 | 2007-01-04 | Infineon Technologies Ag | Schaltungsanordnung zur Einstellung des Eingangswiderstandes und der Eingangskapazität eines integrierten Halbleiterschaltungschips |
JP2006012211A (ja) * | 2004-06-22 | 2006-01-12 | Toshiba Corp | 半導体集積回路 |
DE102007007357B4 (de) * | 2007-02-14 | 2018-06-21 | Infineon Technologies Ag | Integrierte Schaltungsanordnung |
JP2010040588A (ja) * | 2008-07-31 | 2010-02-18 | Covalent Materials Corp | シリコンウェーハ |
JP5561918B2 (ja) * | 2008-07-31 | 2014-07-30 | グローバルウェーハズ・ジャパン株式会社 | シリコンウェーハの製造方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4190854A (en) * | 1978-02-15 | 1980-02-26 | National Semiconductor Corporation | Trim structure for integrated capacitors |
JPS55117265A (en) * | 1979-03-02 | 1980-09-09 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Semiconductor device |
US5032890A (en) * | 1988-01-30 | 1991-07-16 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit with dummy patterns |
JPH02140934A (ja) * | 1988-11-21 | 1990-05-30 | Nec Corp | 半導体装置 |
JP2507618B2 (ja) * | 1989-07-21 | 1996-06-12 | 株式会社東芝 | 半導体集積回路装置の製造方法 |
JPH0434950A (ja) * | 1990-05-30 | 1992-02-05 | Nec Corp | 半導体集積回路装置 |
US5278105A (en) * | 1992-08-19 | 1994-01-11 | Intel Corporation | Semiconductor device with dummy features in active layers |
US5442225A (en) * | 1993-08-13 | 1995-08-15 | Lsi Logic Corporation | Integrated circuit having interconnects with ringing suppressing elements |
US6049135A (en) * | 1996-05-28 | 2000-04-11 | Kabushiki Kaisha Toshiba | Bed structure underlying electrode pad of semiconductor device and method for manufacturing same |
-
1998
- 1998-06-08 DE DE19825607A patent/DE19825607C2/de not_active Expired - Fee Related
-
1999
- 1999-05-20 EP EP99109982A patent/EP0964449A3/de not_active Withdrawn
- 1999-06-07 TW TW088109416A patent/TW429582B/zh not_active IP Right Cessation
- 1999-06-08 US US09/327,699 patent/US6294841B1/en not_active Expired - Lifetime
- 1999-06-08 KR KR1019990021093A patent/KR100629541B1/ko not_active IP Right Cessation
- 1999-06-08 JP JP11161146A patent/JP2000012786A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
KR20000006000A (ko) | 2000-01-25 |
DE19825607C2 (de) | 2000-08-10 |
KR100629541B1 (ko) | 2006-09-27 |
DE19825607A1 (de) | 1999-12-16 |
JP2000012786A (ja) | 2000-01-14 |
US6294841B1 (en) | 2001-09-25 |
EP0964449A2 (de) | 1999-12-15 |
EP0964449A3 (de) | 2000-05-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent | ||
MM4A | Annulment or lapse of patent due to non-payment of fees |