TW421719B - Arrangement to recognize the contact-fault at the test of the integrated circuits - Google Patents

Arrangement to recognize the contact-fault at the test of the integrated circuits Download PDF

Info

Publication number
TW421719B
TW421719B TW088103255A TW88103255A TW421719B TW 421719 B TW421719 B TW 421719B TW 088103255 A TW088103255 A TW 088103255A TW 88103255 A TW88103255 A TW 88103255A TW 421719 B TW421719 B TW 421719B
Authority
TW
Taiwan
Prior art keywords
pull
pad
integrated circuit
scope
pin
Prior art date
Application number
TW088103255A
Other languages
English (en)
Chinese (zh)
Inventor
Dominique Savignac
Frank Weber
Norbert Wirth
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of TW421719B publication Critical patent/TW421719B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2884Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
TW088103255A 1998-03-26 1999-03-03 Arrangement to recognize the contact-fault at the test of the integrated circuits TW421719B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19813503A DE19813503C1 (de) 1998-03-26 1998-03-26 Schaltungsanordnung zum Verhindern von bei Kontaktfehlern auftretenden falschen Ergebnissen beim Testen einer integrierten Schaltung

Publications (1)

Publication Number Publication Date
TW421719B true TW421719B (en) 2001-02-11

Family

ID=7862508

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088103255A TW421719B (en) 1998-03-26 1999-03-03 Arrangement to recognize the contact-fault at the test of the integrated circuits

Country Status (7)

Country Link
US (1) US6693447B1 (ja)
EP (1) EP0945735B1 (ja)
JP (1) JPH11326442A (ja)
KR (1) KR100297037B1 (ja)
CN (1) CN1134671C (ja)
DE (2) DE19813503C1 (ja)
TW (1) TW421719B (ja)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10243603B4 (de) * 2002-09-19 2007-04-19 Infineon Technologies Ag Verfahren zur Verwendung beim Trimmen, Halbleiter-Bauelement-Test-Gerät zum Durchführen des Verfahrens und Halbleiter-Bauelement-Test-System
KR100565326B1 (ko) * 2004-05-25 2006-03-30 엘지전자 주식회사 이동통신 단말기의 엘씨디 컨넥터 체크 장치
DE102006025031A1 (de) * 2006-05-26 2007-11-29 Micronas Gmbh Prüfschaltungsanordnung und Prüfverfahren zum Prüfen einer Schaltungsstrecke einer Schaltung
US20080013389A1 (en) * 2006-07-11 2008-01-17 Jaehee Kim Random access memory including test circuit
US7612574B2 (en) * 2007-01-25 2009-11-03 Micron Technology, Inc. Systems and methods for defect testing of externally accessible integrated circuit interconnects
US9267969B2 (en) * 2013-11-13 2016-02-23 Hamilton Sundstrand Corporation Electrical connector pin cover
WO2020162891A1 (en) 2019-02-06 2020-08-13 Hewlett-Packard Development Company, L.P. Pulldown devices
DE102022205262A1 (de) 2022-05-25 2023-11-30 Robert Bosch Gesellschaft mit beschränkter Haftung Integrierte Schaltung mit Messfunktion und Schaltungsanordnung

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0075079A1 (en) * 1981-09-21 1983-03-30 International Business Machines Corporation Circuit network checking system
US5565767A (en) * 1992-04-16 1996-10-15 Mega Chips Corporation Base substrate of multichip module and method for inspecting the same
EP0578858A1 (en) * 1992-07-17 1994-01-19 International Business Machines Corporation AC interconnect test of integrated circuit chips
JPH06249919A (ja) * 1993-03-01 1994-09-09 Fujitsu Ltd 半導体集積回路装置の端子間接続試験方法
US5670890A (en) * 1993-04-22 1997-09-23 Lsi Logic Corporation Switchable pull-ups and pull-downs for IDDQ testing of integrated circuits
DE69630730T2 (de) * 1995-05-31 2004-09-30 Texas Instruments Inc., Dallas Analogabtastpfadzelle
US5818251A (en) * 1996-06-11 1998-10-06 National Semiconductor Corporation Apparatus and method for testing the connections between an integrated circuit and a printed circuit board
US5859442A (en) * 1996-12-03 1999-01-12 Micron Technology, Inc. Circuit and method for configuring a redundant bond pad for probing a semiconductor

Also Published As

Publication number Publication date
CN1134671C (zh) 2004-01-14
KR19990078191A (ko) 1999-10-25
DE19813503C1 (de) 2000-03-09
EP0945735B1 (de) 2006-10-18
EP0945735A3 (de) 2000-02-23
EP0945735A2 (de) 1999-09-29
DE59913924D1 (de) 2006-11-30
JPH11326442A (ja) 1999-11-26
CN1231427A (zh) 1999-10-13
US6693447B1 (en) 2004-02-17
KR100297037B1 (ko) 2001-09-26

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GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees