TW411617B - Forming method for the roughened conductive film and the semiconductor apparatus - Google Patents

Forming method for the roughened conductive film and the semiconductor apparatus Download PDF

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Publication number
TW411617B
TW411617B TW087101876A TW87101876A TW411617B TW 411617 B TW411617 B TW 411617B TW 087101876 A TW087101876 A TW 087101876A TW 87101876 A TW87101876 A TW 87101876A TW 411617 B TW411617 B TW 411617B
Authority
TW
Taiwan
Prior art keywords
oxide film
roughened
film
conductive film
storage node
Prior art date
Application number
TW087101876A
Other languages
English (en)
Chinese (zh)
Inventor
Yoshihiko Okamoto
Kenichi Hanaoka
Hiroshi Ohnishi
Tadashi Yoshida
Shigeki Nakajima
Original Assignee
Mitsubishi Electric Corp
Ryoden Semiconductor Syst Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp, Ryoden Semiconductor Syst Eng filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW411617B publication Critical patent/TW411617B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/712—Electrodes having non-planar surfaces, e.g. formed by texturisation being rough surfaces, e.g. using hemispherical grains
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts

Landscapes

  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW087101876A 1997-08-11 1998-02-11 Forming method for the roughened conductive film and the semiconductor apparatus TW411617B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9216697A JPH1168061A (ja) 1997-08-11 1997-08-11 粗面化導電性膜の形成方法及び半導体装置

Publications (1)

Publication Number Publication Date
TW411617B true TW411617B (en) 2000-11-11

Family

ID=16692510

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087101876A TW411617B (en) 1997-08-11 1998-02-11 Forming method for the roughened conductive film and the semiconductor apparatus

Country Status (5)

Country Link
US (1) US5963815A (enExample)
JP (1) JPH1168061A (enExample)
KR (1) KR19990023080A (enExample)
DE (1) DE19809270A1 (enExample)
TW (1) TW411617B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW408447B (en) * 1999-01-04 2000-10-11 United Microelectronics Corp The formation method of semispherical grained silicon (HSG-Si)
JP2000340644A (ja) * 1999-05-27 2000-12-08 Mitsubishi Electric Corp 半導体装置の製造方法
US20040206998A1 (en) * 2002-08-26 2004-10-21 Renesas Technology Corp. Semiconductor device having a roughened surface electrode and method of manufacturing the same
KR102424963B1 (ko) 2015-07-30 2022-07-25 삼성전자주식회사 집적회로 소자 및 그 제조 방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2894361B2 (ja) * 1990-02-16 1999-05-24 三菱電機株式会社 半導体装置およびその製造方法
JPH04290219A (ja) * 1991-03-19 1992-10-14 Nec Corp 多結晶シリコン膜の形成方法
JP3034327B2 (ja) * 1991-03-25 2000-04-17 宮崎沖電気株式会社 キャパシタ電極の形成方法
JP3071284B2 (ja) * 1991-12-20 2000-07-31 宮崎沖電気株式会社 半導体素子の製造方法
JPH05343337A (ja) * 1992-06-10 1993-12-24 Fujitsu Ltd 半導体装置の製造方法
US5811344A (en) * 1997-01-27 1998-09-22 Mosel Vitelic Incorporated Method of forming a capacitor of a dram cell

Also Published As

Publication number Publication date
DE19809270A1 (de) 1999-02-25
JPH1168061A (ja) 1999-03-09
US5963815A (en) 1999-10-05
KR19990023080A (ko) 1999-03-25

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Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees