TW402752B - Method for fabricating a bonded wafer - Google Patents
Method for fabricating a bonded wafer Download PDFInfo
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- TW402752B TW402752B TW087118743A TW87118743A TW402752B TW 402752 B TW402752 B TW 402752B TW 087118743 A TW087118743 A TW 087118743A TW 87118743 A TW87118743 A TW 87118743A TW 402752 B TW402752 B TW 402752B
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- layer
- wafer
- diffusion barrier
- material layer
- barrier layer
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- 238000000034 method Methods 0.000 title claims abstract description 20
- 238000009792 diffusion process Methods 0.000 claims abstract description 29
- 230000004888 barrier function Effects 0.000 claims abstract description 27
- 239000000463 material Substances 0.000 claims abstract description 15
- 239000012535 impurity Substances 0.000 claims abstract description 14
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 239000000853 adhesive Substances 0.000 claims abstract description 11
- 230000001070 adhesive effect Effects 0.000 claims abstract description 11
- 238000005496 tempering Methods 0.000 claims description 14
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 229920000642 polymer Polymers 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 239000005380 borophosphosilicate glass Substances 0.000 claims 2
- 229910052814 silicon oxide Inorganic materials 0.000 claims 2
- PCTMTFRHKVHKIS-BMFZQQSSSA-N (1s,3r,4e,6e,8e,10e,12e,14e,16e,18s,19r,20r,21s,25r,27r,30r,31r,33s,35r,37s,38r)-3-[(2r,3s,4s,5s,6r)-4-amino-3,5-dihydroxy-6-methyloxan-2-yl]oxy-19,25,27,30,31,33,35,37-octahydroxy-18,20,21-trimethyl-23-oxo-22,39-dioxabicyclo[33.3.1]nonatriaconta-4,6,8,10 Chemical compound C1C=C2C[C@@H](OS(O)(=O)=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2.O[C@H]1[C@@H](N)[C@H](O)[C@@H](C)O[C@H]1O[C@H]1/C=C/C=C/C=C/C=C/C=C/C=C/C=C/[C@H](C)[C@@H](O)[C@@H](C)[C@H](C)OC(=O)C[C@H](O)C[C@H](O)CC[C@@H](O)[C@H](O)C[C@H](O)C[C@](O)(C[C@H](O)[C@H]2C(O)=O)O[C@H]2C1 PCTMTFRHKVHKIS-BMFZQQSSSA-N 0.000 claims 1
- 230000002079 cooperative effect Effects 0.000 claims 1
- 210000001747 pupil Anatomy 0.000 claims 1
- 210000002784 stomach Anatomy 0.000 claims 1
- 239000010410 layer Substances 0.000 abstract description 77
- 235000012431 wafers Nutrition 0.000 abstract description 55
- 239000004065 semiconductor Substances 0.000 abstract description 9
- 239000012790 adhesive layer Substances 0.000 abstract description 2
- 239000012298 atmosphere Substances 0.000 abstract description 2
- 238000011109 contamination Methods 0.000 abstract description 2
- 238000000137 annealing Methods 0.000 abstract 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 10
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 10
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 6
- 229910052796 boron Inorganic materials 0.000 description 6
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000005476 soldering Methods 0.000 description 6
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- 229910052698 phosphorus Inorganic materials 0.000 description 5
- 239000011574 phosphorus Substances 0.000 description 5
- 238000003466 welding Methods 0.000 description 5
- 239000005368 silicate glass Substances 0.000 description 4
- YMWUJEATGCHHMB-UHFFFAOYSA-N Dichloromethane Chemical compound ClCCl YMWUJEATGCHHMB-UHFFFAOYSA-N 0.000 description 3
- 239000004576 sand Substances 0.000 description 3
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052708 sodium Inorganic materials 0.000 description 2
- 239000011734 sodium Substances 0.000 description 2
- 235000017166 Bambusa arundinacea Nutrition 0.000 description 1
- 235000017491 Bambusa tulda Nutrition 0.000 description 1
- 241001330002 Bambuseae Species 0.000 description 1
- 235000015334 Phyllostachys viridis Nutrition 0.000 description 1
- 239000011425 bamboo Substances 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005034 decoration Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/976—Temporary protective layer
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Description
4074pif.doc/008 402752 A7 B7 經沪部屮""'if^d"fr4'竹^印衆 五、發明説明(/ ) 本發明是有關於一種半導體元件的製造方法,且特別 是有關於一種SOI形式之焊接晶圓的製造方法,其可防止 配置在二晶圓間之黏合材料層i 雜質。 晶圓焊接是形成一種在絕緣層上具有半導體主動層之 絕緣層上有石夕 SOI(silicon on insulator or semiconductor on insulator)結構的方法之一。通常,傳統焊接晶圓的形成方 法包含步驟:至少熱氧化鏡面服磨(mirror-polished)晶的— 兩者之一 ’且藉在整個全部表面上形成氧化砂層;疊置 一片晶圓’ 一片在另一片上’日層夾於二者之間; 藉由應用熱處理疊置晶圓以堅固地焊接該些曰ΐ圓;以及最 後碾磨與硏磨熱氧化晶圓以變成鏡面似(mirror-like)表面的 薄層在其上。 最近,硼磷砂玻璃 BPSG(boron phosphorous silicate glass)層已普遍地配置在二fi晶圓間當作黏合材料層,且. 在溫度約低於850°C執行回火。然而,爲增加焊接強度, 在回火步驟期間,雜質會擴散進入疊置晶圓,或擴散出到 外面大氣,因此污染了疊置晶圓和半導體元件製造設備。 第1圖是繪示習知SOI結構的剖面圖。參照第1圖, SOI結構包含加工晶圓1〇,其上已形成各式半導體元件, 處理晶圓12,BPSG層14以及氮化矽層13,當作擴散阻 障層。在此SOI結構,BPSG層I4在加工晶圓1〇與處理 ____ 晶圓14間作爲一層黏合層。氮化矽層Π防止BPSG層14 昀雜即-廬奥 .1¾'少进駿由Μ散進入_工晶 圓]0。 » 4 ^^^^中國國家標準((:邓)八4規格(210'乂297公_) ("先閱讀背面之注意事項再域寫本頁) .裝. 訂 線 4〇74pif.doc/〇〇8 .402153 A7 B7 經浐部中""-準而;.^-7·"·於合竹昶印% 五、發明説明(> ) 爲了增加焊接晶圓的焊接強度,上述提及的回火經常 在溫度約950°C執行。然而,在此回火步驟期間,磷與硼 BPSG層.14的側邊擴散出來,例如在線圈(dotted circle) 內部。這些雜質污染焊接晶_ 10與12。當這些污染的晶 圓被載入新的製造設備時,製造設備也被污染。除此之外, 片染潔座复_且載入甚中新的晶片亦被污染。-爲解決上述問題(源自雜質的污染),試圖使用BPSG 層以外的黏合材料。一個例子是使用本質上不具雜質的非 摻雜较玻璃 USGOmdopeci silicate glass)層代替 BPSG 層。 m 然而’在SOI結構選用USG^匱當黏合材料層仍有問題。 例如’回火4必須在,溫度約超過1〇〇〇。(:執行,因此降低焊接 表面特性且在那裡造成孔涧。因此,焊接晶圓可能在隨後 的製造程序期間碎裂,且無法確保產率。 本發明有鑑於上述問題,且因此本發明的目的之一在 提供二zS焊接晶圓浩卞法,其可防止在一氐思!|[間之 黏合材料曆的雜質擴散_出來。 本發明的其他方面、目的、和幾項優點將在熟知該技 藝者閱讀下列揭示和附加申請項而顯露。 爲達到這些與其他優點以及依據本發明的目的,一種 焊接晶圓的製造方法包括:提供一加工晶圓,其上已形成 各式半導體兀件。一第一擴邀卩县障層,即氮化砂層,藉由 LPCVD技術在加工晶圓上形成一厚度約70換至2000埃。 BPSG層在溫度約42〇°C於氮化矽層上形成。BPSG層具有 硼重4.8%與磷重7.2%。在此,第一擴散阻障層防止雜質, 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公嫠) ---------^------ΐτ------.^ « J ,, (請先閱讀背面之注意事項再填寫本頁) 4074 — 08 402752 37 4074 — 08 402752 37 經矛‘部中戎"-^^^h消於合竹41卬來 五、發明説明(办) 硼與磷,在隨後的回火製程擴散進入加工晶圓。提供一處 理晶圓,且BPSG層在如同加工晶圚相同的情況下在其上 形成。爲了增加焊接強度,二片晶圓在溫度約900°C執行 回火。推測加工晶圓在室溫藉由氮化矽層與BPSG層夾在 < 二者之間將黏附處理晶圓。 一第二擴散阻障層,即氮化矽層或氮氧化矽層,在焊 接晶圓的表面以及第一擴散阻障層與BPSG層的側邊上形 成,且第二擴散阻障層藉由LPCVD技術形成一厚度約70 埃至2000埃。第二擴散阻障層防止雜質在隨後的回火製 程期間從BPSG層的側邊擴散出來。 最後,爲了增加焊接強度,二片晶圓在溫度950°C執 行回火。 爲讓本發明之上述和其他目的、,特徵、和優點能更明 顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 圖式之簡單說明: 第1圖是繪示習知技藝中soi結構的剖面圖。 第2A圖至第2D圖是繪示依據本發明之一種新的SOI 結構的製造方法之製程步驟流程圖。 圖式之標記說明: 1〇 :加工晶圓 12 :處理晶圓 13 :氮化矽層 14 : BPSG 層 6 (誚先閱讀背面之注意事項再蛾寫本頁) 、τ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐〉 4074pif.doc/00 8
40275B A7 B7 五、發明説明(0) 100、100a :加工晶圓 10 2 .處理晶圓 104 :第一擴散阻障層 106、106a、106b : BPSG 層 108:第二擴散阻障層 較佳實施例 本發明之較佳實施例將參照相關圖式作說明。 參照第2A圖,提供加工晶圓100,其上已形成各式 半導體元件。第一擴散阻障層104,即氮化砂層,在加工 晶圓100上形成。氮化矽層104例如是藉由LPCVD技術, 在溫度約780°C,使用NH3和DCS(二氯甲烷),形成一厚 度約70埃至2000埃。BPSG層106a!咦黏合gg層,在 溫度約420°C於氮化矽層1〇4上形成。硼重
4.8%與磷重7.2%。在此,第一擴散阻障層104防止BPSG *___---〜 '層106a的雜質,硼與磷,在隨後的回火製程期間經由擴 散進入加工晶圓100。 提供處理晶圓102,且BPSG層106a在如上述相同的 情況下,於處理晶圓1〇2上形成。 爲了增加加工晶圓1 〇〇與處理晶圓1 〇2之間的焊接強 度,進行執行回火。回火可以在氮氣環境,溫度約900°c, 執行約30分鐘。在此時,BPSG層l〇6a與l〇6b可以硼矽 玻璃 BSG(boron silicate glass)層或憐砂玻璃 pSG(phosphorous silicate glass)替代。 參照第2B圖,推測加工晶圓100藉由第一擴散阻障 國家標準(CNS ) A4規格(210X297公釐) I — 11 訂— 111 線 > - . ,, (請先閱讀背面之注意事項再填寫本頁) A7 B7 4074pif.doc/008 五、發明説明(s ) 層1〇4黏著在處理晶片102上,且BPSG層在室溫與10-3Torr 使用真空焊接設插A」兩者之間。在此時,焊接二層BPSG 層106a與l.〇6b以形成BPSG層106,其厚度約3500埃。 參照第2C圖,形成障層1〇8以覆蓋焊接 —.
晶圓1〇〇與102的表面以及第一擴散阻障層104與BPSG 層106的側邊(例如在線圈內部)。此第二擴散阻障層1〇8 防止BPSG層106的雜質在隨後的回火製程期間從BPSG 層106的側邊擴散出來。除此之外,當BPSG層106被金 屬離子如鈉污染時,擴散阻障層108防止金屬離子如鈉的 擴散。第二擴散阻障層108可藉由LPCVD(低壓化學氣相 沉積)形成具有一厚度約70埃至2000埃的氮化矽層(SiN i 層)赛氮'每少矽層層)。LPCVD可在溫度約780°C使 用NH3和DCS執行。當使用PSG層當作黏合材料層1〇6 時,第二擴散阻障層108可由聚合物層或HTO(高溫氧化 層)替代。 參照第2D圖,爲了加強焊接晶圓1 〇〇和1 〇2的焊接 強度’在氮氣環境中,在溫度約950°C執行回火約30分鐘。 在那之後,碾磨及硏磨加工晶圓100的表面以形成一薄層 100a,在隨後製程期間各式半導體元件在其上形成。 雖然本發明已以一較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍內,當可作各種之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 8 ---------采------订------.^ 1 f (請先閱讀背面之注意事項再硪寫本頁) 中國國家標準(CNS ) A4規格(210X297公釐)
Claims (1)
- 4074.pif.doc/008 4Θ2752 AS B8 C8 D8 經濟部中央標準局員工消費合作社印裝 六、申請專利範圍 1. 一種焊接晶圓的製造方法包括下列步驟: 第一晶圓與第二晶圓彼此疊置,配置黏合材料層與第 一擴散阻瞳層於其中; * . 形成第二擴散阻障層以覆蓋該黏合材料層之暴露側 邊以及 ’— 回火該疊置晶圓藉以增加銲墊強度。 -------—---- ---- 2·如申請專利範圍第1項所述之方法,其中該黏合 材料層係選自包括BPSG、PSG、以及BSG層之族群。 3.如申請專利範圍第1.項所述之方法,其中該雜質 擴散阻障層係選自包括SiN、SiON、聚合物、以及HTO 層之族群。 4 _如申請專利範圍第1項所述之方法,其中該黏合 材料層包括PSG層,且該第二雜質擴散阻障層係HTO與 聚合物層之一。 5. 如申請專利範圍第1項所述之方法,其中該^占合_ 材料層係BPSG與BSG層之一,且該第二雜質擴散阻障層 係SiN與SiON層之一。 6. 如申請專利範圍第1項所述之方法,其中該第_ 與第二擴散阻障層具有厚度約70埃至2000埃。 7. 如申請專利範圍第1項所述之方法,其中彰胃 回火在氮氣環境中,且在溫度約950°C共約30分鐘。 8. —種焊接晶圓的製造方法包括下列步驟: 第一晶圓與第二晶圓彼此疊置,配置黏合材料層跑胃 一擴散阻障層於其中; ^ •h 9 ---------裝------訂------線 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 4074pif.doc/008 4❹於52 ABCD 々、申請專利範圍形成第二擴散阻障層以覆蓋該黏合材料層之暴露側邊 與該疊置晶圓的暴露表面;以及回火該疊置晶圓藉以增加銲墊強度.。 ---------^------β------0 _ , I :『 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐)
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US (1) | US6214702B1 (zh) |
JP (1) | JPH11330436A (zh) |
KR (1) | KR100304197B1 (zh) |
TW (1) | TW402752B (zh) |
Cited By (1)
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CN105914154A (zh) * | 2015-02-23 | 2016-08-31 | 英飞凌科技股份有限公司 | 接合系统和用于粘合地接合吸湿材料的方法 |
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KR20020060457A (ko) * | 2001-01-11 | 2002-07-18 | 송오성 | 에스오아이 기판의 제조방법 |
US6737337B1 (en) * | 2001-04-27 | 2004-05-18 | Advanced Micro Devices, Inc. | Method of preventing dopant depletion in surface semiconductor layer of semiconductor-on-insulator (SOI) device |
KR100476901B1 (ko) | 2002-05-22 | 2005-03-17 | 삼성전자주식회사 | 소이 반도체기판의 형성방법 |
KR100854077B1 (ko) * | 2002-05-28 | 2008-08-25 | 페어차일드코리아반도체 주식회사 | 웨이퍼 본딩을 이용한 soi 기판 제조 방법과 이 soi기판을 사용한 상보형 고전압 바이폴라 트랜지스터 제조방법 |
FR2880184B1 (fr) | 2004-12-28 | 2007-03-30 | Commissariat Energie Atomique | Procede de detourage d'une structure obtenue par assemblage de deux plaques |
US8114070B2 (en) * | 2005-06-24 | 2012-02-14 | Angiodynamics, Inc. | Methods and systems for treating BPH using electroporation |
DE102006000687B4 (de) * | 2006-01-03 | 2010-09-09 | Thallner, Erich, Dipl.-Ing. | Kombination aus einem Träger und einem Wafer, Vorrichtung zum Trennen der Kombination und Verfahren zur Handhabung eines Trägers und eines Wafers |
US7888197B2 (en) * | 2007-01-11 | 2011-02-15 | International Business Machines Corporation | Method of forming stressed SOI FET having doped glass box layer using sacrificial stressed layer |
GB0717997D0 (en) * | 2007-09-14 | 2007-10-24 | Isis Innovation | Substrate for high frequency integrated circuit |
KR101096142B1 (ko) * | 2008-01-24 | 2011-12-19 | 브레우어 사이언스 인코포레이션 | 캐리어 기판에 디바이스 웨이퍼를 가역적으로 장착하는 방법 |
US8252665B2 (en) | 2009-09-14 | 2012-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Protection layer for adhesive material at wafer edge |
US8852391B2 (en) | 2010-06-21 | 2014-10-07 | Brewer Science Inc. | Method and apparatus for removing a reversibly mounted device wafer from a carrier substrate |
US9263314B2 (en) | 2010-08-06 | 2016-02-16 | Brewer Science Inc. | Multiple bonding layers for thin-wafer handling |
FR2969373B1 (fr) * | 2010-12-20 | 2013-07-19 | St Microelectronics Crolles 2 | Procede d'assemblage de deux plaques et dispositif correspondant |
US9406508B2 (en) | 2013-10-31 | 2016-08-02 | Samsung Electronics Co., Ltd. | Methods of forming a semiconductor layer including germanium with low defectivity |
US9224696B2 (en) * | 2013-12-03 | 2015-12-29 | United Microelectronics Corporation | Integrated semiconductor device and method for fabricating the same |
WO2016071064A1 (en) * | 2014-11-07 | 2016-05-12 | Abb Technology Ag | Semiconductor device manufacturing method using a sealing layer for sealing of a gap between two wafers bonded to each other |
US9859305B2 (en) | 2015-10-14 | 2018-01-02 | Samsung Display Co., Ltd. | Liquid crystal display device and method of manufacturing the same |
CN110943066A (zh) * | 2018-09-21 | 2020-03-31 | 联华电子股份有限公司 | 具有高电阻晶片的半导体结构及高电阻晶片的接合方法 |
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JPS6051700A (ja) * | 1983-08-31 | 1985-03-23 | Toshiba Corp | シリコン結晶体の接合方法 |
US5750000A (en) * | 1990-08-03 | 1998-05-12 | Canon Kabushiki Kaisha | Semiconductor member, and process for preparing same and semiconductor device formed by use of same |
US5276338A (en) * | 1992-05-15 | 1994-01-04 | International Business Machines Corporation | Bonded wafer structure having a buried insulation layer |
KR0168348B1 (ko) * | 1995-05-11 | 1999-02-01 | 김광호 | Soi 기판의 제조방법 |
JPH0964170A (ja) * | 1995-08-25 | 1997-03-07 | Ube Ind Ltd | 複合半導体基板 |
KR100195243B1 (ko) * | 1996-09-05 | 1999-06-15 | 윤종용 | 얕은 트랜치 분리를 이용한 반도체 장치의 제조방법 |
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1998
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- 1998-11-11 TW TW087118743A patent/TW402752B/zh not_active IP Right Cessation
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1999
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CN105914154A (zh) * | 2015-02-23 | 2016-08-31 | 英飞凌科技股份有限公司 | 接合系统和用于粘合地接合吸湿材料的方法 |
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JPH11330436A (ja) | 1999-11-30 |
US6214702B1 (en) | 2001-04-10 |
KR19990076227A (ko) | 1999-10-15 |
KR100304197B1 (ko) | 2001-11-30 |
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