Classifications

• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
  • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
  • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
  • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
  • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
  • G11C29/30—Accessing single arrays
  • G11C29/34—Accessing multiple bits simultaneously
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
  • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
  • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
  • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
  • G11C29/36—Data generation devices, e.g. data inverters
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
  • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
  • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
  • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
  • G11C29/38—Response verification devices
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
  • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
  • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
  • G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 

Landscapes

• For Increasing The Reliability Of Semiconductor Memories (AREA)
• Tests Of Electronic Circuits (AREA)
• Static Random-Access Memory (AREA)
• Test And Diagnosis Of Digital Computers (AREA)
• Techniques For Improving Reliability Of Storages (AREA)

Applications Claiming Priority (1)

Publications (1)

Family

ID=17282300

Family Applications (1)

Country Status (5)

Families Citing this family (6)

Family Cites Families (8)

• 1997
  • 1997-09-19 JP JP25569197A patent/JP3820006B2/ja not_active Expired - Fee Related
• 1998
  • 1998-02-05 US US09/018,934 patent/US6092227A/en not_active Expired - Lifetime
  • 1998-02-11 TW TW087101874A patent/TW368661B/zh not_active IP Right Cessation
  • 1998-04-22 DE DE19818045A patent/DE19818045A1/de not_active Ceased
  • 1998-05-19 KR KR1019980017959A patent/KR100301980B1/ko not_active IP Right Cessation

Also Published As

Similar Documents

Legal Events