TW358941B - Data signal distribution circuit for synchronous memory device - Google Patents
Data signal distribution circuit for synchronous memory deviceInfo
- Publication number
- TW358941B TW358941B TW084113929A TW84113929A TW358941B TW 358941 B TW358941 B TW 358941B TW 084113929 A TW084113929 A TW 084113929A TW 84113929 A TW84113929 A TW 84113929A TW 358941 B TW358941 B TW 358941B
- Authority
- TW
- Taiwan
- Prior art keywords
- signal
- data
- distribution circuit
- internal address
- flashing
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940040590A KR0140481B1 (ko) | 1994-12-31 | 1994-12-31 | 동기식 메모리장치의 데이타신호 분배회로 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW358941B true TW358941B (en) | 1999-05-21 |
Family
ID=19406226
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW084113929A TW358941B (en) | 1994-12-31 | 1995-12-27 | Data signal distribution circuit for synchronous memory device |
Country Status (6)
Country | Link |
---|---|
US (1) | US5621698A (zh) |
JP (1) | JP2971385B2 (zh) |
KR (1) | KR0140481B1 (zh) |
DE (1) | DE19549156B4 (zh) |
GB (1) | GB2296591B (zh) |
TW (1) | TW358941B (zh) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4090088B2 (ja) * | 1996-09-17 | 2008-05-28 | 富士通株式会社 | 半導体装置システム及び半導体装置 |
TW353176B (en) * | 1996-09-20 | 1999-02-21 | Hitachi Ltd | A semiconductor device capable of holding signals independent of the pulse width of an external clock and a computer system including the semiconductor |
JP3979690B2 (ja) * | 1996-12-27 | 2007-09-19 | 富士通株式会社 | 半導体記憶装置システム及び半導体記憶装置 |
JP3244035B2 (ja) * | 1997-08-15 | 2002-01-07 | 日本電気株式会社 | 半導体記憶装置 |
US6965974B1 (en) | 1997-11-14 | 2005-11-15 | Agere Systems Inc. | Dynamic partitioning of memory banks among multiple agents |
US6215703B1 (en) * | 1998-12-04 | 2001-04-10 | Intel Corporation | In order queue inactivity timer to improve DRAM arbiter operation |
JP2001084762A (ja) * | 1999-09-16 | 2001-03-30 | Matsushita Electric Ind Co Ltd | 半導体メモリ装置 |
KR100365432B1 (ko) * | 2000-08-09 | 2002-12-18 | 주식회사 하이닉스반도체 | 센스 앰프 구동 신호 발생기 |
US7573301B2 (en) * | 2002-12-02 | 2009-08-11 | Silverbrook Research Pty Ltd | Temperature based filter for an on-chip system clock |
US20090319802A1 (en) * | 2002-12-02 | 2009-12-24 | Silverbrook Research Pty Ltd | Key Genaration In An Integrated Circuit |
DE10338303B4 (de) * | 2003-08-20 | 2005-11-17 | Infineon Technologies Ag | Schaltungsanordnung zur Verteilung eines Eingangssignals in eine oder mehrere Zeitpositionen |
KR100557636B1 (ko) * | 2003-12-23 | 2006-03-10 | 주식회사 하이닉스반도체 | 클럭신호를 이용한 데이터 스트로브 회로 |
KR20130050852A (ko) * | 2011-11-08 | 2013-05-16 | 에스케이하이닉스 주식회사 | 어드레스 디코딩 방법과 이를 이용한 반도체 메모리 장치 |
KR20230063386A (ko) * | 2021-11-02 | 2023-05-09 | 삼성전자주식회사 | 비휘발성 메모리 장치 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5107465A (en) * | 1989-09-13 | 1992-04-21 | Advanced Micro Devices, Inc. | Asynchronous/synchronous pipeline dual mode memory access circuit and method |
KR100214435B1 (ko) * | 1990-07-25 | 1999-08-02 | 사와무라 시코 | 동기식 버스트 엑세스 메모리 |
JP2977385B2 (ja) * | 1992-08-31 | 1999-11-15 | 株式会社東芝 | ダイナミックメモリ装置 |
JP2627475B2 (ja) * | 1992-10-07 | 1997-07-09 | 三菱電機株式会社 | 半導体メモリ装置 |
US5481500A (en) * | 1994-07-22 | 1996-01-02 | International Business Machines Corporation | Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories |
JPH0855471A (ja) * | 1994-08-12 | 1996-02-27 | Nec Corp | 同期型半導体記憶装置 |
-
1994
- 1994-12-31 KR KR1019940040590A patent/KR0140481B1/ko not_active IP Right Cessation
-
1995
- 1995-12-27 TW TW084113929A patent/TW358941B/zh active
- 1995-12-28 JP JP7355046A patent/JP2971385B2/ja not_active Expired - Fee Related
- 1995-12-28 US US08/580,164 patent/US5621698A/en not_active Expired - Lifetime
- 1995-12-29 GB GB9526693A patent/GB2296591B/en not_active Expired - Fee Related
- 1995-12-29 DE DE19549156A patent/DE19549156B4/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE19549156B4 (de) | 2006-06-14 |
JP2971385B2 (ja) | 1999-11-02 |
GB2296591A (en) | 1996-07-03 |
GB9526693D0 (en) | 1996-02-28 |
KR960024984A (ko) | 1996-07-20 |
JPH08287685A (ja) | 1996-11-01 |
KR0140481B1 (ko) | 1998-07-01 |
US5621698A (en) | 1997-04-15 |
DE19549156A1 (de) | 1996-07-04 |
GB2296591B (en) | 1998-09-09 |
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