TW358941B - Data signal distribution circuit for synchronous memory device - Google Patents

Data signal distribution circuit for synchronous memory device

Info

Publication number
TW358941B
TW358941B TW084113929A TW84113929A TW358941B TW 358941 B TW358941 B TW 358941B TW 084113929 A TW084113929 A TW 084113929A TW 84113929 A TW84113929 A TW 84113929A TW 358941 B TW358941 B TW 358941B
Authority
TW
Taiwan
Prior art keywords
signal
data
distribution circuit
internal address
flashing
Prior art date
Application number
TW084113929A
Other languages
Chinese (zh)
Inventor
Jae-Jin Lee
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Application granted granted Critical
Publication of TW358941B publication Critical patent/TW358941B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)

Abstract

A data signal distribution circuit for synchronous memory device, including a data generation source for generation of sequential data signals in response to an external signal, including the data signal distribution circuit: at least 2 switches, for switching of the data signal coming from the data generation source to at least 2 peripheral circuits; flash signal generator, for delaying a transmission of delay time of the data generation source of the external signal, and for a flashing signal in response to the delayed external signal, having the flashing signal and predetermined logic scale for a predetermined duration, starting at a pulse edge of the delayed external signal; and internal address generator, in response to the flashing signal from the flashing signal generator for an internal address signal and supplying the internal address signal to the switch, having the internal address signal at least 2 bits, being only one with the rated logic scale.
TW084113929A 1994-12-31 1995-12-27 Data signal distribution circuit for synchronous memory device TW358941B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940040590A KR0140481B1 (en) 1994-12-31 1994-12-31 Data Signal Distribution Circuit of Synchronous Memory Device

Publications (1)

Publication Number Publication Date
TW358941B true TW358941B (en) 1999-05-21

Family

ID=19406226

Family Applications (1)

Application Number Title Priority Date Filing Date
TW084113929A TW358941B (en) 1994-12-31 1995-12-27 Data signal distribution circuit for synchronous memory device

Country Status (6)

Country Link
US (1) US5621698A (en)
JP (1) JP2971385B2 (en)
KR (1) KR0140481B1 (en)
DE (1) DE19549156B4 (en)
GB (1) GB2296591B (en)
TW (1) TW358941B (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4090088B2 (en) * 1996-09-17 2008-05-28 富士通株式会社 Semiconductor device system and semiconductor device
TW353176B (en) * 1996-09-20 1999-02-21 Hitachi Ltd A semiconductor device capable of holding signals independent of the pulse width of an external clock and a computer system including the semiconductor
JP3979690B2 (en) * 1996-12-27 2007-09-19 富士通株式会社 Semiconductor memory device system and semiconductor memory device
JP3244035B2 (en) * 1997-08-15 2002-01-07 日本電気株式会社 Semiconductor storage device
US6965974B1 (en) 1997-11-14 2005-11-15 Agere Systems Inc. Dynamic partitioning of memory banks among multiple agents
US6215703B1 (en) * 1998-12-04 2001-04-10 Intel Corporation In order queue inactivity timer to improve DRAM arbiter operation
JP2001084762A (en) * 1999-09-16 2001-03-30 Matsushita Electric Ind Co Ltd Semiconductor memory device
KR100365432B1 (en) * 2000-08-09 2002-12-18 주식회사 하이닉스반도체 Sense amplifier driving signal generator
US7707621B2 (en) * 2002-12-02 2010-04-27 Silverbrook Research Pty Ltd Creation and usage of mutually exclusive messages
US20090319802A1 (en) * 2002-12-02 2009-12-24 Silverbrook Research Pty Ltd Key Genaration In An Integrated Circuit
DE10338303B4 (en) * 2003-08-20 2005-11-17 Infineon Technologies Ag Circuit arrangement for distributing an input signal into one or more time positions
KR100557636B1 (en) * 2003-12-23 2006-03-10 주식회사 하이닉스반도체 Data strobe circuit using clk signal
KR20130050852A (en) * 2011-11-08 2013-05-16 에스케이하이닉스 주식회사 Method for decoding an address and semiconductor device using the same
KR20230063386A (en) * 2021-11-02 2023-05-09 삼성전자주식회사 Nonvolatile memory devices

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5107465A (en) * 1989-09-13 1992-04-21 Advanced Micro Devices, Inc. Asynchronous/synchronous pipeline dual mode memory access circuit and method
KR100214435B1 (en) * 1990-07-25 1999-08-02 사와무라 시코 Synchronous burst-access memory
JP2977385B2 (en) * 1992-08-31 1999-11-15 株式会社東芝 Dynamic memory device
JP2627475B2 (en) * 1992-10-07 1997-07-09 三菱電機株式会社 Semiconductor memory device
US5481500A (en) * 1994-07-22 1996-01-02 International Business Machines Corporation Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories
JPH0855471A (en) * 1994-08-12 1996-02-27 Nec Corp Synchronous semiconductor memory device

Also Published As

Publication number Publication date
DE19549156A1 (en) 1996-07-04
GB2296591A (en) 1996-07-03
KR0140481B1 (en) 1998-07-01
KR960024984A (en) 1996-07-20
GB9526693D0 (en) 1996-02-28
DE19549156B4 (en) 2006-06-14
JPH08287685A (en) 1996-11-01
GB2296591B (en) 1998-09-09
JP2971385B2 (en) 1999-11-02
US5621698A (en) 1997-04-15

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