TW357362B - Circuit arrangement to generate a high output-voltage - Google Patents

Circuit arrangement to generate a high output-voltage

Info

Publication number
TW357362B
TW357362B TW086118666A TW86118666A TW357362B TW 357362 B TW357362 B TW 357362B TW 086118666 A TW086118666 A TW 086118666A TW 86118666 A TW86118666 A TW 86118666A TW 357362 B TW357362 B TW 357362B
Authority
TW
Taiwan
Prior art keywords
transistor
mos
channel
phase
during
Prior art date
Application number
TW086118666A
Other languages
English (en)
Inventor
Patrick Runkel
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of TW357362B publication Critical patent/TW357362B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • Dc-Dc Converters (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Control Of Voltage And Current In General (AREA)
TW086118666A 1996-12-12 1997-12-11 Circuit arrangement to generate a high output-voltage TW357362B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19651768A DE19651768C1 (de) 1996-12-12 1996-12-12 Schaltungsanordnung zur Erzeugung einer erhöhten Ausgangsspannung

Publications (1)

Publication Number Publication Date
TW357362B true TW357362B (en) 1999-05-01

Family

ID=7814524

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086118666A TW357362B (en) 1996-12-12 1997-12-11 Circuit arrangement to generate a high output-voltage

Country Status (7)

Country Link
US (1) US5905400A (zh)
EP (1) EP0848484B1 (zh)
JP (1) JP3718040B2 (zh)
KR (1) KR100432985B1 (zh)
CN (1) CN1130724C (zh)
DE (2) DE19651768C1 (zh)
TW (1) TW357362B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6215349B1 (en) * 1999-01-05 2001-04-10 International Business Machines Corp. Capacitive coupled driver circuit
KR100364427B1 (ko) * 2000-12-30 2002-12-11 주식회사 하이닉스반도체 반도체 메모리장치의 고 효율 펌프회로
JP7199325B2 (ja) 2019-09-02 2023-01-05 株式会社東芝 スイッチ回路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5216290A (en) * 1988-10-19 1993-06-01 Texas Instruments, Incorporated Process of conserving charge and a boosting circuit in a high efficiency output buffer with NMOS output devices
JPH0812754B2 (ja) * 1990-08-20 1996-02-07 富士通株式会社 昇圧回路
KR940003153B1 (ko) * 1991-04-12 1994-04-15 금성일렉트론 주식회사 백바이어스 발생회로
DE4324855C1 (de) * 1993-07-23 1994-09-22 Siemens Ag Ladungspumpe
US5511026A (en) * 1993-12-01 1996-04-23 Advanced Micro Devices, Inc. Boosted and regulated gate power supply with reference tracking for multi-density and low voltage supply memories
JP3128425B2 (ja) * 1994-04-08 2001-01-29 株式会社東芝 半導体記憶装置
US5677645A (en) * 1995-05-08 1997-10-14 Micron Technology, Inc. Vccp pump for low voltage operation
KR0172850B1 (ko) * 1995-11-23 1999-03-30 문정환 고효율 전하 펌프회로
US5703827A (en) * 1996-02-29 1997-12-30 Monolithic System Technology, Inc. Method and structure for generating a boosted word line voltage and a back bias voltage for a memory array

Also Published As

Publication number Publication date
US5905400A (en) 1999-05-18
KR19980064073A (ko) 1998-10-07
EP0848484A2 (de) 1998-06-17
JP3718040B2 (ja) 2005-11-16
EP0848484A3 (de) 2000-01-12
CN1130724C (zh) 2003-12-10
EP0848484B1 (de) 2002-10-02
DE59708371D1 (de) 2002-11-07
DE19651768C1 (de) 1998-02-19
JPH10188558A (ja) 1998-07-21
KR100432985B1 (ko) 2004-07-16
CN1189672A (zh) 1998-08-05

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees