TW356540B - Method for operating a computer program on a computer readable media for execution by a vector processor and by a dual multiprocessor including a vector processor and a RISC processor - Google Patents
Method for operating a computer program on a computer readable media for execution by a vector processor and by a dual multiprocessor including a vector processor and a RISC processorInfo
- Publication number
- TW356540B TW356540B TW086113323A TW86113323A TW356540B TW 356540 B TW356540 B TW 356540B TW 086113323 A TW086113323 A TW 086113323A TW 86113323 A TW86113323 A TW 86113323A TW 356540 B TW356540 B TW 356540B
- Authority
- TW
- Taiwan
- Prior art keywords
- vector processor
- processor
- vector
- computation
- readable media
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
- 238000004590 computer program Methods 0.000 title abstract 2
- 230000009977 dual effect Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/28—Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/447—Target code generation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
- G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Complex Calculations (AREA)
- Devices For Executing Special Programs (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/731,455 US6016395A (en) | 1996-10-18 | 1996-10-18 | Programming a vector processor and parallel programming of an asymmetric dual multiprocessor comprised of a vector processor and a risc processor |
Publications (1)
Publication Number | Publication Date |
---|---|
TW356540B true TW356540B (en) | 1999-04-21 |
Family
ID=24939580
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086113323A TW356540B (en) | 1996-10-18 | 1997-09-13 | Method for operating a computer program on a computer readable media for execution by a vector processor and by a dual multiprocessor including a vector processor and a RISC processor |
Country Status (4)
Country | Link |
---|---|
US (1) | US6016395A (zh) |
JP (1) | JPH10207870A (zh) |
KR (1) | KR100294016B1 (zh) |
TW (1) | TW356540B (zh) |
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TWI478058B (zh) * | 2011-12-15 | 2015-03-21 | Intel Corp | 電腦實施方法、電腦可讀取儲存媒體以及用於最佳化程式碼的裝置 |
TWI483183B (zh) * | 2011-12-23 | 2015-05-01 | Intel Corp | 混洗浮點或整數值的裝置與方法 |
TWI690896B (zh) * | 2016-07-01 | 2020-04-11 | 美商谷歌有限責任公司 | 影像處理器、由其執行之方法、及非暫態機器可讀儲存媒體 |
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US7802079B2 (en) | 1999-04-09 | 2010-09-21 | Clearspeed Technology Limited | Parallel data processing apparatus |
US8171263B2 (en) * | 1999-04-09 | 2012-05-01 | Rambus Inc. | Data processing apparatus comprising an array controller for separating an instruction stream processing instructions and data transfer instructions |
US7526630B2 (en) * | 1999-04-09 | 2009-04-28 | Clearspeed Technology, Plc | Parallel data processing apparatus |
US7966475B2 (en) | 1999-04-09 | 2011-06-21 | Rambus Inc. | Parallel data processing apparatus |
US8174530B2 (en) * | 1999-04-09 | 2012-05-08 | Rambus Inc. | Parallel date processing apparatus |
US20080162875A1 (en) * | 1999-04-09 | 2008-07-03 | Dave Stuttard | Parallel Data Processing Apparatus |
US6813701B1 (en) * | 1999-08-17 | 2004-11-02 | Nec Electronics America, Inc. | Method and apparatus for transferring vector data between memory and a register file |
US7099812B2 (en) * | 1999-09-24 | 2006-08-29 | Intrinsity, Inc. | Grid that tracks the occurrence of a N-dimensional matrix of combinatorial events in a simulation using a linear index |
US6550059B1 (en) * | 1999-10-04 | 2003-04-15 | Advanced Micro Devices, Inc. | Method for generating optimized vector instructions from high level programming languages |
US6665790B1 (en) * | 2000-02-29 | 2003-12-16 | International Business Machines Corporation | Vector register file with arbitrary vector addressing |
US6857061B1 (en) * | 2000-04-07 | 2005-02-15 | Nintendo Co., Ltd. | Method and apparatus for obtaining a scalar value directly from a vector register |
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US6836839B2 (en) | 2001-03-22 | 2004-12-28 | Quicksilver Technology, Inc. | Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements |
US20040133745A1 (en) | 2002-10-28 | 2004-07-08 | Quicksilver Technology, Inc. | Adaptable datapath for a digital processing system |
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US20030122584A1 (en) * | 2001-07-02 | 2003-07-03 | Boehm Fritz A. | Software program that transforms an N-dimensional matrix of integers to a linear index |
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US7046635B2 (en) * | 2001-11-28 | 2006-05-16 | Quicksilver Technology, Inc. | System for authorizing functionality in adaptable hardware devices |
US6986021B2 (en) | 2001-11-30 | 2006-01-10 | Quick Silver Technology, Inc. | Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements |
US8412915B2 (en) | 2001-11-30 | 2013-04-02 | Altera Corporation | Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements |
US7602740B2 (en) * | 2001-12-10 | 2009-10-13 | Qst Holdings, Inc. | System for adapting device standards after manufacture |
US7088825B2 (en) * | 2001-12-12 | 2006-08-08 | Quicksilver Technology, Inc. | Low I/O bandwidth method and system for implementing detection and identification of scrambling codes |
US7215701B2 (en) | 2001-12-12 | 2007-05-08 | Sharad Sambhwani | Low I/O bandwidth method and system for implementing detection and identification of scrambling codes |
US7231508B2 (en) * | 2001-12-13 | 2007-06-12 | Quicksilver Technologies | Configurable finite state machine for operation of microinstruction providing execution enable control value |
US7403981B2 (en) * | 2002-01-04 | 2008-07-22 | Quicksilver Technology, Inc. | Apparatus and method for adaptive multimedia reception and transmission in communication environments |
US7346898B2 (en) * | 2002-01-29 | 2008-03-18 | Texas Instruments Incorporated | Method for scheduling processors and coprocessors with bit-masking |
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US20120254591A1 (en) * | 2011-04-01 | 2012-10-04 | Hughes Christopher J | Systems, apparatuses, and methods for stride pattern gathering of data elements and stride pattern scattering of data elements |
CN104813279B (zh) * | 2012-12-28 | 2018-12-18 | 英特尔公司 | 用于减少具有步幅式访问模式的向量寄存器中的元素的指令 |
US9898292B2 (en) * | 2015-02-25 | 2018-02-20 | Mireplica Technology, Llc | Hardware instruction generation unit for specialized processors |
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-
1996
- 1996-10-18 US US08/731,455 patent/US6016395A/en not_active Expired - Lifetime
-
1997
- 1997-08-04 KR KR1019970037223A patent/KR100294016B1/ko not_active IP Right Cessation
- 1997-09-13 TW TW086113323A patent/TW356540B/zh active
- 1997-10-17 JP JP9285854A patent/JPH10207870A/ja active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI478058B (zh) * | 2011-12-15 | 2015-03-21 | Intel Corp | 電腦實施方法、電腦可讀取儲存媒體以及用於最佳化程式碼的裝置 |
US9436469B2 (en) | 2011-12-15 | 2016-09-06 | Intel Corporation | Methods to optimize a program loop via vector instructions using a shuffle table and a mask store table |
TWI483183B (zh) * | 2011-12-23 | 2015-05-01 | Intel Corp | 混洗浮點或整數值的裝置與方法 |
US9524168B2 (en) | 2011-12-23 | 2016-12-20 | Intel Corporation | Apparatus and method for shuffling floating point or integer values |
TWI690896B (zh) * | 2016-07-01 | 2020-04-11 | 美商谷歌有限責任公司 | 影像處理器、由其執行之方法、及非暫態機器可讀儲存媒體 |
Also Published As
Publication number | Publication date |
---|---|
KR19980032264A (ko) | 1998-07-25 |
KR100294016B1 (ko) | 2002-01-09 |
JPH10207870A (ja) | 1998-08-07 |
US6016395A (en) | 2000-01-18 |
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