TW346682B - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
TW346682B
TW346682B TW086103787A TW86103787A TW346682B TW 346682 B TW346682 B TW 346682B TW 086103787 A TW086103787 A TW 086103787A TW 86103787 A TW86103787 A TW 86103787A TW 346682 B TW346682 B TW 346682B
Authority
TW
Taiwan
Prior art keywords
conductive film
film
semiconductor device
insulation
pillar
Prior art date
Application number
TW086103787A
Other languages
English (en)
Chinese (zh)
Inventor
Hirotada Kutiyama
Kakuhito Tutumi
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW346682B publication Critical patent/TW346682B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Non-Volatile Memory (AREA)
TW086103787A 1996-08-27 1997-03-25 Semiconductor device TW346682B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22542196A JP3701405B2 (ja) 1996-08-27 1996-08-27 スタティック型半導体記憶装置

Publications (1)

Publication Number Publication Date
TW346682B true TW346682B (en) 1998-12-01

Family

ID=16829115

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086103787A TW346682B (en) 1996-08-27 1997-03-25 Semiconductor device

Country Status (7)

Country Link
US (1) US6501178B1 (2)
JP (1) JP3701405B2 (2)
KR (1) KR100253960B1 (2)
CN (1) CN1146045C (2)
DE (1) DE19714687C2 (2)
FR (1) FR2753005B1 (2)
TW (1) TW346682B (2)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITTO20021118A1 (it) * 2002-12-24 2004-06-25 St Microelectronics Srl Dispositivo mos e procedimento di fabbricazione di
US20050275043A1 (en) * 2004-06-10 2005-12-15 Chien-Chao Huang Novel semiconductor device design
US20080251934A1 (en) * 2007-04-13 2008-10-16 Jack Allan Mandelman Semiconductor Device Structures and Methods of Fabricating Semiconductor Device Structures for Use in SRAM Devices
US20080251878A1 (en) * 2007-04-13 2008-10-16 International Business Machines Corporation Structure incorporating semiconductor device structures for use in sram devices
US11011613B2 (en) * 2018-12-04 2021-05-18 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Flexible substrate with high dielectric-constant film and manufacturing method thereof
US11600519B2 (en) * 2019-09-16 2023-03-07 International Business Machines Corporation Skip-via proximity interconnect

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62260340A (ja) * 1986-05-06 1987-11-12 Toshiba Corp 半導体装置の製造方法
ATE75340T1 (de) 1987-01-28 1992-05-15 Advanced Micro Devices Inc Statische ram-zellen mit vier transistoren.
JPS63260054A (ja) 1987-04-16 1988-10-27 Nec Corp 半導体集積回路装置
JPH01264254A (ja) * 1988-04-15 1989-10-20 Agency Of Ind Science & Technol 積層型半導体装置の製造方法
EP0469214A1 (en) 1990-07-31 1992-02-05 International Business Machines Corporation Method of forming stacked conductive and/or resistive polysilicon lands in multilevel semiconductor chips and structures resulting therefrom
JPH04144281A (ja) 1990-10-05 1992-05-18 Mitsubishi Electric Corp 半導体記憶装置
JP2519837B2 (ja) * 1991-02-07 1996-07-31 株式会社東芝 半導体集積回路およびその製造方法
DE69231233T2 (de) * 1991-03-08 2000-11-30 Fujitsu Ltd., Kawasaki Halbleiterspeicheranordnung mit einem Dünnschichttransistor und Herstellungsmethode für selben
JPH065820A (ja) 1992-06-18 1994-01-14 Nec Kyushu Ltd 半導体装置
US5439848A (en) * 1992-12-30 1995-08-08 Sharp Microelectronics Technology, Inc. Method for fabricating a self-aligned multi-level interconnect
JP2906971B2 (ja) 1993-12-30 1999-06-21 日本電気株式会社 半導体記憶装置の製造方法
US5571751A (en) * 1994-05-09 1996-11-05 National Semiconductor Corporation Interconnect structures for integrated circuits
JP3319872B2 (ja) 1994-05-24 2002-09-03 三菱電機株式会社 半導体記憶装置
JP2601202B2 (ja) * 1994-07-05 1997-04-16 日本電気株式会社 半導体記憶装置
US5426324A (en) 1994-08-11 1995-06-20 International Business Machines Corporation High capacitance multi-level storage node for high density TFT load SRAMs with low soft error rates
JP2689923B2 (ja) * 1994-11-11 1997-12-10 日本電気株式会社 半導体装置およびその製造方法
JP2647045B2 (ja) * 1995-02-28 1997-08-27 日本電気株式会社 半導体記憶装置及びその製造方法
US5547892A (en) * 1995-04-27 1996-08-20 Taiwan Semiconductor Manufacturing Company Process for forming stacked contacts and metal contacts on static random access memory having thin film transistors
US5684331A (en) * 1995-06-07 1997-11-04 Lg Semicon Co., Ltd. Multilayered interconnection of semiconductor device
US5545584A (en) 1995-07-03 1996-08-13 Taiwan Semiconductor Manufacturing Company Unified contact plug process for static random access memory (SRAM) having thin film transistors
US5591673A (en) * 1995-07-05 1997-01-07 Taiwan Semiconductor Manufacturing Company Ltd. Tungsten stud process for stacked via applications

Also Published As

Publication number Publication date
CN1146045C (zh) 2004-04-14
CN1175090A (zh) 1998-03-04
JP3701405B2 (ja) 2005-09-28
FR2753005B1 (fr) 2001-01-05
US6501178B1 (en) 2002-12-31
DE19714687A1 (de) 1998-03-05
DE19714687C2 (de) 2001-10-04
JPH1070198A (ja) 1998-03-10
KR100253960B1 (ko) 2000-04-15
KR19980018086A (ko) 1998-06-05
FR2753005A1 (fr) 1998-03-06

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees