TW344131B - A 1.5V bootstrapped all-N-logic true-single-phase CMOS dynamic logic circuit suitable for low supply voltage and high speed pipelined - Google Patents

A 1.5V bootstrapped all-N-logic true-single-phase CMOS dynamic logic circuit suitable for low supply voltage and high speed pipelined

Info

Publication number
TW344131B
TW344131B TW086107557A TW86107557A TW344131B TW 344131 B TW344131 B TW 344131B TW 086107557 A TW086107557 A TW 086107557A TW 86107557 A TW86107557 A TW 86107557A TW 344131 B TW344131 B TW 344131B
Authority
TW
Taiwan
Prior art keywords
logic unit
bootstrapped
logic
supply voltage
high speed
Prior art date
Application number
TW086107557A
Other languages
English (en)
Inventor
Jenq-Bang Guo
Jyh-Horng Lou
Original Assignee
Nat Science Council
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nat Science Council filed Critical Nat Science Council
Priority to TW086107557A priority Critical patent/TW344131B/zh
Priority to US08/977,076 priority patent/US5973514A/en
Application granted granted Critical
Publication of TW344131B publication Critical patent/TW344131B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type
TW086107557A 1997-06-03 1997-06-03 A 1.5V bootstrapped all-N-logic true-single-phase CMOS dynamic logic circuit suitable for low supply voltage and high speed pipelined TW344131B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW086107557A TW344131B (en) 1997-06-03 1997-06-03 A 1.5V bootstrapped all-N-logic true-single-phase CMOS dynamic logic circuit suitable for low supply voltage and high speed pipelined
US08/977,076 US5973514A (en) 1997-06-03 1997-11-24 1.5V bootstrapped all-N-logic true-single-phase CMOS dynamic logic circuit suitable for low supply voltage and high speed pipelined system operation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW086107557A TW344131B (en) 1997-06-03 1997-06-03 A 1.5V bootstrapped all-N-logic true-single-phase CMOS dynamic logic circuit suitable for low supply voltage and high speed pipelined

Publications (1)

Publication Number Publication Date
TW344131B true TW344131B (en) 1998-11-01

Family

ID=21626671

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086107557A TW344131B (en) 1997-06-03 1997-06-03 A 1.5V bootstrapped all-N-logic true-single-phase CMOS dynamic logic circuit suitable for low supply voltage and high speed pipelined

Country Status (2)

Country Link
US (1) US5973514A (zh)
TW (1) TW344131B (zh)

Families Citing this family (21)

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Publication number Priority date Publication date Assignee Title
US6124735A (en) * 1997-12-11 2000-09-26 Intrinsity, Inc. Method and apparatus for a N-nary logic circuit using capacitance isolation
KR100314732B1 (ko) * 1998-09-28 2002-01-17 박종섭 논리합회로를이용한상태머신
GB9903253D0 (en) * 1999-02-12 1999-04-07 Sgs Thomson Microelectronics Logic circuit
US6265899B1 (en) * 1999-06-04 2001-07-24 S3 Incorporated Single rail domino logic for four-phase clocking scheme
US6542006B1 (en) 2000-06-30 2003-04-01 Intel Corporation Reset first latching mechanism for pulsed circuit topologies
US6567337B1 (en) 2000-06-30 2003-05-20 Intel Corporation Pulsed circuit topology to perform a memory array write operation
US6496038B1 (en) 2000-06-30 2002-12-17 Intel Corporation Pulsed circuit topology including a pulsed, domino flip-flop
US6531897B1 (en) * 2000-06-30 2003-03-11 Intel Corporation Global clock self-timed circuit with self-terminating precharge for high frequency applications
US6649476B2 (en) 2001-02-15 2003-11-18 Micron Technology, Inc. Monotonic dynamic-static pseudo-NMOS logic circuit and method of forming a logic gate array
US6597203B2 (en) 2001-03-14 2003-07-22 Micron Technology, Inc. CMOS gate array with vertical transistors
US6693461B2 (en) * 2001-12-20 2004-02-17 Intel Corporation Multiple supply-voltage zipper CMOS logic family with low active leakage power dissipation
US6917221B2 (en) * 2003-04-28 2005-07-12 International Business Machines Corporation Method and apparatus for enhancing the soft error rate immunity of dynamic logic circuits
US7315438B2 (en) * 2003-06-10 2008-01-01 Seiko Epson Corporation Technique to reduce ESD loading capacitance
US6870401B1 (en) * 2003-08-29 2005-03-22 Matsushita Electric Industrial Co., Ltd. Signal transmission circuit
KR100842744B1 (ko) * 2006-11-20 2008-07-01 주식회사 하이닉스반도체 클럭조절회로 및 이를 이용한 전압펌핑장치
FR2911450A1 (fr) * 2007-01-15 2008-07-18 St Microelectronics Sa Circuit tampon a haute vitesse
US7986172B2 (en) * 2009-08-31 2011-07-26 Freescale Semiconductor, Inc. Switching circuit with gate driver having precharge period and method therefor
TW202141508A (zh) * 2011-05-13 2021-11-01 日商半導體能源研究所股份有限公司 半導體裝置
KR101911060B1 (ko) * 2012-03-19 2018-10-23 삼성전자주식회사 푸터가 없는 ｎｐ 도미노 로직 회로와 이를 포함하는 장치들
CN103219990B (zh) * 2013-04-02 2016-01-20 宁波大学 基于绝热多米诺逻辑的三值低功耗t运算电路
US10784776B2 (en) * 2018-09-10 2020-09-22 Texas Instruments Incorporated Self-boost isolation device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3238826B2 (ja) * 1994-04-13 2001-12-17 富士通株式会社 出力回路
KR0154157B1 (ko) * 1994-04-29 1998-12-15 김주용 반도체 소자의 부스트랩 회로
US5525916A (en) * 1995-04-10 1996-06-11 The University Of Waterloo All-N-logic high-speed single-phase dynamic CMOS logic
US5898333A (en) * 1997-10-20 1999-04-27 National Science Council 1.5 bootstrapped pass-transistor-based Manchester-carry-chain circuit suitable for low-voltage CMOS VLSI

Also Published As

Publication number Publication date
US5973514A (en) 1999-10-26

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MM4A Annulment or lapse of patent due to non-payment of fees