TW343335B - Semiconductor memory device with single-cycle internal read/write function - Google Patents
Semiconductor memory device with single-cycle internal read/write functionInfo
- Publication number
- TW343335B TW343335B TW086109717A TW86109717A TW343335B TW 343335 B TW343335 B TW 343335B TW 086109717 A TW086109717 A TW 086109717A TW 86109717 A TW86109717 A TW 86109717A TW 343335 B TW343335 B TW 343335B
- Authority
- TW
- Taiwan
- Prior art keywords
- input
- data line
- read
- output data
- column selection
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960033083A KR100227272B1 (ko) | 1996-08-08 | 1996-08-08 | 1 사이클 동작 내부 리드/라이트 기능을 가진 반도체 메모리 장치 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW343335B true TW343335B (en) | 1998-10-21 |
Family
ID=19469145
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086109717A TW343335B (en) | 1996-08-08 | 1997-07-10 | Semiconductor memory device with single-cycle internal read/write function |
Country Status (4)
Country | Link |
---|---|
US (1) | US5926426A (zh) |
JP (1) | JP4362151B2 (zh) |
KR (1) | KR100227272B1 (zh) |
TW (1) | TW343335B (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100268420B1 (ko) * | 1997-12-31 | 2000-10-16 | 윤종용 | 반도체 메모리 장치 및 그 장치의 독출 방법 |
US6262936B1 (en) | 1998-03-13 | 2001-07-17 | Cypress Semiconductor Corp. | Random access memory having independent read port and write port and process for writing to and reading from the same |
US6262937B1 (en) | 1998-03-13 | 2001-07-17 | Cypress Semiconductor Corp. | Synchronous random access memory having a read/write address bus and process for writing to and reading from the same |
US6069839A (en) | 1998-03-20 | 2000-05-30 | Cypress Semiconductor Corp. | Circuit and method for implementing single-cycle read/write operation(s), and random access memory including the circuit and/or practicing the method |
KR100532433B1 (ko) * | 2003-05-07 | 2005-11-30 | 삼성전자주식회사 | 하나의 패드를 통하여 데이터를 동시에 입출력하기 위한장치 및 방법 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06223562A (ja) * | 1993-01-26 | 1994-08-12 | Hitachi Ltd | ビデオram、及びグラフィックシステム |
JPH07230691A (ja) * | 1994-02-16 | 1995-08-29 | Fujitsu Ltd | 半導体記憶装置 |
US5680365A (en) * | 1996-05-16 | 1997-10-21 | Mitsubishi Semiconductor America, Inc. | Shared dram I/O databus for high speed operation |
-
1996
- 1996-08-08 KR KR1019960033083A patent/KR100227272B1/ko not_active IP Right Cessation
-
1997
- 1997-05-29 US US08/865,385 patent/US5926426A/en not_active Expired - Lifetime
- 1997-06-04 JP JP14687197A patent/JP4362151B2/ja not_active Expired - Fee Related
- 1997-07-10 TW TW086109717A patent/TW343335B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR19980014220A (ko) | 1998-05-25 |
JPH1092172A (ja) | 1998-04-10 |
JP4362151B2 (ja) | 2009-11-11 |
KR100227272B1 (ko) | 1999-11-01 |
US5926426A (en) | 1999-07-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |